JPS59101542U - signal monitor circuit - Google Patents

signal monitor circuit

Info

Publication number
JPS59101542U
JPS59101542U JP1982197570U JP19757082U JPS59101542U JP S59101542 U JPS59101542 U JP S59101542U JP 1982197570 U JP1982197570 U JP 1982197570U JP 19757082 U JP19757082 U JP 19757082U JP S59101542 U JPS59101542 U JP S59101542U
Authority
JP
Japan
Prior art keywords
signal
monitor circuit
signal monitor
circuit
light emitting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1982197570U
Other languages
Japanese (ja)
Inventor
森脇 慎一
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP1982197570U priority Critical patent/JPS59101542U/en
Publication of JPS59101542U publication Critical patent/JPS59101542U/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Optical Devices Or Fibers (AREA)
  • Manipulation Of Pulses (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の信号モニタ回路の回路図、第2−図は信
号伝搬ラインの信号電圧波形を示す波形図、第3図はこ
の考案の一実施例の場合に発光ダイオードに印加される
信号の電圧波形を示す波形図、第4図は、この考案の一
実施例による信号モニ?回路を示す回路図である。 図中、1は信号伝搬ライン、2は抵抗器、3は発光ダイ
オード、4は信号波形、5はパルス幅、6はパルス幅を
広くした信号波形、7は単安定マ  −ルチバイブレー
タである。なお、図中、同一ある    ゛いは相当部
分には同一符号を村上で示しである。
Figure 1 is a circuit diagram of a conventional signal monitor circuit, Figure 2 is a waveform diagram showing the signal voltage waveform of a signal propagation line, and Figure 3 is a signal applied to a light emitting diode in an embodiment of this invention. FIG. 4 is a waveform diagram showing the voltage waveform of the signal monitor according to an embodiment of this invention. It is a circuit diagram showing a circuit. In the figure, 1 is a signal propagation line, 2 is a resistor, 3 is a light emitting diode, 4 is a signal waveform, 5 is a pulse width, 6 is a signal waveform with a wide pulse width, and 7 is a monostable multivibrator. In addition, in the figure, the same or corresponding parts are indicated by the same reference numerals by Murakami.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] デジタル−パルス信号を受けたとき、そのパルス信号に
より発光ダイオードを点灯させてモニタする回路におい
て、上記デジタル−パルス信号のパルス幅を広げる手段
を備け、この手段からの信号により上記発光ダイオード
番点灯させるようにしたことを特徴とする信号モニタ回
路。  ゛
In a circuit that lights up and monitors a light emitting diode according to the pulse signal when a digital pulse signal is received, the circuit is provided with means for widening the pulse width of the digital pulse signal, and the light emitting diode number lights up according to the signal from the means. A signal monitor circuit characterized in that the signal monitor circuit is configured to゛
JP1982197570U 1982-12-27 1982-12-27 signal monitor circuit Pending JPS59101542U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982197570U JPS59101542U (en) 1982-12-27 1982-12-27 signal monitor circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982197570U JPS59101542U (en) 1982-12-27 1982-12-27 signal monitor circuit

Publications (1)

Publication Number Publication Date
JPS59101542U true JPS59101542U (en) 1984-07-09

Family

ID=30422993

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982197570U Pending JPS59101542U (en) 1982-12-27 1982-12-27 signal monitor circuit

Country Status (1)

Country Link
JP (1) JPS59101542U (en)

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