JPS5910022A - Signal superposing circuit - Google Patents

Abstract

PURPOSE:To suppress an increment of the number of pins when a circuit is converted into a semiconductor IC, by controlling the level shift degree of a level shift means with DC voltage so that its output DC level is equal to the DC level of the 2nd signal and selecting properly the 1st and 2nd signals with a switch means. CONSTITUTION:A comparator 24 detects the difference voltage between the DC voltage of a carrier composite color signal given from a variable level shift circuit 22 and the DC voltage of a burst pilot signal S5 delivered from a bias circuit 28. This difference voltage is converted into the DC voltage by a capacitor 25. Then this DC voltage gives a level shift properly to the carrier composite color signal supplied to the circuit 22 so that the difference voltage is set at 0. As a result, it is always possible to superpose a pilot burst signal S6 of a high S/N.

Description

[Detailed description of the invention] [Seimei's technical fields] The present invention relates to a signal superimposition circuit.

[Technical Background of the Invention and Means] When various signals are also embedded in the Ljfi point I public air circuit, it may be necessary to superimpose two key signals.

i4Suba, $, Garden Video Teso Recorder (hereinafter referred to as V
When recording a PAL television signal (referred to as TR), it is possible to record a PAL television signal using the original 1 fM signal. The purpose of converting the pilot burst signal is to remove the jitter component contained in the reproduced carrier color signal. The key is to remove the color signal and obtain a stable reproduced color signal.In addition, a phase-locked loop (hereinafter referred to as PLL) is provided on the color signal reproduction circuit side.And during reproduction, this PLL Pilot 9-
The knock component included in the reproduced carrier color signal is detected by detecting the first position of the strike signal, and by controlling the oscillator frequency of the oscillator in the PLL, using this horizontal 7th frequency output. Fig. 431 shows the superimposed format of the pilot burst signal and is a signal flat turn diagram. The color burst signal, S4, is the carrier color signal.T, is the horizontal blanking period, T, is the pack notch, and the pilot burst signal S.

7, immediately before the period of the flat synchronization signal S7. Moreover, the amplitude is 1, 2 to 1.8 of the amplitude a of the color permet signal S.
It is set to twice as much.

By the way, when you drive your car at the No Yailot Burst Signal S, this)! The Ilot-Goust signal S is the original color burst signal S mentioned above.

Therefore, in the recording signal processing circuit, the output signal processing circuit 12 of the no-kilot burst signal S is controlled by the automatic color control circuit (hereinafter referred to as (referred to as the ACC circuit) 1 and the fixed wave number conversion circuit #113 (inputted into the 1 to 11. In other words, first the ACC circuit is repeated in the 1 to 11). The amplitude of the ν color mixing signal is set at a constant level, and the pilot burst signal S is superimposed on the ν color combination signal according to a constant i width ratio. Naha... and Ilot Burst Signal S, East Ao...
Is the number 1g of the 1st blow and the combination of waves made by the solid wave number conversion times i1'? Ij
Changed to reduction at I3 (spider, low pressure filter LPF
In order to transmit the pilot/gust signal S, which is supplied to the recording circuit (not shown) via J4, the tunneling circuit 12 is configured as shown in FIG. if you did this,
I have a cheek like this: In addition, the 31st terminal is connected to a switch circuit 121 from an oscillation 515 for generating the carrier composite color signal supplied from the ACC circuit 11 and a pilot burst signal.
The pilot burst signal S sent via the summing unit 122 calculates the value by 110. The switch circuit 121 is controlled iNl to close between the parallel synchronization signals SxM. In this way, the recording circuit J2 shown in FIG. 3, as its name suggests, simply adds the carrier 41 color mixing signal and the pilot burst signal S to a small extent. Therefore, in the 4'A world, etc., if the S/N ratio (signal-to-noise ratio) of the carrier composite color signal becomes @<<, the pilot burst signal S.

The S/N ratio will also deteriorate. As a result, the original purpose of the pilot burst signal S, which is to supply a reference position signal with a good 87N ratio for color signal reproduction to the PLL of the six reproduction color signal logic circuits, is lost.

Therefore, a switch of a switching type as shown in FIG. 4 is generally used as the pilot/star signal blowing circuit. That is, in the wake-up circuit 16 of FIG. Output signal and oscillation circuit 15
The outputs and signals of are selectively supplied to the IM wave number V converter 191 path 13. With such a configuration, the problem that occurs in the circuit shown in FIG. 3 does not occur.However, even if the foreign vehicle circuit 16 shown in FIG. 4 is used, most circuits in recent years are If the recording color ID number processing circuit is made of a semiconductor circuit, the following problem will occur.

That is, ACCI! ! When circuit 1 is made into a semiconductor dyeing circuit, this ACC circuit 1, which is a gain control amplifier circuit,
The output DC level of 2 is easy to fluctuate. Therefore, A.C.
When the C circuit 1 is made into a semiconductor integrated circuit so that the oscillator 15 and the frequency conversion circuit 13 are directly connected to perform switching, the carrier composite color signal (8, +84
) A DC offset occurs between IvI and the pilot burst signal 55m1. This causes significant secondary distortion in the pilot burst signal S.

Therefore, in the past, it was shown in Figure 6.
Condenser 1 for winding cut between 377 and superimposed circuit 12
8 was inserted. Then, at the bias 1111 consisting of resistors 171°, 172°, bias voltage + B, etc.,
The direct current level of the composite tomoe signal passing through the capacitor 18 and the free current level of the pilot burst number SLl were set to be the same level.

However, in the configuration shown in FIG.
Since it is necessary to attach it externally, the number of bottles decreases by one. For semiconductor integrated circuits, which are always faced with the problem that constraints on bin i (bin i) and increases in the number of bins greatly increase manufacturing costs, this requires a large amount of time Rμ in terms of circuit design, etc. As a result, $1 will rise.

[Purpose of the invention]

The present invention has been made to address the above-mentioned circumstances, and an object of the present invention is to provide a signal superimposition circuit that can contribute to suppressing an increase in the number of bins when converting a circuit into a semiconductor integrated circuit.

[Summary of the invention]

According to the present invention, the groove 1 is bored as follows. f, that is, superposition −
"The first signal among the first and second signals is supplied to the level shift means and level-shifted. Difference in DC level between this level-shifted first signal and the signal of Ail No. 82' The differential voltage 14 : I 7 f 7 is converted to DC by this detected differential voltage 14 : I 7 f 7 . By this IL(/1WI(pressure), the level shift means qiI converts its output DC level and the The level shift meter is adjusted so that the DC voltages of the second signal are equal.

In this way, the first signal from the level shifter 1 and the second signal are appropriately selected by the switch means.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described in detail with reference to FIG.
In the following explanation, this invention will be explained to P.
A case will be explained as a representative case in which an AL type television signal is used in a main burst signal superimposing circuit of a recording color signal processing circuit of a VTR that records and plays back. In addition, in Figure 7, the same parts as in Figure 436 are given the same reference numerals.
In the figure, the carrier composite color signal from the ACCIL path 11 is supplied to the variable level shift circuit 22 of the pilot/first signal superimposing circuit 2. A pilot burst signal heavy'& li! The variable level shift circuit 22
In addition to changeover switch 2,? .

Comparison circuit 24. Connect capacitor 25 to −f. The 1-strike combined color signal level-shifted by the variable level shift lo, l 922 is supplied to one input terminal a of the changeover switch 23 and also supplied to one input terminal of the comparator circuit 24. The other input terminal of the changeover switch 23 is supplied with a pilot burst signal S5 from an oscillation circuit 26 for generating a pilot burst signal. As this oscillation 1 channel 26, for example, a subtype crystal imitator is used. The position and frequency of the pilot burst signal S, which is output from @swing i@26, is controlled by the output 'd' of an automatic phase circumcision circuit (hereinafter referred to as A26 times 1 case) 27. This personal PC circuit 27 receives, for example, a color burst signal S in the conveying composite color signal outputted from the d-variable level shift circuit 22.

The phase of the oscillation output signal of the oscillation circuit 2-6 is compared with the excavated output signal of the oscillation circuit 2-6, and the oscillation output signal of the oscillation circuit 26 (the order and frequency match that of the color burst signal) is determined by 1!1Llf according to the comparison result. Tilt one inch so that

The pilot output from the oscillation i1'826
The DC level of the strike signal S is determined by the bias circuit 28. This bias circuit 28 is the ACC circuit 1
) The mixed material signal 4L+'; outputs a DC signal 4L+'; which has a level equal to the DC level I. DC side of this bias circuit 28.

1 is also supplied to the other input terminal of the comparison circuit 24. The output of the comparator circuit 24 is charged to a capacitor 25 externally connected to the bottle 29.

And the acid charged in this container/fusa 25 is charged.
Output surface of the 1-change bell shift circuit 22. This signal is supplied to the control l1ll terminal of the =T variable level shift circuit 22 for F%f level roll.

The movable contact piece C of the changeover switch 23 is connected to the terminal aK during the period of the conveyance fi4 color combination signal, and the Jut 1irl of the Ilot burst signal S is connected to the terminal bVC iL. In the figure, the changeover switch 23 has been explained using a mechanical switch for convenience of explanation, but for example, the groove 1
It's okay to have an electronic switch that gets destroyed!・Of course.

ACCN circuit 1 and Arc circuit 27 are A, CC circuit 11
Using the color mast signal S3 on the output side of , the control 1llVl signal for ACC and the division for APC! Generate u times signal. In the case shown in the figure, the ACC circuit 1 is 1/1, and the El change level shift circuit 22 is similar to the APC circuit 27.
Color Burst No. 18 S3 outputted from is used. Then, 1h is applied to ACC circuit 1 and APC circuit 27.
Although the details are omitted, the circuit that detects the gust signal is, for example, a yellow 111 detector (yellow 1 戊).In this case, one input terminal of the differential i is supplied with the color burst signal S of the J-level 7-foot circuit 22, and the DC current (1) from the bias circuit 28 is supplied to the other input terminal.

According to M IjJ2 above, variable level shift circuit 2
DC voltage and bias circuit 28 for carrying composite color signals from 2
The comparison circuit 24 detects the difference between the DC voltage and the DC voltage of the output signal 8 from the first output signal 8.

Then, this voltage difference is converted into a voltage by the capacitor 26. The output signal supplied to the variable level shift circuit 22 by this direct pressure is bell-shifted so that the above-mentioned differential voltage becomes equal to
1m? Return is multiplied by 4. Therefore, 11 of the conveyed color g output from iJ variable level shift rotation 322
The current level and the DC level of the Pirot burst signal S become -7+i4e. As a result, the cut end switch 2
Even if 3 is θJ (Rosichi 11r-...), Guiro Sotopast signal S.

There is no 11th style offset between the 1st round and the 1st blow composite color Shingo period, and it is always a good 8N! Ilot・
This 'implementation' described in detail above can be used to signal the first signal SS! According to j, there is one outcome as follows.

The capacitor 25 is not a 1σl nine-cut capacitor, but a smoothing capacitor. Therefore, when externally connected bins are arranged at one bin (291) and the circuit is converted into a negative field product circuit, the signal superimposition circuit 21' of this embodiment can contribute to suppressing the increase in the number of bins. , Further, the DC level of the carrier/decombined color signal outputted from the variable level shift circuit 22 and the level of the DC r&fit lfE outputted from the bias circuit 28 are equal. Therefore, the carrier 1 super-combined color signal of the variable level shift circuit 22 and the DC voltage of the bias circuit 28 can be directly connected to the circuit that detects the color burst signal S of the ACC circuit 11 and the APC circuit 27. .

It goes without saying that the present invention is applicable not only to the superimposition apposition of Ilot burst signals, but also to signal heavy circuits in general.

[Effects of the Invention] As described above, according to the present invention, it is possible to provide a signal injection 1cil path that can contribute to suppressing an increase in the number of pins when converting a circuit into a semiconductor integrated circuit. Lasts forever.

[Brief explanation of drawings]

Figure 1 is a signal diagram to explain the superimposition format of the color burst signal, Figure 2 is a circuit diagram showing the recording color signal processing circuit, and Figure 3 is a signal diagram showing the color signal processing circuit shown in Figure 2. A circuit diagram showing an example of a tatami circuit, the horizontal diagram 44 is a circuit diagram showing another 1111, and FIG. , FIG. 6 is a circuit diagram showing another example of the 4-tatami circuit in a burst signal, and FIG. 7 is a circuit diagram showing a -μ embodiment of the signal superimposition circuit according to the present invention. 1 No. ACC circuit, 2 No. 1 No. 1 throat circuit, 2
2... i■ level shift circuit, 23... selector switch, 24... comparison circuit, 25... capacitor, 26
...Oscillation circuit. 1ull Axis Agent Patent Attorney Takehiko Suzue Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6

Claims (1)

[Claims] It level-shifts the 1st signal output from the 1st No. 18 source, the 2nd signal reading, and the FIiJ 1st signal piece, and controls the level shift ambiguity. Compare the difference between the DC level of the signal 1 and the DC level of the signal -fJ2 output from the second signal by the shift means and the level shifter. By converting the differential field outputted from the comparison means and the comparison half-immersion into a direct current, a limiting voltage is generated which can control the shifting of the level shifting means so that the two direct current levels are equal to each other. A signal 'jA'jtlljli' is obtained by switching a capacitor to be removed and a switch means for appropriately selecting the first signal level-shifted by the pipel shift means and the specified second signal.