JPS5899946U - front end circuit - Google Patents

front end circuit

Info

Publication number
JPS5899946U
JPS5899946U JP19608581U JP19608581U JPS5899946U JP S5899946 U JPS5899946 U JP S5899946U JP 19608581 U JP19608581 U JP 19608581U JP 19608581 U JP19608581 U JP 19608581U JP S5899946 U JPS5899946 U JP S5899946U
Authority
JP
Japan
Prior art keywords
circuit
tuning circuit
end circuit
input
antenna
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19608581U
Other languages
Japanese (ja)
Inventor
遠西 智彦
誠 山崎
孝文 林
Original Assignee
ミツミ電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ミツミ電機株式会社 filed Critical ミツミ電機株式会社
Priority to JP19608581U priority Critical patent/JPS5899946U/en
Publication of JPS5899946U publication Critical patent/JPS5899946U/en
Pending legal-status Critical Current

Links

Landscapes

  • Noise Elimination (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を説明する為のフロントエン
ド回路のブロックダイアグラム、第2図は本考案の一実
施例を示す具体的回路図、第3図は単同調及び複同調回
路の選択度特性図、第4図は相互変調妨害の特性図を夫
々示す。 1・・・・・・単同調回路、2・・・・・・複同調回路
、3・・・・・・RF増巾回路、Ts・・・・・・制御
用電源端子、T・・・・・・入力信号供給端子、TA・
・・・・・AGC電圧供給端子、TT・・・・・・同調
型供給端子、Dl、D2・・・・・・スイッチングダイ
オード、L□、L2・・・・・・コイル、Q・・・・・
・電界効果型トランジスタ(FET)、C1〜C1□・
・・・・・コンデンサ、R□〜R1o・・・・・・抵抗
Fig. 1 is a block diagram of a front-end circuit for explaining an embodiment of the present invention, Fig. 2 is a specific circuit diagram showing an embodiment of the present invention, and Fig. 3 is a block diagram of a single-tuned and double-tuned circuit. FIG. 4 shows a selectivity characteristic diagram and a characteristic diagram of intermodulation interference. 1...Single tuning circuit, 2...Double tuning circuit, 3...RF amplifying circuit, Ts...Control power supply terminal, T... ...Input signal supply terminal, TA・
... AGC voltage supply terminal, TT ... Tuning type supply terminal, Dl, D2 ... Switching diode, L□, L2 ... Coil, Q ...・・・
・Field effect transistor (FET), C1~C1□・
...Capacitor, R□~R1o...Resistance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] アンテナからの入力信号を入力同調回路を介してRF増
巾器−1供給するフロントエンド回路において、単同調
回路と多段同調回路とを具備し、相互変調妨害のないと
きは該単同調回路を介して、該相互変調妨害のあるとき
は該多段同調回路を介して夫々RF増巾器へ該入力信号
を供給する様にした事を特徴とするフロントエンド回路
A front-end circuit that supplies an input signal from an antenna to the RF amplifier-1 through an input tuning circuit includes a single tuning circuit and a multi-stage tuning circuit, and when there is no intermodulation interference, the front end circuit supplies the input signal from the antenna to the RF amplifier-1 through the input tuning circuit. A front-end circuit characterized in that, when there is intermodulation interference, the input signals are supplied to the respective RF amplifiers via the multi-stage tuning circuit.
JP19608581U 1981-12-26 1981-12-26 front end circuit Pending JPS5899946U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19608581U JPS5899946U (en) 1981-12-26 1981-12-26 front end circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19608581U JPS5899946U (en) 1981-12-26 1981-12-26 front end circuit

Publications (1)

Publication Number Publication Date
JPS5899946U true JPS5899946U (en) 1983-07-07

Family

ID=30109334

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19608581U Pending JPS5899946U (en) 1981-12-26 1981-12-26 front end circuit

Country Status (1)

Country Link
JP (1) JPS5899946U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55141844A (en) * 1979-04-24 1980-11-06 Onkyo Corp Fm stereo tuner circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55141844A (en) * 1979-04-24 1980-11-06 Onkyo Corp Fm stereo tuner circuit

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