JPS5895480A - Video signal processor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to low noise schemes and signal processing apparatus for such schemes which are particularly useful for reducing noise in highly redundant and repetitive electrical signals such as video signals. do. Video signal quality can be improved by averaging two or more fields. This has the effect of reinforcing the desired signal content against unwanted noise that varies randomly from field to field. However, this 9
The averaging process inevitably introduces some changes in the signal, particularly those related to the reduction in detail caused by unsharp areas when there is movement in the image. An object of the present invention is to provide a method that does not have this drawback.

According to the present invention, there is provided a device for generating a plurality of duplicate signals obtained from an input signal and having different signal delays, and a variable coupling device for variably combining these duplicate signals to generate one output signal. In response to the difference or group of differences between these replicated signals, the output signal consists of a combination of all 5 of these replicated signals when this difference or 6 differences is small, and when any of these differences is not small. Sometimes a signal processing device comprises a combination of selected one or more of these replicated signals to reduce the difference or differences with respect to the selected group of replicated signals. provided.

This signal processing device can operate in either encoding mode or decoding mode. In decoding mode, the combining effect is additive, whereby an averaging effect is usually achieved. This effect disappears or decreases when either of the differences is not small.

Thus, undesired averaging, which has the effect of smearing the changing signal, is eliminated. In the encoding mode, the combining operation subtracts one or more of the duplicate signals from the remaining duplicate signals to perform a processing operation that is complementary to that provided by the decoding mode. The mode of the circuit is determined by the coefficients and relative polarities of the coupled replica signals.

Although it is possible to use the decoding processor alone to provide a noise reduction effect that makes changes in the signal itself relatively small, it is also possible to use both the encoding and decoding circuits to form a fully complementary noise reduction scheme. It is preferable to use

In the complementary scheme, the signal is first processed by an encoding circuit. The encoded signal is supplied via a transmission channel to a decoding circuit in real time or via a recording and reproducing device. The term "information channel" is used generally to refer to the means for conveying encoded signals to decoding circuitry. When a recording/reproducing device is used,
One circuit can be used for both encoding and decoding, in which case suitable switching means are used to switch between encoding and decoding modes.

One of the different signal delays can be zero delay, in other words, one of the replicated signals consists of the direct, undelayed signal derived from the input signal. In addition to being economical, this leads to a circuit geometry that provides completely complementary encoding and decoding characteristics.

The distinction between when the signal difference is small and when it is not small can be arbitrarily determined to suit a given application of the invention, but typically this distinction is made within 1% of the peak signal level. % to 10%.

In the simplest case only two replicate signals are used, and when the difference between them is small they are both combined. Whenever this difference is not small, one of these signals, which can be made identical, contributes to the output signal. An abrupt change can occur between these two states, defined by a single threshold applied to the difference between these signals, for example a threshold of about 1 inch of the peak signal level, where the difference is 1 It must be as small as 1, and not be smaller than 1. However, this change is gradual and unless the difference exceeds a value as low as 1, it will be small and both duplicate signals will contribute to the output signal. When the difference exceeds a factor of 1, the contribution of the second signal is considered to be not small at a relatively high threshold such as 10%, and the contribution of the second signal to the output signal is reduced. It is gradually reduced until it no longer occurs. Between 1-chi and 10-chi, the difference is intermediately small, but not really small, and the second signal makes an intermediate contribution to the output signal.

When three or more replicated signals are used, various possibilities exist for selecting one or more of these signals when any difference is no longer small. The simplest possibility is to select only one predetermined replica signal, eg the direct signal, whenever any of the differences are no longer small. however,
From a more general point of view, when there are not small differences, the replicated signals can be divided into two classes, called "valid signals" and "invalid signals".

The differences between valid signals are all small, but the differences between invalid and valid signals are not. The decision as to which is a valid signal and which is an invalid signal is to specify that the valid signal always includes a given one of the replicated signals, e.g. the direct signal; This can be done by specifying that the signal has a relatively large numerical value. Having separated the replicated signals in this manner, the output signal may consist of any combination of one or more of the useful signals.

An example is given below where this is the case, in which a predetermined one of these signals, the direct signal, is always the valid signal. Other replicate signal groups are individually compared to this. As long as the difference between any one of said other replicated signals and said one signal is small, this other signal is a valid signal and is included in the combination forming the output signal.

If the difference is not small, the other signal is invalid and excluded from the combination forming the output signal.

Again, abrupt or gradual transitions are used.

In the latter case, the combination consists of all duplicate signals when all differences are small and all signals are valid, and only valid signals when some of the differences are not small and some signals are invalid. Consisting of Nakaru exists when there is an intermediate difference. Such a signal makes an intermediate contribution to the output signal.

The total number of replicated signals can be expressed as an integer N greater than one. Preferably, the variable combining device is configured to always combine N signals regardless of whether any signal is invalid. If any signal is invalid, the variable combiner replaces it with a duplicate of one valid signal. Since N signals are always combined, the level of the output signal is unaffected by changes in the number of signals that are valid. This avoids problems that would otherwise occur if the invalid signal were simply separated from the combination.

responsive to a main signal path including a first coupling device and a delayed signal at the input or output of the first coupling device and an undelayed signal at the input or output of the first coupling device; a second variable coupling device for providing an auxiliary signal path signal to the first coupling device, the auxiliary signal path signal being combined with the signal of the main signal path; and The auxiliary signal path signal consists essentially of the delayed signal when the difference between the delayed and undelayed signals is small and consists essentially of the undelayed signal when the difference is not small. It is preferable to

In the decoding mode, the auxiliary signal path signal increases the level of the main signal path signal, and in the encoding mode, the auxiliary signal path signal decreases the level of the main signal path signal.

In operation, as long as the difference is small, the delayed signal is combined with the main signal path signal to provide an averaging, noise reduction effect in the decoder. If the difference is not small, the direct signal is used, which eliminates the blurring.

The reason for this is that the signals combined by the first combining device are now one and essentially the same signal. The output signal will be the same as the direct signal, which is the same as the input signal except that a level difference has been created.

In such a case, the noise reduction effect is removed, but in the case of video signals, for example, this is not a disadvantage, since the noise is substantially affected by movement in the image from which the signal is directly utilized. This is because it will be masked.

Preferably, the action of the variable coupling circuit occurs with short time constants in sections to remove the noise reduction effect only in the portion of the image where movement is occurring, while maintaining the noise reduction effect in the remainder of the image.

Preferably, the delay time t experienced by the delayed signal is equal to the period of the input signal when it is a repetitive redundant signal, such as a video signal. For example, this time t may be equal to one or more scan line periods or one or more field or image periods in the case of video signals. However, the time t can also be short compared to the repetition period. . In this case, the decoding circuit can eliminate noise at frequencies higher than the repetition frequency, and even noise at the highest frequency component, which is the problem, by averaging.

In order to improve the averaging effect of the decoding circuit, t, 2t
. . . NtCN is an integer greater than 1)), and these delayed signals cooperate to increase the level of the signal in the main signal path. is preferable.

Each delayed signal may be obtained by any suitable delay device, such as a delay line of a suitable delay time. When the circuit is used in conjunction with a recorder, whether the recorder records video signals magnetically, optically, or mechanically (i.e., by grooves, etc.), it may It is possible to simultaneously obtain multiple signals with different delay times from separate heads of the recorder, etc.

Video storage tubes can also be used to provide the necessary delay.

The transition from using a delayed signal to using a direct signal and vice versa may be abrupt (switching) or gradual.

In a complementary manner, the level-increasing effect performed by the combination of the delayed signal and the human input signal in the kyphotic circuit performs the aforementioned averaging, since each delayed signal performs a level-decreasing of the input signal. It is complementary to the level reduction effect in the encoding circuit, and therefore the overall effect of the encoding and decoding circuits is to restore the input signal to its original form (while the decoding circuit reduce the noise introduced into the information channel by averaging such noise).

It is clear that the level reduction action within the encoding circuit must not completely erase the input signal.

The present invention will now be described with reference to the drawings.

For convenience, FIGS. 1-4 show a delay circuit 12, designated by the symbol Δ, for generating a delayed signal. From the foregoing, it can be seen that there is no need to provide a separate group of delay devices in cases where the delayed signal can be taken directly from the recording medium.

To simplify the description of the invention, throughout the figures, when signals are combined, they are additively combined (i.e., by blocks connected II+I+).
The convention is that the inverter 13 (block marked -°1) is shown when subtractive coupling is required. It will be appreciated that the same overall result may be achieved in various ways by using inverters in locations other than those shown, or by using combination circuits such as differential amplifiers that subtract one signal from the other. It is only necessary that closed loops illustrated as inverting must remain inverting as a whole, non-inverting loops must remain non-inverting as a whole, and that the result of the signal combination is All that must be maintained is additive or subtractive, as the case may be.

In each of FIGS. 1-4, the encoder is shown at (α) and the decoder is shown at (b). The encoder supplies a signal to the decoder via an information channel represented by a disconnected connection line with the symbol N denoting the noise introduced into the information channel and averaged in the decoder.

The apparatus shown in FIGS. 1 to 4 will now be explained.

Each decoder can itself be used independently to process the uncoded signal to perform noise reduction simply by averaging. However, the complete scheme using an encoder and decoder has the advantage that the decoder output is the same as the encoder input. Completely complementary operations are achieved in each of FIGS. 1-4, the decoder being of the same type as the encoder. In this case, it is convenient to use different types of encoders and postcoders, for example the encoder of FIG. 2(α) can be used together with the decoder of FIG. 3(6).

Each encoder and decoder has internally a main signal path lO and a coupling device 11. The auxiliary signal path has a direct input DR and a delayed input DL and supplies the direct signal and the delayed signal to a variable coupling device 20, the output 21 of which is the main signal path signal in the encoder. is connected to the coupling device 11 via an inverter 13 so as to reduce the level of
Within the decoder, the main signal path signal is connected to a coupling device for amplification. 4 marked in these four drawings
The difference between the two types lies in the difference in the direct and delayed signals obtained. If the symbols I and O represent the input and output sides of the coupling device 11, respectively, these points are shown in the table below. In each case the decoder is complementary to the encoder.

The variable coupling circuit 20 normally supplies the signal from the delayed input DL to the coupling device 11, but when the direct signal and the delayed signal differ by more than a small amount, the direct input D'l- or is controlled to supply such signals to the coupling device 11. An example will be explained later.

Limits are imposed on the gains of some of the feedforward and feedback loops of FIGS. 1-4. First, the gain of the feedforward loop in the encoder must be smaller than l. Otherwise, the output of the auxiliary signal path would cancel or even invert the signal of the main signal path. Second, the gain of the positive feedback loop must be less than l to avoid instability. Using a gain less than 1 in the decoder is disadvantageous because it does not provide the best averaging. Although it is possible to provide a gain of unity in the auxiliary signal path for the decoder of FIG. 3(6), it is not possible to use such a gain in a complementary device. because,
(The gain of the auxiliary signal path of all encoders must be less than 1 for one or the other of the above reasons.) ).

Therefore, a signal path gain of less than 1, preferably a gain of 0.08 with no greater than 0.9, is used to ensure stability and a delay in order to improve the averaging and therefore noise reduction. It is preferable to use about two or more signals.

An example of an auxiliary signal path having a direct input DR and a delayed input DL is shown in FIG. 5, the outputs 21 of the auxiliary signal path being numbered correspondingly in each of FIGS. 1 to 4; Figure 5 may be replaced in any of these figures. Three delay devices 16, 17 and 18 provide delays of t, 2t and 3t. There is no significance in specifying the number of delay devices; in other words, two, three, four or more delay devices can be provided. Each delay device supplies a signal to its own variable combiner 20 and the outputs of these combiners are summed by combiner 19 to produce an auxiliary signal path output at 21.

Using the symbols appearing in FIGS. 3 and 5, it can be seen that in the encoder:

y=x-(ys 112+ya) In the decoder, +-+, er/, , 4-ri,. First one l,)=Z
(Y++y2+V3)+y++y2+y3 Thus, it can be seen that the decoder and encoder are completely complementary and the decoder output 2 is the same as the encoder power X. We have ignored the noise N introduced into the information channel; however, this is reduced by the averaging action of the decoder. This is because it is non-coherent in the four signals that are combined in the decoder, whereas l&, Yl, y2 and v3 are coherent and mutually reinforcing.

Although not analyzed, it is easy to see that if the gains of the auxiliary signal paths in the encoder and decoder of FIG. 1, FIG. 2, or FIG. 3 are equal, then the encoder and decoder are still complementary. Let's be known.

The signal y in the information channel is lower than input signal 2 (and output signal 2) and is at a bell. This is known, for example, from Figure 3 and M5, where the y-cliff, v-mu, and y-cliff
If s are all substantially the same (when X is a video signal and the delay is equal to an integer, preferably even, multiple of the field period of this video signal) and the gain of each loop is 0.8, then The formula within the encoder is as follows.

y=x-(y+-1-y2+y3) Also, y+=y2=y3=Q82/(for exact approximation) Therefore, y-x-3X0.8y Therefore, y=yc/3.4 or approximately For y=0.3z In the decoder Z=y+(us +Y2+Y3) =x/3.4+3 X 0.8Z/3.4=X FIG. Variable coupling device 20 now added to the two ends. shows. Auxiliary signal path output 21 is taken from the sliding arm of the potentiometer. A comparator 23 compares the signals at the two ends of the potentiometer to generate a difference or error signal, which drives the sliding arm via the servo represented by dashed line 23a. , as long as the error signal (which may be subject to smoothing with a suitable time constant) remains below a predetermined threshold, the sliding arm of the potentiometer remains at the left-hand edge in the drawing and the auxiliary signal path output are exclusively delayed signals. Above the threshold, as the error signal increases, it moves the sliding arm further and further to the right, making the contribution of the direct signal larger and larger, and this direct signal eventually becomes completely absorbed by the delayed signal. supersede.

In drawing FIG. 6, an electromechanical servo control of the potentiometer sliding arm was previously assumed. In practice, the above-mentioned effects can be obtained by purely electrical means involving known techniques, such as by using transistors or field effect transistors as controlled resistors. This is illustrated in Figure 7, where resistor 24
When the resistance of field effect transistor 28 in series with resistor 24 drops substantially below the resistance of resistor 24, the error signal increases the conductivity of field effect transistor 28 such that the direct signal is replaced by the delayed signal. It has become. This change is gradual.

It is not necessary to use a controlled variable coupling device.

FIG. 8 shows a simple passive circuit in which the delayed signal is normally coupled to output 21 via resistor 24. FIG. When the difference between the direct signal and the delayed signal exceeds the threshold of the two back-to-back diodes 25, they conduct and send the direct signal to output 21. This is because their resistance values are now much smaller than the resistance value of resistor 24. The transition from the delayed signal to the direct signal depends in this case on the characteristics of the diode.

FIG. 9 shows a modification of FIG. 8 in which resistor 24 is replaced by a high-pass filter consisting of capacitor 26 and resistor 27. FIG. The impedance of this filter is lower at high frequencies than at low frequencies, so the tendency for the direct signal to replace the delayed signal is greater at low frequencies than at high frequencies. This has the advantage that the difference between these two signals is typically more significant at low frequencies than at high frequencies. A relatively high threshold operating at high frequencies allows such frequency noise reduction to occur even when the direct signal replaces the delayed signal at relatively low frequencies. allow it to be done. Capacitor 26 can be supplemented or replaced by a tuned circuit if an RF multiplication signal is present. The various bands of the incoming signal vectors can generally be processed separately by separate combiners, each of which has an appropriate frequency characteristic, and which combine with a given signal source with different delays. connected in parallel. The outputs of these separate coupling devices are then coupled together.

Although it is preferred to combine signals in the manner shown in FIGS. 1-4 using main and auxiliary signal paths in a parallel arrangement, series mode circuits may also be used. This is shown in FIG. 10 for the decoder only. The voltage divider circuit includes resistor 30, transistor 31, resistor 32, transistor 33 and resistor 3.
It consists of 4. Transistor 33 acts as a current source controlled by the input signal, and resistor 32 contributes power to the output taken from the collector of transistor 33. The voltage across transistor 31 is combined with the voltage across resistor 32. Transistor 31 is used as a variable impedance controlled by an auxiliary signal path 35, which signal path 35 is for example shown in FIG.
It can take a simple form as in b) or a relatively complex form as in FIG. Transistor 31 generates a signal that is related to the current flowing through the circuit and therefore to the input signal.

In FIG. 5, the direct signal is always treated as the main signal which replaces any delayed signal when it differs from the direct signal. However, one of the delayed signals can also be processed as the main signal as shown in the decoder of FIG.

Four delayed signals S2 to S5 are produced which are delayed by 2t, 3t and 4t (where t can be the scan line period or the field period').

S3 is processed as the main signal and is supplied as a single input to the coupling device 11. The second input normally consists of S1+S2+S4+S5 supplied by the coupling device 19. However, the variable coupling device 20 has S1, S2,
Comparing each of S4 and S5 with 83, as the difference with respect to S3 exceeds a small threshold, SL, S2,
Replace each of S4 and S5 with 83.

The invention can be used to reduce noise introduced by standard converters, in which case the encoder preceding the converter has delay lines and other parameters that match the standard of the input signal. The converter is then followed by a decoder having delay lines and other parameters that comply with the output signal standards.

Various other features also related to noise reduction of video signals and similar signals and which may be incorporated into the present invention,
See, for example, Japanese Patent Application No. 48-37947 by the present applicant, which describes processing of signals including carrier components, techniques for switching between encoding and decoding processing devices, etc.

[Brief explanation of the drawing]

1-4 are diagrams showing four generalized embodiments of the present invention, and FIG. 5 is a diagram showing an aid for use in any of FIGS. 1-4 and utilizing two or more delays. Fig. 6 is a diagram showing the principle of the variable coupling device;
Figures 7 and 9 show two practical circuits for a variable coupling device, Figure 10 shows a series mode decoder implementing the invention, and Figure 11 implements the invention. Another decoder is shown, in which 10 is the main signal path, 11 is a coupling device, 12 is a delay circuit, 13 is an inverter, 16, 17, 18 is a delay device, 20 The variable coupling device is used for the variable coupling device, the DR uses direct human power, the DL & the delay input is used, 23
indicates a comparator, 28 indicates a field effect transistor, and 35 indicates an auxiliary signal path. 3 (0) gfE, /[21,b. ,. , Book i Figure tb> )l L5 Figure Honseki Figure Tail 7 - 39° Wave 1/Figure

Claims (1)

Claims: In a video signal processing device for noise reduction in an input video signal. b) A delay device (12) for delaying a signal obtained from the input video signal. h) a summing circuit (11) for summing the delayed signal and the input video signal; and c) a summing circuit (11) for summing the delayed signal and the input video signal; Another circuit (20) for reducing the proportion of the delayed signal. A video signal processing device comprising: an input of the delay device (12) connected to an output of the adder circuit (11).