JPS589474A - Delaying circuit - Google Patents

Abstract

PURPOSE:To obtain two types of delayed output signals by means of a single delay line, by using a pair of modulating means that perform the right-angled biaxial modulation with the carrier waves having the phases different by 90 deg. from each other, a signal synthesizing means, a delaying means and a pair of demodulating means respectively. CONSTITUTION:The 1st amplitude modulator 43A modulates an input signal Sin by using the signal supplied from an oscillator 41 as a carrier wave. The 2nd amplitude modulator 43B modulates the output of the 1st signal demodulator 46A by using the signal obtained while giving a 90 deg. phase shift to the output of the oscillator 41 as a carrier wave. The outputs of the modulators 43A and 43B are added and synthesized together by a signal adder 44 and then demodulated by the 1st and 2nd demodulators 46A and 46B via a delaying line 45. The demodulator 46A delivers a delayed signal to the signal Sin by using the output of the oscillator 41 directly as a synchronizing signal. While the demodulator 46B delivers a signal having a double delay by using the signal obtained while giving a 90 deg. phase shift to the output of the oscillator 41 as a synchronizing signal.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a delay circuit used for, for example, vertical contour correction of a video signal.

In general, video signals in video systems such as television receivers and imaging devices pass through various electrical circuits and signal transmission paths with limited operating frequency bands, so high frequency components are attenuated, resulting in a so-called resolution drop. arise. For example, in the video amplification circuit of a color television receiver, if a 3.58 MHz color subcarrier is carried on the brightness signal, a brightness change of 3.58 MHz beats will occur in the reproduced image, so it is necessary to eliminate the above beat interference. Therefore, the color subcarrier is 15 ~
It has frequency characteristics such that it is attenuated by 16 dB or more.

Therefore, the high frequency components of the video signal that has passed through the video amplification circuit are attenuated, and the resolution of the reproduced image is reduced.

Furthermore, in the shadow mask type cathode ray tube, the luminance modulation efficiency gradually decreases as the frequency exceeds 2 MHz, and as the luminance modulation efficiency decreases, the contrast of the screen decreases and the resolution decreases.

Therefore, in order to compensate for the above-mentioned decrease in resolution, contour correction has been conventionally performed in which a correction signal is superimposed on a luminance signal so as to increase the sharpness of the contour portion of an image. Generally, the luminance signal waveform portion corresponding to the outline of the image has a
By performing contour correction to compensate for overshoot or undershoot of about 30%, the sharpness of the contour portion of the image is increased and the resolution is improved.

First, for example, in order to improve the vertical resolution of the image, K
A vertical contour correction circuit 10 having a configuration as shown in FIG. 1 has been widely used in the past.

In the conventional vertical contour compensation circuit 10 shown in FIG.
The input luminance signal Yin subjected to contour correction is supplied to a delay circuit 2 and a first signal adder 3 through a signal input terminal 1.

The delay circuit 2 includes two delay lines 23 and 24 each having a delay amount τ equal to -horizontal scanning period 1H, and input luminance signal Yin to - by the first delay line 23.
[-(Outputs the delayed first delayed luminance signal YoL, and also outputs the second delayed luminance signal YDL, which further delays the first delayed luminance signal by 1H by the second delay line 24.
It is configured to output 2. That is, in this delay circuit 2, the input luminance signal Yin supplied through the signal input terminal 1 is put on the carrier wave from the oscillator 22 in the amplitude modulator 21, and is transmitted to the first delay line 23 via the first delay line 23. A second delay line 2 is supplied to the signal demodulator 25 and further connected in series to the first delay circuit 23.
0 to the second No. 18 demodulator 26 via
Here, if the input luminance signal Yin as shown in FIG. 2A is supplied to the signal input terminal IK, the first signal demodulator 25 outputs the luminance signal delayed by 1H by the first delay line After demodulation, a first delayed luminance signal YDL1 having a delay of 1H with respect to the input luminance signal Yin is obtained as shown in FIG. 2B. In addition, the second signal demodulator 26 demodulates the luminance signal delayed by 1H by the first and second delay lines 23 and 24, and as shown in FIG. A second delayed luminance signal YDL□ having a delay of 211 times is obtained.

The first and second signals obtained through the delay circuit 2 as described above
The delayed luminance signals Y, L, , YDL□ are obtained by supplying the first delayed luminance signal Yar,+ to the signal subtracter 5 and the second signal adder 7, and the second delayed luminance signal YD, , , YDL□. is supplied to the first signal adder 3.

The first signal adder 3 has an input luminance signal Yin and a second signal adder 3.
are added and synthesized with the delayed luminance signal YDL2, and the signal attenuator 4
The combined signal YA as shown in the second diagram is supplied to the signal subtracter 5 via the signal subtracter 5. The signal subtracter 5 of ξ subtracts the above-mentioned composite and merged signal YA from the first delayed luminance signal YDI, □, thereby obtaining the contour correction signal SAc as shown in FIG. 2E. This contour correction signal sAc is supplied to the second signal adder 7 via the level adjuster 6, and is superimposed on the first delayed luminance signal YDL□ in the second signal adder 7.

As shown in FIG. 2F, the output luminance signal YOUT output from the second signal adder 7 to the signal output terminal 8 has an outline correction signal SAC in the part where the luminance changes, that is, the outline part in the vertical direction of the image. By being superimposed, the waveform has a vertical contour corrected.

In this way, in the conventional vertical contour correction circuit 10, in order to obtain the first delayed luminance signal YDLI delayed by 1H with respect to the input luminance signal YinlC, and the second delayed luminance signal YDL2 delayed by 2H with respect to the input luminance signal YinlC, two IHs are used. A delay circuit 2 including delay lines 23 and 24 was used.

Incidentally, delay lines are generally expensive, especially in the conventional vertical contour correction circuit 10 that uses two high-performance IH delay lines that have a relatively large delay amount τ and require broadband performance. However, the product is extremely expensive, and most of the price is accounted for by the delay lines 23 and 24.

Therefore, in view of the problems in the conventional vertical contour correction circuit as described above, the present invention uses one delay line to generate a signal delayed by the amount of delay caused by the delay line, and a signal delayed by twice the amount of delay described above. The present invention provides a delay circuit with a novel configuration that is capable of outputting a delayed signal.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the drawings showing one embodiment.

In FIG. 3 showing an embodiment of the delay circuit according to the present invention, 41 is an oscillator, and the oscillation output signal from the oscillator 41 is directly sent to the first amplitude modulator 43A and the first signal demodulator 46A. The amount of phase shift is 90°.
The second amplitude modulator 43B and the second signal ? The water is supplied to the regulator 46B. Also, 40
A is a signal input terminal, and the input signal Sin is supplied to the first amplitude modulator 43A through this signal input terminal 40A. Furthermore, 44 is a signal adder, and this signal adder 44 adds and synthesizes each amplitude modulated output signal s1y 82 from the first and second amplitude modulators 43A and 43B, and outputs the synthesized output signal SA. ffa 45 to first and second signal demodulators 46A, 46B. Furthermore, 40B is a first signal output terminal, and 40C is a second signal output terminal.

The first amplitude modulator 43A performs AM modulation on the input signal Sin'''c carrier wave from the input terminal 40A using the oscillation output signal directly supplied from the oscillator 41 as a transmission wave. , the first signal carrying the input signal Sin on a carrier wave.
The amplitude modulated output signal s1 is supplied to the signal adder 44.

Further, the second amplitude modulator 43B uses an oscillation output signal supplied from the oscillator 41 via the phase shifter 42 as a carrier wave.
First demodulated output signal 81' from first signal demodulator 47
In order to perform AM modulation on the carrier wave, a second modulated output signal s2 in which the first demodulated output signal 81' is carried on the carrier wave is supplied to the two-signal adder 44.

Here, each amplitude modulated output signal J)S2 supplied to the signal adder 44 is as shown in the vector diagram of FIG.
The carrier waves having a phase difference of 900 degrees are amplitude modulated.

That is, the first; b and the second amplitude modulator 43A,
43B performs so-called orthogonal two-axis modulation.

The first signal demodulator 46A corresponds to the first amplitude modulator 43A, and uses the oscillation output signal directly supplied from the oscillator 41 as a synchronization signal from the adder 44 to the delay line 45. Synchronous detection is performed using the synthesized output signal SAK supplied via the . That is, the first
The signal demodulator 46A demodulates only the first amplitude modulated signal S1 component in the composite output signal SA by performing synchronous detection based on the synchronization signal that is in phase with the carrier wave in the first amplitude modulator 43A. . Therefore, the first signal demodulator 46A demodulates the first amplitude modulated signal S1 delayed by the delay amount τ of the delay line 45, and demodulates the first amplitude modulated signal S1 delayed by τ with respect to the input signal 5inK. An output signal 81' is obtained.

This first demodulated output signal 80' is supplied to the second amplitude modulator 43B and also to the first signal output terminal 40.
B as the first delayed output signal.

Further, the second signal demodulator 46B corresponds to the second amplitude modulator 43BK, and the second signal demodulator 46B corresponds to the second amplitude modulator 43BK.
Synchronization signal in phase with carrier wave in 3B, ie, oscillator 4
Based on the oscillation output signal supplied from phase shifter 42 from phase shifter 42, synchronous detection is performed on the synthesized output signal SAK. This second signal demodulator 46B demodulates the second modulated output signal S2 component in the composite output signal SA delayed by τ by the delay line 45, and demodulates the second modulated output signal S2 component in the composite output signal SA delayed by τ with respect to the first demodulated output signal s1'. A delayed signal, that is, a second demodulated output signal 82' delayed by 2τ with respect to the input signal Sin, is obtained at the second signal output terminal 40C.

That is, in the embodiment configured as described above, one delay line 45 allows the first demodulated output signal S,' delayed by the delay amount τ of the delay [45] to the input signal. In contrast, a second demodulated output signal 82' delayed by twice the delay amount 2τ can be obtained. Therefore, in the embodiment described above, the delay circuit 40 in which the delay amount τ of the delay line 45 is IH can be used in place of the delay circuit 2 in the conventional example described above.

FIG. 5 shows a specific embodiment of the delay circuit 40 for vertical contour correction. That is, in the embodiment shown in Figure 1, the input luminance signal Yin is supplied from the signal input terminal 40A to the first amplitude modulator 44-A. This first amplitude modulator 4,1=-A modulates the carrier wave directly supplied from the carrier wave oscillator 4:2A using the input luminance signal YinK, and sends the first modulated output signal S1 to the first signal adder. 44A. The first signal adder 44A combines the first modulated output signal S1 with a second amplitude modulator 43B, which will be described later.
The combined output signal SA is supplied to the first signal demodulator 46A and the second signal demodulator 46B via the 1H delay line 45. The first signal demodulator 46A performs synchronous detection of the composite output signal SA based on the synchronization signal directly supplied from the synchronization signal oscillator 42B, thereby detecting the synchronization signal from the first amplitude modulator 43A. The first modulated output signal S1 is demodulated and the first delayed luminance signal YDLI is output. This first delayed luminance signal YDL□ is given a delay amount of 1H by the above 1■ delay net 45, and the input luminance signal Yi
It has a delay of 1H with respect to nlC.

The first delayed luminance signal YDLI obtained in this way is output from the first signal output terminal 40A, and
It is supplied to a clamp circuit 47. The first delayed luminance signal Yo clamped by this clamp circuit 47
r,+ are supplied to the sampling hold circuit 48 and the second signal adder 44B. The second signal adder 44B superimposes the phase reference signal Sφ supplied from the phase reference input terminal 40D on the first delayed luminance signal YDL□.

In this second signal addition 1iW44B, the first delayed luminance signal YDL1 as shown in FIG. 6, on which the phase reference signal Sψ is superimposed, is supplied to the second amplitude modulator 43B.

The second amplitude modulator 43B is connected to the carrier wave oscillator 4'.
The second modulated output signal S2 obtained by modulating the carrier wave supplied from lA through the first phase shifter 42A having a phase amount of 90° with the first delayed luminance signal YDLI is sent to the first signal adder 44AK. To share.

That is, in this embodiment as well, the first and second
The amplitude modulators 43A and 43B perform so-called orthogonal biaxial modulation in which carrier waves having a phase difference of 90 degrees are amplitude-modulated.

A second signal demodulator 46-A-, to which a composite signal SA obtained by adding and combining the modulated output signals S, S2, is supplied via a 1H delay line 45 (11), generates a synchronizing signal. A second phase shifter 4 with a phase shift amount of 90° from the device 44yB
The second modulated output signal S2 from the second amplitude modulator 43B is demodulated by synchronously detecting the composite signal SA based on the synchronization signal supplied via the second amplitude modulator 43B. From this second signal demodulator 46B, the first delayed luminance signal YDL□ is delayed by I■ by the 1H delay line 45, that is, by 2■ with respect to the input luminance signal Yin.
A second delayed luminance signal YD, , 2 is obtained having a delay of .

Here, the first and second signal demodulators 46A, 46
The synchronizing signal oscillator 42B that supplies the synchronizing signal to the synchronizing signal oscillator B is composed of a voltage-controlled oscillator, and the oscillation phase is controlled by the comparison output from the voltage comparator 49 as follows. The voltage comparator 49 has one comparison input terminal 49a supplied with the comparison reference voltage VR1F, and the other comparison input terminal 49b1 (the first delayed luminance signal YI by the sampling hold circuit 48) [,1]. A hold output voltage VI[ sampled and held at a predetermined position is supplied (12). The comparison reference voltage vREF supplied to the voltage comparator 491C is set equal to the clamp voltage in the clamp circuit 47. Further, the sampling and holding circuit 48 samples and holds a position corresponding to the phase reference signal Sφ superimposed on the first delayed luminance signal YDL8 in the second signal adder 44B. 1st
If the phase of the synchronous detection in the first signal demodulator 46A is correctly maintained, the first delayed luminance signal YDL demodulated by the signal demodulator 46A of the second amplitude modulator 43B is It does not include the demodulated signal component for the second modulated output signal S2. That is, the first delayed luminance signal YDL supplied to the sampling hold circuit 48,
does not include the phase reference signal Sφ when the phase of the synchronous detection in the first signal demodulator 43A is correct, so the clamp level is sampled and held by the sampling and holding circuit 48. Therefore, the hold output voltage VU from the sampling hold circuit 48 and the comparison reference voltage R equal to the clamp voltage
The voltage comparator 49, which compares the two signals, outputs a synchronizing signal of ¥4kn using its comparison output voltage so that the synchronized detection phase in the first signal demodulator 46A is correctly maintained by one step.
4:2 B's oscillation r☆ [phase can be controlled.

In this way, by shifting the synchronization for signal demodulation (the oscillation phase of the R signal oscillator 42B by L141), even if the delay 11Qj of the 111-delayed IA line 45 changes due to changes over time, each signal demodulator 46A, 46B ], ′− 1υ] detection is always performed stably.

Next eζ, FIG. 7 shows an example of a vertical contour correction circuit 50 constructed by applying the present invention.

In this embodiment, the input luminance signal Yin subjected to vertical contour correction is supplied to the first amplitude modulator 43A and the signal subtractor 51 from the signal input terminal +OA. This first amplitude modulator 43A is supplied directly from the oscillator 4.
The general transmission wave is modulated by the input luminance signal Yjn, and a first modulated output signal S□ is supplied to the first signal adder 44. The signal adder 44 at t4A1 demodulates the first modulated output signal S1 and a second output signal SA supplied from a second one-width modulator 43B, which will be described later, via a 1H delay line 45. 46A and a second signal demodulator 46B. The first signal demodulator 46A generates the synthesized output signal S based on the synchronization signal directly supplied from the oscillator 41.
By synchronously detecting A, the first amplitude modulator 4
The first modulated output signal S from 3A is demodulated and a delayed luminance signal YDL is output. This delayed luminance signal YDL
is given an IH delay amount by the 1H delay line 45, and has a delay of 11-( with respect to the input luminance signal Yin).

The delayed luminance signal YDL obtained in this way is supplied to the second signal adder 55, and is also supplied to the signal subtracter 51.
supplied to

Here, the delayed luminance signal YDL demodulated by the first signal demodulator 46A is applied to the input luminance signal Yin as shown in FIG. 8A, as shown in FIG. The IH delay amount is given by . Therefore, the signal subtractor 51 converts the human-powered luminance signal Yin to the delayed luminance signal Y. By subtracting L, a first vertical contour correction signal SCI as shown in FIG. 8C is formed. This first vertical contour correction signal S.

1 is supplied to the balance adjuster 53 and the second amplitude modulator 43A.

The second amplitude modulator 43B converts the carrier wave supplied from the oscillator 111 via the phase shifter 42 having a phase shift amount of 90 degrees into the first vertical contour correction signal S. A second modulated output signal modulated by 1 is supplied to the first signal adder 44.

That is, in this embodiment as well, the first and second amplitude modulators 43A and 43B perform so-called orthogonal biaxial modulation in which carrier waves having a phase difference of 90° are modulated in a fixed width manner.

Then, in the second signal demodulator 46B, to which a composite signal SA obtained by adding and combining the modulated output signals Sl and S2 is supplied via the IH delay line 45, The second modulated output signal portion from the second amplitude modulator 243B is demodulated by synchronously detecting the composite signal based on the synchronizing signal supplied via the phase modulator 42. A first vertical contour correction signal S is output from this second signal demodulator 46B. A signal in which 1 is delayed by IH by the 1H delay line 45 is obtained. The polarity of this signal is inverted via an inverter 52 to produce a second vertical contour correction signal S as shown in FIG. 2 is supplied to the balance adjuster 53.

The balance adjuster 53 is composed of, for example, a three-terminal variable resistor, that is, a podentiometer, and outputs a first vertical contour correction signal S. 1 and a second vertical contour correction signal S. A vertical contour correction signal S as shown in FIG. form P. Vertical contour correction signal S obtained in this manner. P is supplied to the second signal adder 55 via the level adjuster 9+, and is superimposed on the delayed luminance signal YDL in the second signal adder 55. Therefore, the output luminance signal Y is output from the second signal adder 55 to the signal output terminal 50B. ut can be arbitrarily and variably adjusted by the balance adjuster 53 as to the ratio of each overshoot and undershoot given to the position corresponding to the vertical contour of the image, that is, the amount of vertical contour correction.

As is clear from the description of each of the embodiments described above, according to the present invention, a pair of modulation means performs orthogonal biaxial modulation using carrier waves having a phase difference of 90° from each other, and each modulation output signal from each modulation means is a signal synthesizing means for adding and synthesizing; a delay means for delaying the synthesized output signal from the signal synthesizing means;
a pair of demodulation means corresponding to the pair of modulation means, each demodulating a delayed output signal from the delay means, and the input signal supplied to one of the modulation means is only delayed by the delay means. The delayed first output signal is outputted from the demodulation means corresponding to the one modulation means, and the first output signal is supplied to the other modulation means, and the first output signal is outputted from the demodulation means corresponding to the modulation means. By using a delay circuit that is characterized in that it outputs a second output signal that is delayed by twice the delay amount above with respect to the signal, the delay amount of the delay line and the delay amount of the delay line can be reduced by one delay line. A delay circuit that is twice as slow and is optimal for vertical contour correction can be provided at a low price.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional example of a vertical contour correction circuit. FIG. 2 is a time chart for explaining the operation of the conventional example. FIG. 3 is a block diagram showing one embodiment of the delay circuit according to the present invention. The fourth sinus is a vector diagram for explaining the operation of each amplitude modulator in the above embodiment. FIG. 5 is a block diagram showing a specific embodiment of a delay circuit for vertical contour correction to which the present invention is applied. FIG. 6 is a waveform diagram showing the input signal of the second amplitude modulator in the above embodiment. FIG. 7 is a block diagram showing an embodiment of a vertical contour correction circuit constructed according to the present invention. FIG. 8 is a time chart for explaining the operation of the above embodiment. 40... Delay circuit 40A - life/signal input terminal 40B, 40C building... signal output terminal 41 r 41 A s 41 B-day/oscillator 421
42A, 42B...Possible phase shifter 43A, 43B--Amplitude modulator 44.44A, 44B...Signal adder 45...Delay line 46A, 46B...Signal core adjuster Patent applicant Sony Corporation Company agent Patent attorney Kodo Koike 1) Sakae Mura - Elephant ≧ U OLLI 口 -

Claims (1)

[Claims] A pair of modulation means that performs orthogonal biaxial modulation using carrier waves having a phase difference of 90 degrees from each other, a signal synthesis means that adds and synthesizes each modulated output signal from each modulation means, and a synthesis power signal from the signal synthesis means. a pair of demodulation means corresponding to the pair of modulation means, each demodulating a delayed output signal from the delay means, and for an input signal supplied to one of the modulation means; A first output signal delayed by the amount of delay by the delay means is outputted from a demodulation means corresponding to the one modulation means, and the first output signal is supplied to the other modulation means to correspond to the modulation means. A delay circuit characterized in that the demodulation means outputs a second output signal delayed by 21 of the delay amount with respect to the input signal.