JPS588992U - Mounting structure of electronic equipment - Google Patents

Mounting structure of electronic equipment

Info

Publication number
JPS588992U
JPS588992U JP10256181U JP10256181U JPS588992U JP S588992 U JPS588992 U JP S588992U JP 10256181 U JP10256181 U JP 10256181U JP 10256181 U JP10256181 U JP 10256181U JP S588992 U JPS588992 U JP S588992U
Authority
JP
Japan
Prior art keywords
mounting structure
electronic equipment
printed wiring
packages
wiring boards
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10256181U
Other languages
Japanese (ja)
Inventor
明彦 石川
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP10256181U priority Critical patent/JPS588992U/en
Publication of JPS588992U publication Critical patent/JPS588992U/en
Pending legal-status Critical Current

Links

Landscapes

  • Combinations Of Printed Boards (AREA)
  • Mounting Of Printed Circuit Boards And The Like (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例におけるパターン密度を示す特性図、第
2図は本考案の実施例を示す斜視図、第3図は従来例に
おけるプリント配線板のプリント配線を示すパターン図
、第4図は従来例におけるプリント配線板のパターン密
度を示す特性図、第5図は本考案の実施例におけるプリ
ント配線を示すパターン図、第6図は本考案の実施例に
おけるプリント配線板のパターン密度を示す特性図であ
る。 10.20・・・・・・プリント配線板、101〜1O
N、201〜2ON・・・・・・パッケージ、30゜4
0・・・・・・ケーブル。
Fig. 1 is a characteristic diagram showing the pattern density in the conventional example, Fig. 2 is a perspective view showing the embodiment of the present invention, Fig. 3 is a pattern diagram showing the printed wiring of the printed wiring board in the conventional example, and Fig. 4 is A characteristic diagram showing the pattern density of the printed wiring board in the conventional example, FIG. 5 is a pattern diagram showing the printed wiring in the embodiment of the present invention, and FIG. 6 is a characteristic diagram showing the pattern density of the printed wiring board in the embodiment of the present invention. It is a diagram. 10.20...Printed wiring board, 101-1O
N, 201~2ON・・・Package, 30゜4
0...Cable.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電子回路を搭載した複数のパッケージと、該パッケージ
を複数枚実装する2枚のプリント配線板と、該プリント
配線板両端を相互に接続する2組゛   のケーブルと
を有し、前記パッケージ間の信号線を前記プリント配線
板と前記ケーブルとにより接続することを特徴とする電
子機器の実装構造。
It has a plurality of packages equipped with electronic circuits, two printed wiring boards on which the plurality of packages are mounted, and two sets of cables interconnecting both ends of the printed wiring boards, and a signal between the packages is provided. A mounting structure for an electronic device, characterized in that a wire is connected by the printed wiring board and the cable.
JP10256181U 1981-07-10 1981-07-10 Mounting structure of electronic equipment Pending JPS588992U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10256181U JPS588992U (en) 1981-07-10 1981-07-10 Mounting structure of electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10256181U JPS588992U (en) 1981-07-10 1981-07-10 Mounting structure of electronic equipment

Publications (1)

Publication Number Publication Date
JPS588992U true JPS588992U (en) 1983-01-20

Family

ID=29897205

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10256181U Pending JPS588992U (en) 1981-07-10 1981-07-10 Mounting structure of electronic equipment

Country Status (1)

Country Link
JP (1) JPS588992U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51104567A (en) * 1975-03-11 1976-09-16 Mitsubishi Electric Corp Keisankiniokeru purintokaadotoritsukeho
JPS5292361A (en) * 1976-01-29 1977-08-03 Tokyo Shibaura Electric Co Method of mounting substrates
JPS5467674A (en) * 1977-11-09 1979-05-31 Oki Electric Ind Co Ltd Electronic device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51104567A (en) * 1975-03-11 1976-09-16 Mitsubishi Electric Corp Keisankiniokeru purintokaadotoritsukeho
JPS5292361A (en) * 1976-01-29 1977-08-03 Tokyo Shibaura Electric Co Method of mounting substrates
JPS5467674A (en) * 1977-11-09 1979-05-31 Oki Electric Ind Co Ltd Electronic device

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