JPS5883829U - Monostable multivibrator circuit - Google Patents

Monostable multivibrator circuit

Info

Publication number
JPS5883829U
JPS5883829U JP17793181U JP17793181U JPS5883829U JP S5883829 U JPS5883829 U JP S5883829U JP 17793181 U JP17793181 U JP 17793181U JP 17793181 U JP17793181 U JP 17793181U JP S5883829 U JPS5883829 U JP S5883829U
Authority
JP
Japan
Prior art keywords
monostable multivibrator
circuit
multivibrator circuit
monostable
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17793181U
Other languages
Japanese (ja)
Inventor
梶川 征毅
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP17793181U priority Critical patent/JPS5883829U/en
Publication of JPS5883829U publication Critical patent/JPS5883829U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の単安定マルチバイブレータ回路を示す図
、第2図は本考案の単安定マルチバイブレータ回路の1
例を示す図である。 1・・・・・・出力端子、2・・・・・・トリガ入力端
子、4・・・・・・電源リターシ端子、Q□、Q2・・
・・・・トランジスタ、D工、 D2. D3・・・・
・・ダイオード、C□・・・・・・コンデンサ。
Figure 1 shows a conventional monostable multivibrator circuit, and Figure 2 shows one of the monostable multivibrator circuits of the present invention.
It is a figure which shows an example. 1... Output terminal, 2... Trigger input terminal, 4... Power retardation terminal, Q□, Q2...
...Transistor, D engineering, D2. D3...
...Diode, C□...Capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] トランジスタを使用した単安定マルチバイブレーク回路
において、非安定側トランジスタのコレクタに、E−B
間道バイアスブレークダウン防止回路及び温度補償回路
を備えたことを特徴とする単安定マルチバイブレータ回
路。
In a monostable multi-by-break circuit using transistors, E-B is connected to the collector of the non-stable transistor.
A monostable multivibrator circuit characterized by being equipped with a bias breakdown prevention circuit and a temperature compensation circuit.
JP17793181U 1981-11-30 1981-11-30 Monostable multivibrator circuit Pending JPS5883829U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17793181U JPS5883829U (en) 1981-11-30 1981-11-30 Monostable multivibrator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17793181U JPS5883829U (en) 1981-11-30 1981-11-30 Monostable multivibrator circuit

Publications (1)

Publication Number Publication Date
JPS5883829U true JPS5883829U (en) 1983-06-07

Family

ID=29972260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17793181U Pending JPS5883829U (en) 1981-11-30 1981-11-30 Monostable multivibrator circuit

Country Status (1)

Country Link
JP (1) JPS5883829U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49104553A (en) * 1973-02-06 1974-10-03
JPS5620903B2 (en) * 1977-01-17 1981-05-16

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49104553A (en) * 1973-02-06 1974-10-03
JPS5620903B2 (en) * 1977-01-17 1981-05-16

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