JPS588332A - Power supply interruption controlling method for computer - Google Patents

Abstract

PURPOSE:To avoid the interruption of power supply during job and to prevent useless power consumption, by executing a power supply interruption program after all jobs to be executed at least are finished. CONSTITUTION:A binary-coded decimal signal from a clock CLK incorporated into a computer passes through various decoders DEC and the signal is outputted in a predetermined time as a reference time. A monostable multivibrator MM1 is energized with a time corresponding to the designated time and an interruption signal inversion INT is given to a computer main body. When the computer receives this signal INT, the program jumps to a program discriminating whether or not the jobs are finished and when the jobs are finished, the power supply for the entire computer is interrupted. On the other hand, if the jobs are not finished, the computer returns to the original job and executes it. If the power supply is not interrupted, the signal INT is generated again after a specified time to discriminate the presence/absence of the jobs. This operation is repeated to the end of the job.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power cutoff control method for automatically cutting off the power to a computer when the computer is not in use (particularly at night).

In the case of large computers, the equipment is very expensive, so they are used day and night to increase the operating rate, but with small computers such as office computers, , it is not used at night.When a calculator runs a large job or multiple jobs in succession, its end time is often at night, but an operator is unnecessary during the execution of such jobs. Therefore, operators usually go home with their computers running.

Therefore, the computer ends its job execution at night in an unattended state, and after that, power continues to be supplied for a long time even though the computer does not perform any useful processing. This not only wastes power, but also
This means that the drive unit of the external storage device (disk device) must continue to operate, which shortens the life of the device. For this reason, conventionally, power to computers is supplied via a timer, and the required time, which is predicted by calculation, is set in the timer to automatically shut off the power even at night.

However, with these conventional methods, the predicted required time does not necessarily match the actual time, and especially if the timer is set to a shorter time than the actual required time, Not only will the power be cut off, forcing you to perform the same job again the next day, but in the worst case scenario, the program in the external storage device will also be destroyed.

An object of the present invention is to automatically turn off the power to a computer when a job is completed during unattended conditions such as at night, thereby eliminating unnecessary power consumption and reducing fatigue caused by continuous use of the computer. .

In order to achieve the above object, in the present invention, at least after confirming that all jobs to be executed have been completed,
Execute the power shutdown program to shut off the power to the computer and peripheral devices.

FIG. 1 is a circuit diagram showing one device configuration for implementing the present invention.

To give an overview of the operation of this circuit, BCD (pinary coded decimal) signals from each digit of 10:09 and 10 minutes from the clock CLK installed in the computer are passed through various decoders, and the A signal is output at each predetermined time, and one of these signals corresponding to the time specified by the switch activates the monomulti MMI and provides an interrupt signal INT to an interrupt input terminal of the computer main body (not shown). The computer body uses this interrupt signal INT
When it receives a message, it jumps to a program that determines whether all jobs have finished, and if they have, it executes a power-down sequence and finally shuts off the power to the entire computer. If it is determined that the job has not finished,
The computer returns to the original job and executes it. If the power is not cut off, the circuit of FIG. 1 will generate the interrupt signal INT again after 8 minutes to determine the presence or absence of a job. If the power is not cut off even after this, an interrupt signal I is sent every 10 minutes.
A program is executed that generates NT and determines whether there is a job each time. Next, this circuit will be explained in detail. Inverter IN, IN2 and Android) A
N, , AN2 are for decoding the 10 o'clock digit, and AND gates ANI and AN2 output logic 1 when they are "1" and "2", respectively. Decoder DE
C (BCD-decimal decoder) and inverter I
Ns, I N4- I Ns and IN decode the 1 o'clock digit, and inverters I N,, I
N,, I N.

and IN, are r4J, r3j, rlJ, respectively
and "o", the output becomes logic "1". Inverter IN.

ANS and AN4 are for decoding digits corresponding to 1o, and AND gates AN and AN output logic "1" when rOJ and "3", respectively. 3-person Nando game) NA, ~N
Since A decodes eight reference times, the switches S, , S2 and S3 connected to these outputs
The designated time changes as shown in Table 1 depending on the state.

At the time specified in Table 1 (20:30 in the illustrated state), the input of inverter IN9 becomes logic O, so its output becomes logic 1, energizes the mono multi-MMI, and outputs the mono-multi MMI. The one-shot pulse that appears at the gate passes through the NOR gate NR and becomes the logic Q interrupt request signal INT. On the other hand, Nant Gate NA, and NA,. The R/S flip 70 tube, which is made up of becomes logic 1. When 8 minutes have passed in this state, the MSB of the 1 minute digit of the clock CLK
(the bit corresponding to the 8th minute) becomes logic 1, and the output of the AND gate AN also becomes logic 1, energizing the monomulti MM2 and generating the interrupt request signal INT. Thereafter, the monomulti MM2 is activated every time MsB in the 1 minute digit changes from logic 0 to logic 1, and outputs the interrupt request signal INT each time.

Next, the power down sequence will be explained with reference to the flowchart shown in FIG. Although not shown, it is assumed that various peripheral devices and a computer are connected to a power source via a relay, and these power sources can be turned off under control from the computer.

5TEP-1 Determine whether there is any data or program in the main memory of the computer that you do not want to erase. (Input reference data before executing the job, and make a judgment based on this.) STEP-2 Since there is data in the main memory that you do not want to erase, transfer it to an external storage device such as a disk device and store it. let

5TEP-3 Even if the peripheral devices (printer, disk device, communication terminal device, etc.) are disconnected from the computer (CPU) and the power is turned off, printing errors and data on the disk may be destroyed.

Put each device in a write-protected state to prevent malfunctions such as transmission of erroneous information.0 8TEP-4 To prevent the computer from malfunctioning due to power off of the peripheral devices, electrically connect the signal lines between the peripheral devices and the computer. to separate.

5TEI”5 Turn off the power to each peripheral device.

5Turn off the power to the TEP-6 computer.

Next, another embodiment of the present invention will be described.

In the above embodiment, an interrupt request is generated when the time condition is satisfied, but in this embodiment, it is first determined whether the job has ended, and then it is determined whether the time condition is satisfied. .

Generally, computers such as office computers operate on an operating system O8 consisting of various programs. O8 has a control program.

Includes processing programs, utility programs, package programs, etc. The control program is 8-
It performs hardware management, task management, data management, job management, communication management, etc., and when executing a general job, processing is performed while being managed by this control program. Therefore, in order to determine whether or not a job has been completed, the program may be inserted into the control program.

The control program is written from an external storage device into the computer's main storage and executed as needed, so after setting a job, an external operation (for example, input from the keyboard) can cause the control program to be written to the computer's main storage. Write an instruction to jump to a time check sequence, which will be described later, to the address that the control program passes when the job ends.

The time check sequence will be explained with reference to the flowchart shown in FIG.

5TEP-7 Check whether or not the automatic power shutoff mode is specified. If it is specified, go to the next step; if not, return to the original control program. This mode designation can be checked by reading the switch status or pre-stored data.

5TEP-8 Specified time T at which power should be cut off. Read.

This time T. contains the following three pieces of information: ToHH
: Information about "r o'clock at the beginning of To" (for example, 20 o'clock, T
oM: At the beginning of To, "minute information (for example, 30 minutes)"
.

T6 It, : Information on the end time of To (for example, 6
STEP-9 Read the current time TR from the clock connected to the main computer. The time TR includes -information TRH of "r hours" and information TRM of "minutes J."

5TEP~10 TaH and T. TRH compared to HK
If is large, the specified time has passed and the power down sequence is executed. (Between the specified time and 24:00) STEP-11TnH and T. Check whether HH are equal.

Since the designated time and the current time are the same, the information for ``5TEP-12r'' is 1 minute'' information TRM and T. Compare M. If both are equal or TRM is large, a power down sequence is executed, otherwise the original control program is returned.

Since the value of 5TEP-13:00 J is smaller at the current time than at the designated time, it is checked whether it is between 0:00 (midnight) and the end of the designated time. If ToHL is greater than TRH, execute the power down sequence; otherwise, return to the original control program.

The embodiment described above has a first state in which the automatic power cutoff mode is specified, a second state in which all jobs have been executed, and a third state in which the clock time is equal to or exceeds a pre-specified time. Although the description has been made assuming that the power is cut off once when all of the states are satisfied, the power may be cut off when the first state and the second state are satisfied. In this case, the final person checking the computer may specify the automatic power shutoff mode if the job has not been completed. Further, the power may be cut off when the second state and the third state are satisfied. In this case, it may be specified that the power is cut off when the third state is reached at an arbitrary time. Furthermore, if the power is cut off when the second state and either the first or third state are satisfied, either of the above two conditions can be selected.

Note that the power down sequence described in the embodiment.

Time check sequence and various data etc. are in ROM
It is preferable to store it in a read-only format.

As described above, according to the present invention, the power to the computer is shut off after confirming the end of the job, so there is no possibility that the power will be shut off while the job is being executed, and moreover, the minimum amount of time will elapse after the job ends. Since the power can be shut off without fail, unnecessary power consumption can be prevented.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing the configuration of one device implementing the present invention, Fig. 2 is a flowchart showing one embodiment of the power down sequence of the present invention, and Fig. 3 is an implementation of the time check sequence of the present invention. 3 is a flowchart showing an example. S: Time designation switch (for Saturdays) S2: Time designation switch (for weekdays) S, 2 designation switch f line 2 interrupt request signal Figure 2 Figure 3

Claims (1)

[Claims] (1) A first state in which the automatic power cutoff mode is specified; A second state in which all job execution has been completed; The time on the clock is equal to or exceeds the pre-specified time. Third state: A power cutoff control method for a computer, which executes a power cutoff program to automatically cut off the power to the computer when the second state and at least one of the first and third states are satisfied. (2) A power cutoff control method that includes a first state in which the automatic power cutoff mode is designated and a second state in which all job execution has been completed. (3) When the second state in which all job execution has been completed and the third state in which the clock time is equal to or exceeds the pre-specified time are satisfied. (4) The first power supply specified for automatic power cutoff mode.
State; Second state in which all job execution has been completed; Third state in which the clock time is equal to or exceeds the pre-specified time; When all of the following conditions are satisfied, the power cutoff program (5)
Claim 11 generates an interrupt request to the computer when the clock time reaches a pre-specified time, and thereafter generates an interrupt request at specific times.
2. A power cutoff control method for a computer according to item (3) or item (4). (6) Claims (1), (3), or (2) set the specified start time and specified end time, assuming that the time specified in advance defines a specific range.
Power cutoff control power in the computer described in Section 4) 7 Method.