JPS5883238A - Method and device for detection of surface defect of object - Google Patents

Method and device for detection of surface defect of object

Info

Publication number
JPS5883238A
JPS5883238A JP18195581A JP18195581A JPS5883238A JP S5883238 A JPS5883238 A JP S5883238A JP 18195581 A JP18195581 A JP 18195581A JP 18195581 A JP18195581 A JP 18195581A JP S5883238 A JPS5883238 A JP S5883238A
Authority
JP
Japan
Prior art keywords
signal
delay
electrical signal
circuit
scanning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18195581A
Other languages
Japanese (ja)
Other versions
JPH0225451B2 (en
Inventor
Toshihiko Omichi
大道 俊彦
Yoshikazu Ikeki
池木 美一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koyo Seiko Co Ltd
Koyo Automatic Machine Co Ltd
Original Assignee
Koyo Seiko Co Ltd
Koyo Automatic Machine Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koyo Seiko Co Ltd, Koyo Automatic Machine Co Ltd filed Critical Koyo Seiko Co Ltd
Priority to JP18195581A priority Critical patent/JPS5883238A/en
Publication of JPS5883238A publication Critical patent/JPS5883238A/en
Publication of JPH0225451B2 publication Critical patent/JPH0225451B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination

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  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)

Abstract

PURPOSE:To detect the surface detects of objects accurately and easily by delaying the delay signals obtained by delaying electric signals by at least one scanning, further with plural stages of delay elements, adding and averaging the outputs of the respective delay elements, and comparing the electric signals under scanning with the added and averaged signal. CONSTITUTION:The electric signal E1 from a photoelectric converter 100 is amplified with an amplifier 101 which outputs a video signal E2. The signal E2 is inputted to a comparator 103 and a delay circuit 104. The circuit 104 is constituted by cascade connection of (n) pieces of delay elements d1-dn. One piece of the element di (i=1-n) can delay the signal E2 by as much as one scanning from the current rotary slit to the next rotary slit. The signal E2 is delayed by as much as (n) scanning with the delay circuit 104. The delay signal F via the circuit 104 is further inputted to a delay circuit 105 and total N pieces of delay signals G1-GN are drawn out individually from N pieces of delay elements D1-DN, and are inputted to an adder 106. The adder 106 adds the received signals G1-GN, and outputs the average value thereof from its output part. The output is inputted to a comparator 103, whereby the influence upon the average value signal is decreased and fine defects are detected.

Description

【発明の詳細な説明】 本発明は、物体の表面欠陥の検出方法とその装置に係り
、特には、主に金属加工物の表面キズ等の欠陥を光電子
増倍管等の光電変換器を利用して電気信号に変換して検
出する方法とその方法の実施に使用する装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method and apparatus for detecting surface defects on an object, and in particular, to detecting defects such as surface scratches on a metal workpiece using a photoelectric converter such as a photomultiplier tube. The present invention relates to a method of detecting electrical signals by converting them into electrical signals, and a device used to carry out the method.

このような検出方法の先行技術が、特開昭55−667
40号公報において開示されている。この先行技術は、
第1図に示すように、光源lと集光レンズ2とからなる
照明光学系を介して、例えば円筒状の被検物3の表面を
均一に照明し、ハーフミラ−4、結像レンズ5、集光レ
ンズ6等の結像光学系を介して被検物3の実像を光電子
増倍管9等の光電変換手段の前面に結像させ、結像光学
系における固定スリット6、回転スリット7等からなる
走査機構によって、固定スリット6を通過した被検物3
の実像を走査して、その実像に係る光を光電子増倍管9
によって電気信号に変換し、そして、この電気信号を第
2図に示すような電気回路に入力させて、被検的表面の
欠陥の有無を判定検出するものである。次に、第2図に
示される先行技術の電気回路の構成および動作を説明す
る。上述したようにして、被検物の実像に係る光を受光
してこれを電気信号に変換する、光電子増倍管9等を含
めて構成される光電変換部10からその電気信号が出力
される。その電気信号は増@器11で増幅される。増幅
器11で増幅された電気信号Aの波形には、被検物の表
面欠陥や、表面欠陥ではない仕上げ粗さ等の被検物の表
面の微細構造にしたがって、第3図に示すように、周波
数成分の高い信号が含まれている。
The prior art of such a detection method is disclosed in Japanese Patent Application Laid-Open No. 55-667.
It is disclosed in Publication No. 40. This prior art is
As shown in FIG. 1, the surface of, for example, a cylindrical test object 3 is uniformly illuminated through an illumination optical system consisting of a light source 1 and a condensing lens 2, and a half mirror 4, an imaging lens 5, A real image of the object 3 is formed on the front surface of a photoelectric conversion means such as a photomultiplier tube 9 through an imaging optical system such as a condensing lens 6, and a fixed slit 6, a rotating slit 7, etc. in the imaging optical system are formed. The object 3 passed through the fixed slit 6 by a scanning mechanism consisting of
scans the real image of
This electrical signal is then input into an electrical circuit as shown in FIG. 2 to determine and detect the presence or absence of defects on the surface to be inspected. Next, the configuration and operation of the prior art electric circuit shown in FIG. 2 will be explained. As described above, the electrical signal is output from the photoelectric conversion unit 10 including the photomultiplier tube 9 and the like, which receives light related to the real image of the object and converts it into an electrical signal. . The electrical signal is amplified by an amplifier 11. The waveform of the electrical signal A amplified by the amplifier 11 has the following characteristics, as shown in FIG. Contains signals with high frequency components.

一方、この電気信号Aをローパスフィルタ12に通すと
、前記被検物の表面の微細構造に起因する高周波数成分
の信号のとり除かれた信号Bが、得られる。ところで、
ローパスフィルタ12は、被検的表面の欠陥の有無を判
定するための電気信号Bを発生させるために増幅器11
の後段に挿入されるのであるが、ローパスフィルタ自体
の有する周波数カット特性等によってもとの電気信号A
号Aと比較して、被検的表面の欠陥の有無判定用信号と
して利用することができないおそれがある。
On the other hand, when this electric signal A is passed through a low-pass filter 12, a signal B is obtained in which high frequency component signals caused by the fine structure of the surface of the object to be inspected are removed. by the way,
The low-pass filter 12 connects the amplifier 11 to generate an electrical signal B for determining the presence or absence of defects on the surface to be inspected.
It is inserted in the latter stage, but due to the frequency cut characteristics of the low-pass filter itself, the original electrical signal A
Compared to No. A, there is a possibility that it cannot be used as a signal for determining the presence or absence of defects on the surface of the object to be inspected.

このため、先行技術の回路では、この遅れを防止するた
めにζ遅延回路13を比較回路14とローパスフィルタ
12との間に挿入し、この遅延回路13を介することに
よって、もとの電気信号Aと位相の一致した電気信号C
を作り、この電気信号Cともとの電気信号Aとを比較回
路14で比較して、被検的表面の欠陥の有無を判定して
いた。ところが、このような構成の先行技術の電気回路
にあっては、第3図に示すように、もとの電気信号Aに
含まれている被検的表面の欠陥に対応する電気信号AO
が回転スリット7が現在走査している被検的表面に関し
ての成るレベルから、次の回転れる電気信号Cの電気信
号AOに対応する電気信号COも、前回の・走査による
信号から処理された信号であるが故に第3図の電気信号
GO1〜C05に示すように、徐々にそのレベルを上昇
させてゆく。
Therefore, in the circuit of the prior art, in order to prevent this delay, a ζ delay circuit 13 is inserted between the comparator circuit 14 and the low-pass filter 12, and the original electrical signal A is passed through the delay circuit 13. electrical signal C that is in phase with
This electrical signal C is compared with the original electrical signal A by a comparison circuit 14 to determine whether there is a defect on the surface to be inspected. However, in the prior art electrical circuit having such a configuration, as shown in FIG. 3, the electrical signal AO corresponding to the defect on the surface to be inspected contained in the original electrical signal A
The electrical signal CO corresponding to the electrical signal AO of the electrical signal C rotated next from the level with respect to the test surface currently being scanned by the rotating slit 7 is also a signal processed from the signal from the previous scan. Therefore, as shown in the electrical signals GO1 to C05 in FIG. 3, the level is gradually increased.

その結果、被検的表面の欠陥に対応する電気信号AOの
レベルが、電気信号COのレベル以下のままになり1.
比較回路14において、もとの電気信号Aに含まれる電
気信号AOを電気信号Cと比較することによって、被検
的表面の欠陥の有無を判定させることができない。また
、電気信号Cは、ローパスフィルり12′fI:通過し
た信号であるので、第3図のD 、6における電気信号
Cの部分が、ローパスフィルタ12を構成するコンデン
サ、抵抗などにより定まる時定数の関係から、滑らかに
なりすぎ、このためにもとの電気信号への周辺部分に含
まれることのある被検的表面の欠陥に対応する欠陥の多
様性のために、非常に広範囲な周波数にわたる場合があ
り、このような場合ローパスフィルタ明の目的は、上述
の技術的課題を解決し、容易かつ正確に被検的表面の欠
陥の有無を検出することのできる検出方法およびその装
置を提供することである。
As a result, the level of the electrical signal AO corresponding to the defect on the surface to be inspected remains below the level of the electrical signal CO; 1.
In the comparison circuit 14, the presence or absence of a defect on the surface to be inspected cannot be determined by comparing the electrical signal AO included in the original electrical signal A with the electrical signal C. Furthermore, since the electric signal C is a signal that has passed through the low-pass filter 12'fI, the portion of the electric signal C at D and 6 in FIG. over a very wide range of frequencies due to the diversity of defects corresponding to defects on the surface to be examined that may be too smooth and therefore included in the peripheral part to the original electrical signal. In such cases, the purpose of using a low-pass filter is to solve the above-mentioned technical problems and provide a detection method and device that can easily and accurately detect the presence or absence of defects on the surface to be inspected. That's true.

第4図は、本発明の実施例の信号処理回路プロツク図で
ある。本発明の実施例においては、被検物表面を照明す
る照明光学系、被検物の実像を結像させる結像光学系、
その実像に係る光を電気信号に変換する光電変換系、並
びに走査機構は、上述した第1図におけるものであって
良い。特に、光電変換系および走査機構の他の例として
、撮像管、等を用いても良いことは本発明の実施例の記
載から明らかである。被検物表面の実像に係る光を電気
信号に変換する光電変換器100からその電気信号(以
下、映像信号という)E+が出力される。増幅器101
は、映像信号E−を増幅して映像信号E2を出力する。
FIG. 4 is a block diagram of a signal processing circuit according to an embodiment of the present invention. In the embodiments of the present invention, an illumination optical system that illuminates the surface of the test object, an imaging optical system that forms a real image of the test object,
The photoelectric conversion system that converts the light related to the real image into an electrical signal and the scanning mechanism may be those shown in FIG. 1 described above. In particular, it is clear from the description of the embodiments of the present invention that an image pickup tube or the like may be used as other examples of the photoelectric conversion system and the scanning mechanism. An electrical signal (hereinafter referred to as a video signal) E+ is output from a photoelectric converter 100 that converts light related to a real image of the surface of the object into an electrical signal. Amplifier 101
amplifies the video signal E- and outputs the video signal E2.

映像信号E・2には、第3図の電気信号Aと同様にして
、被検物表面の欠陥、仕上げ粗さ等の被検物表面の微細
構造にしたがった周波数成分の高い信号が乗っている。
Similar to the electrical signal A in Fig. 3, the video signal E-2 contains a signal with a high frequency component according to the fine structure of the object surface, such as defects and finishing roughness on the object surface. There is.

このような映像信号E2は、比較回路103に入力され
るとともに、遅延回路104にも入力される。
Such a video signal E2 is input to the comparison circuit 103 and also to the delay circuit 104.

遅延回路104は、映像信号E2を遅延させるための遅
延素子(例えば、松下電子株式会社製のBBD)d+〜
dnを、第5図に示すように複数個、本件実施例ではn
個、・縦続接続して構成される。1個の遅延素子di(
1=1〜n)は、映像信号E2′fr:、現在の回転ス
リットから次の回転スリットに到るまでの1走査分、遅
延させることのできるものであり、したがって、映像信
号E2は、遅延回路104を介することによって、n走
査分、遅延させられる。このようにして、遅延回路10
4を介した映像信号(この場合の信号は、以下、遅延信
号という)Fは、更に遅延回路104と同様回路105
を構成するN個の遅延素子D1〜DNの各々から合計N
個の遅延信号01〜GNが個別的に取り出される。これ
らの遅延信号01〜GNの各々は、加算器106に個別
的に入力される。
The delay circuit 104 includes delay elements (for example, BBD manufactured by Matsushita Electronics Co., Ltd.) d+~ for delaying the video signal E2.
dn, as shown in FIG.
Consists of cascade connections. One delay element di(
1=1 to n) is a video signal E2'fr:, which can be delayed by one scan from the current rotation slit to the next rotation slit. Therefore, the video signal E2 is By passing through the circuit 104, it is delayed by n scans. In this way, the delay circuit 10
4 (the signal in this case is hereinafter referred to as a delayed signal) F is further connected to a circuit 105 similar to the delay circuit 104.
A total of N from each of N delay elements D1 to DN constituting
The delayed signals 01 to GN are individually taken out. Each of these delayed signals 01-GN is individually input to adder 106.

加算器106は、受信したこれらの遅延信号01〜GN
f:加算し、出力部からその平均値を出力する。この結
果、加算器106の出力は、N回走査分の遅延信号の平
均値を出力することになり、更にこの出力は、ゲイン設
定器107に入力されて、ゲインを設定でれた後、比較
回路10gに入力される。なお、本件実施例においては
、遅延時間が、回転スリットの回転速度に対応して設定
され、このために回転スリットに回転むらがあればその
遅延時間の正確な設定をすることが困難になる。そこで
、これを避けてもとの映像信号と遅延信号との同期をと
るために回転スリットの回転速度の変化に対応して光電
変換器100から、同期信号Hをフリップフロップ回路
108に入力し、このフリップフロップ回路108のフ
リップフロップ出力を破線で囲むPLL (フェーズド
ロックループの略称)@路109に入力し、そのPTI
、L回路109の出力を遅延回路104および105に
入力している。このPLL回路109は、位相比較回路
110、ローパスフィルタ111、電圧制御発振器11
2、およびカウンタ113からなる公知のものである。
The adder 106 receives these delayed signals 01 to GN.
f: Add and output the average value from the output section. As a result, the output of the adder 106 is the average value of the delayed signals for N scans, and this output is further input to the gain setter 107 to set the gain, and then compared. It is input to circuit 10g. In this embodiment, the delay time is set in accordance with the rotational speed of the rotating slit, and therefore, if the rotating slit has uneven rotation, it becomes difficult to accurately set the delay time. Therefore, in order to avoid this and synchronize the original video signal and the delayed signal, a synchronization signal H is input from the photoelectric converter 100 to the flip-flop circuit 108 in response to the change in the rotation speed of the rotating slit. The flip-flop output of this flip-flop circuit 108 is inputted to a PLL (abbreviation for phased lock loop) @ path 109 surrounded by a broken line, and its PTI
, the outputs of the L circuits 109 are input to delay circuits 104 and 105. This PLL circuit 109 includes a phase comparison circuit 110, a low-pass filter 111, a voltage controlled oscillator 11
2 and a counter 113.

なお、カウンタ113の出カバ、一旦PLL回路109
の外部にあるフリップフロップ回路114に入力された
後、位相比較回路110に入力されるとともに、電圧制
御発振器112の出力がPLL回路109の出力として
遅延回路104および105に入力されるように構成さ
れている。このようにして、PLL回路109このよう
にして構成される上述の電気回路においては、増幅器1
01と比較器103との間に、被検物表面の欠陥の有無
の判定検出のために、ローパスフィルタを使用せずに、
遅延回路104および105’ii使用しているので、
映像信号E2に含まれている、各走査毎の被検物表面の
欠陥に対応する信号E21〜E25が、第8図に示すよ
うに、ることが少なく、したがって比較回路103にお
いては、映像信号E2に含まれる前記信号E2+〜E2
5を、平均値信号Iと比較して検出することが可能とな
る。
Note that the output of the counter 113 is temporarily
After being input to a flip-flop circuit 114 located outside of ing. In this manner, the PLL circuit 109 and the above-mentioned electric circuit configured in this manner have the amplifier 1
01 and the comparator 103, without using a low-pass filter, in order to detect the presence or absence of defects on the surface of the test object.
Since delay circuits 104 and 105'ii are used,
As shown in FIG. 8, the signals E21 to E25 corresponding to defects on the surface of the object to be inspected for each scan, which are included in the video signal E2, are rarely present, and therefore, in the comparison circuit 103, the video signals The signals E2+ to E2 included in E2
5 can be detected by comparing it with the average value signal I.

第6図は、本発明Ω他の実施例の回路ブロック図であり
、第4図と類似し対応する部分には同一の参照符が付さ
れている。注目すべきは、増幅器101と比較回路10
3との間に、遅延回路104および105が挿入される
とともに、第7図で示す遅延回路104を構成する各遅
延素子d1〜clnの各々が個別的に加算器106に入
力接続されており、更に遅延回路104内の最終段の遅
延素子dnが次段の遅延回路105内の最初の遅延素子
D1に接続され、遅延回路105内の最終段の遅延素D
Nはそのまま比較回路103に入力接続されていること
である。加算器106はゲイン設定器107を介して比
較回路103に接続されている5ぺは、第4図と同様で
ある。したがって、このような構成を有する本件実施例
の電気回路においては、映像信号E2は、遅延回路10
4において、各遅延素子d1〜dnからそのまま加算器
106で先に加算されn回走査分の映像信号の平均値と
してその加算器106から出力される。そして、遅延回
路104および105から比較回路103に入力される
映像信号E2は、遅延回路104では遅延信号Fとして
、更に遅延回路105では遅延信号Gとして遅延された
後に、比較回路103に入力される。
FIG. 6 is a circuit block diagram of another embodiment of the present invention, in which parts similar to and corresponding to those in FIG. 4 are given the same reference numerals. What should be noted is the amplifier 101 and the comparator circuit 10.
Delay circuits 104 and 105 are inserted between 3 and 3, and each of the delay elements d1 to cln constituting the delay circuit 104 shown in FIG. 7 is individually connected as an input to an adder 106, Further, the final stage delay element dn in the delay circuit 104 is connected to the first delay element D1 in the next stage delay circuit 105, and the final stage delay element D in the delay circuit 105 is connected to the first delay element D1 in the next stage delay circuit 105.
N means that the input is connected to the comparator circuit 103 as is. The adder 106 is connected to the comparator circuit 103 via the gain setter 107, as shown in FIG. Therefore, in the electric circuit of this embodiment having such a configuration, the video signal E2 is transmitted through the delay circuit 10.
4, the signals from each delay element d1 to dn are first added as they are in an adder 106 and outputted from the adder 106 as an average value of video signals for n scans. The video signal E2 input from the delay circuits 104 and 105 to the comparison circuit 103 is input to the comparison circuit 103 after being delayed as a delay signal F in the delay circuit 104 and as a delay signal G in the delay circuit 105. .

したがって、第6図の電気回路においても、被検物表面
の欠陥に対応する上述の映像信号E2+〜E25を、正
確に検出することが可能となる。
Therefore, also in the electric circuit shown in FIG. 6, it is possible to accurately detect the above-mentioned video signals E2+ to E25 corresponding to defects on the surface of the object to be inspected.

以上説明したように、本発明によれば、遅延素子によっ
て、被検物表面の実像に係る電気信号を少なくとも1走
査分以上遅延させるようにしたので、被検物表面の欠陥
に対応する電気信号がそのレベルを徐々に変化させてい
っても、その電気信号と比較されて被検物表面の欠陥の
有無を判定するための判定信号(平均値信号)に対する
影響を大きく軽減することができる。また、先行技術の
ようにローパスフィルタを使用していないので、ローパ
スフィルタの周波数カット特性を設定するための困難さ
を回避1することができる。特に、本発明にあっては、
各遅延素子の各々の出力の平均をとり、その平均的な信
号と比較するように構成したので、微細な欠陥の検出を
行うことができる、等の特有の効果を奏する。
As explained above, according to the present invention, the electric signal related to the real image of the surface of the object to be inspected is delayed by at least one scan using the delay element, so that the electric signal corresponding to the defect on the surface of the object to be inspected is delayed. Even if the level is gradually changed, the influence on the determination signal (average value signal) that is compared with the electric signal to determine the presence or absence of a defect on the surface of the object to be inspected can be greatly reduced. Further, since a low-pass filter is not used unlike the prior art, it is possible to avoid difficulties in setting the frequency cut characteristics of the low-pass filter. In particular, in the present invention,
Since the configuration is configured such that each output of each delay element is averaged and compared with the average signal, unique effects such as being able to detect minute defects are produced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、被検物表面の状態を光学的に検出し電気的信
号に変換するための装置の1例を示す図、第2図は先行
技術の信号処理回路ブロック図、第3図は先行技術によ
る場合の信号の波形を示す図、第4図は本発明の実施例
の信号処理回路ブロック図、第5図はその要部の詳細回
路ブロック図、第6図は本発明の池の実施例の信号処理
回路ブロック図、第7図はその要部の詳細回路ブロック
図、第8図は本発明による場合の信号の波形を示す図で
ある。 100・・・光電変換部、101・・−増幅器、103
・・・比較回路、104・105・・・遅延回路、10
6・・・加算器、107・・ゲイン設定器、d1〜dn
、 DI〜DN・・・遅延素子 第2図 第3図
FIG. 1 is a diagram showing an example of a device for optically detecting the condition of the surface of a test object and converting it into an electrical signal, FIG. 2 is a block diagram of a signal processing circuit of the prior art, and FIG. FIG. 4 is a block diagram of a signal processing circuit according to an embodiment of the present invention, FIG. 5 is a detailed circuit block diagram of its main parts, and FIG. 6 is a diagram showing signal waveforms according to the prior art. FIG. 7 is a block diagram of a signal processing circuit according to an embodiment of the present invention, FIG. 7 is a detailed circuit block diagram of the main part thereof, and FIG. 8 is a diagram showing signal waveforms according to the present invention. 100...Photoelectric conversion unit, 101...-Amplifier, 103
...Comparison circuit, 104/105...Delay circuit, 10
6... Adder, 107... Gain setting device, d1 to dn
, DI to DN...Delay element Fig. 2 Fig. 3

Claims (3)

【特許請求の範囲】[Claims] (1)  被検物の光学的実像を走査して電気信号に変
換し、その電気信号波形により物体の表面欠陥を検出す
る方法において、前記電気信号を少なくとも1走査分遅
延させて得られた遅延信号を、更に複数段の遅延素子を
介して遅延させ、前記各遅延素子の各々の出力を加1平
均して、現在走査中に係る前記電気信号をその加算平均
に係る信号と比較することにより物体の表面欠陥を検出
する方法。
(1) In a method of scanning a real optical image of an object to be inspected and converting it into an electrical signal, and detecting surface defects on the object based on the waveform of the electrical signal, a delay obtained by delaying the electrical signal by at least one scan. By further delaying the signal through multiple stages of delay elements, adding and averaging the outputs of each of the delay elements, and comparing the electrical signal related to the current scanning with the signal related to the added average. A method for detecting surface defects on objects.
(2)被検物の光学的実像を走査して電気信号に変換し
、その電気信号波形により物体の表面欠陥を検出する方
法において、前記電気信号を複数段の遅延素子を介して
遅延させ、前記各遅延素子の各々の出力の加算平均値を
求め、前記各遅延素子の最終段か・らの出力を少なくと
も1走査分更に遅延して遅延信号を得、前記加算平均値
に係る信号と前記遅延信号とを比較することにより物体
の表面欠陥を検出する方法。
(2) A method of scanning a real optical image of an object to be inspected and converting it into an electrical signal, and detecting surface defects on the object based on the electrical signal waveform, the electrical signal being delayed through a plurality of stages of delay elements; An average value of the outputs of each of the delay elements is calculated, and the output from the final stage of each delay element is further delayed by at least one scan to obtain a delayed signal, and the signal related to the average value and the A method of detecting surface defects on an object by comparing with delayed signals.
(3)被検物の光学的実像を走査して電気信号に変換し
、その電気信号波形により物体の表面欠陥を検出する装
置において、前記電気信号またはこの信号に関連する信
号を少なく□とも1走査分遅延させる第1の遅延回路と
、前記電気信号を直接または第1の遅延回路の遅延信号
を遅延させる複数段の遅延素子を含む第2の遅延回路と
、第2の遅延回路内の各遅延素子の各々の出力を加算平
均する加算器と、前記加算器の出力に関する信号と、前
記電気信号または第1の遅延回路の出力信号とを比較す
る比較器とを含むことを特徴とする、物体の表面欠陥検
出装置。
(3) In a device that scans an optical real image of an object to be inspected and converts it into an electrical signal, and detects a surface defect on the object based on the waveform of the electrical signal, at least one a first delay circuit that delays the electrical signal by a scanning amount; a second delay circuit that includes multiple stages of delay elements that delay the electrical signal directly or the delayed signal of the first delay circuit; It is characterized by comprising an adder that adds and averages the outputs of each of the delay elements, and a comparator that compares a signal related to the output of the adder and the electrical signal or the output signal of the first delay circuit. Object surface defect detection device.
JP18195581A 1981-11-12 1981-11-12 Method and device for detection of surface defect of object Granted JPS5883238A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18195581A JPS5883238A (en) 1981-11-12 1981-11-12 Method and device for detection of surface defect of object

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18195581A JPS5883238A (en) 1981-11-12 1981-11-12 Method and device for detection of surface defect of object

Publications (2)

Publication Number Publication Date
JPS5883238A true JPS5883238A (en) 1983-05-19
JPH0225451B2 JPH0225451B2 (en) 1990-06-04

Family

ID=16109789

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18195581A Granted JPS5883238A (en) 1981-11-12 1981-11-12 Method and device for detection of surface defect of object

Country Status (1)

Country Link
JP (1) JPS5883238A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61217746A (en) * 1985-03-25 1986-09-27 Mitsubishi Electric Corp Optical surface inspector

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61217746A (en) * 1985-03-25 1986-09-27 Mitsubishi Electric Corp Optical surface inspector

Also Published As

Publication number Publication date
JPH0225451B2 (en) 1990-06-04

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