JPS5880572A - Receiver - Google Patents

Receiver

Info

Publication number
JPS5880572A
JPS5880572A JP18009581A JP18009581A JPS5880572A JP S5880572 A JPS5880572 A JP S5880572A JP 18009581 A JP18009581 A JP 18009581A JP 18009581 A JP18009581 A JP 18009581A JP S5880572 A JPS5880572 A JP S5880572A
Authority
JP
Japan
Prior art keywords
signal
phase difference
information
frequency
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18009581A
Other languages
Japanese (ja)
Inventor
Munenori Mikami
三上 宗紀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP18009581A priority Critical patent/JPS5880572A/en
Publication of JPS5880572A publication Critical patent/JPS5880572A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S3/00Direction-finders for determining the direction from which infrasonic, sonic, ultrasonic, or electromagnetic waves, or particle emission, not having a directional significance, are being received
    • G01S3/02Direction-finders for determining the direction from which infrasonic, sonic, ultrasonic, or electromagnetic waves, or particle emission, not having a directional significance, are being received using radio waves
    • G01S3/14Systems for determining direction or deviation from predetermined direction
    • G01S3/46Systems for determining direction or deviation from predetermined direction using antennas spaced apart and measuring phase or time difference between signals therefrom, i.e. path-difference systems
    • G01S3/48Systems for determining direction or deviation from predetermined direction using antennas spaced apart and measuring phase or time difference between signals therefrom, i.e. path-difference systems the waves arriving at the antennas being continuous or intermittent and the phase difference of signals derived therefrom being measured

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Measuring Phase Differences (AREA)

Abstract

PURPOSE:To precisely measure the phase difference of input signals without reductionof reception probability, by receiving the input signal from the external, storing the information and immediately outputting a calibration signal on the basis of frequency information to calibrate the stored information. CONSTITUTION:When an unkown signal is inputted to input terminals 1a, 1b, the signal is received by receivers 2a, 2b and its frequency information and phase information are sent to a frequency storage 30 and a phase difference detector 6 respectively. The storage 30 sends the stored frequency information to an oscillator 4, a signal with the same frequency as the frequency information is sent to a distributor 5 and the distributed signals with the same phase are inputted to switches 9a, 9b. The phase detector 6 finds the phase difference between the two input signals, sends it to the 1st storing circuit 7 and changes the switches 9a, 9b and 10. The signal from the oscillator 4 is inputted to a phase detector 6 through the receivers 2a, 2b and the found phase difference is sent to a storing circuit 8. The calibrator 12 calibrates stored information in the storing circuit 7 and the calibrated date are outputted from an output terminal 13. Consequently the phase difference of the input signals can be precisely measured.

Description

【発明の詳細な説明】 この発明は、複数の同一受信機の入力端に入る信号の位
相差を広い周波数範囲にわたって正確に測定する受信装
置に関子るものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a receiving device that accurately measures the phase difference of signals entering the input terminals of a plurality of identical receivers over a wide frequency range.

このような受信装置は例えば神数個の固定空中線を用い
て、これら各空中線からの信号の位相差を測定し、到来
電波の到来方位を探知するために使われる−0従って、
受信装置は広い周波数軸−にわたって、また、任意の時
刻において、各々の受信機の伝送位相鐘は全て等しいこ
とが要求される。
Such a receiving device uses, for example, several fixed antennas, and measures the phase difference of the signals from each of these antennas, and is used to detect the direction of arrival of the incoming radio waves.
The receiving device is required to cover a wide frequency axis, and the transmission phase signals of each receiver are all required to be equal at any given time.

従来、この−の受信装ンマ各々の受信機の位相特性が広
い周波数範囲多こわたって畑iっており、しかも周囲温
度の影響による伝送位相−の変動の小さい、すなわち、
位相安定度の高い受信機が使われていた。このような受
信機では、上記性能を尚めようとすればするほど受信機
内に使われるデバイスには広い周波数範囲にわたって特
性が愉っており、かつ周囲温度の影響を受けないものが
必要となり、コストが極端に高くなる。さらには、周囲
温度を一定させるため全部の受信機を恒温槽に入れるな
どの処理が必要となり、装置が大型化する欠点があった
Conventionally, the phase characteristics of each receiver have varied over a wide frequency range, and the fluctuations in the transmission phase due to the influence of ambient temperature are small, that is,
A receiver with high phase stability was used. In such receivers, the more you try to improve the above-mentioned performance, the more the devices used inside the receiver need to have good characteristics over a wide frequency range and be unaffected by ambient temperature. Costs become extremely high. Furthermore, in order to keep the ambient temperature constant, it was necessary to place all the receivers in a constant temperature bath, which resulted in a disadvantage of increasing the size of the device.

また、上述のような高性能のデバイスを必要としない従
来の受信装置として第1図に示すものがあった。図に詔
いて、(1m) I (lb)は信号入力端、(2a)
、(2b)は同一仕様に基づく受信機である。(3)は
周波数制御器である。(4)は発振器であり、これはこ
の受信装置が扱う入力信号の周a数範囲の任意の周波数
の信号を周波数制御器(3)の鍮今に従って発振する。
Furthermore, there is a conventional receiving apparatus shown in FIG. 1 that does not require the above-mentioned high-performance device. Referring to the figure, (1m) I (lb) is the signal input terminal, (2a)
, (2b) are receivers based on the same specifications. (3) is a frequency controller. (4) is an oscillator, which oscillates a signal of any frequency within the frequency range of the input signal handled by this receiving device according to the frequency of the frequency controller (3).

(5)は分配器であり、発振器(4)が発振する信号を
同相の2つの信号に分は出力する。
(5) is a divider, which outputs the signal oscillated by the oscillator (4) into two signals having the same phase.

(6)は位相差検出器であり、受(j機(2m) 、 
(2b)からの各々の位相情報を比較しその位相差を出
力する。+71 、 +81は上記位相差を記憶する記
憶回路であり、それぞれ第1記憶回路、第2記憶回路で
ある。
(6) is a phase difference detector, and the receiver (j machine (2m),
The phase information from (2b) is compared and the phase difference is output. +71 and +81 are memory circuits that store the phase difference, and are a first memory circuit and a second memory circuit, respectively.

(9a)、(9b)は第1切換器、曲は第2切換器であ
り、それぞれ回路の切換を行う。ul)はゲート回路で
ある。+12は較正器である。u3は入力端(1λ)。
(9a) and (9b) are the first switch, and the song is the second switch, which respectively switch the circuits. ul) is a gate circuit. +12 is a calibrator. u3 is the input end (1λ).

(1b)にそれぞれ入った信号の位相差が較正され出力
される出力端である。Iは第1切換器(9a) 。
(1b) is an output terminal where the phase difference of the signals inputted to each terminal is calibrated and output. I is the first switch (9a).

(9b)及び第2切候器11Lllに回路の切換を命令
する切換倖令器である。
(9b) and a switching switch that commands the second switching switch 11Lll to switch the circuit.

次に動作について説明する。Next, the operation will be explained.

切換命令器lは第1切換器(9a)、(9b)及び第2
切換器曲に命令を送り、一定時間毎にある決められた時
間だけ、第1切換器(9a)、(9b)は分配器(5)
の出力端と受信M (2a)及び受信機(2b)の各入
力端とをそれぞれ接続し、第2切換器曲は位相差検出器
16)の出力端と第2記憶回路(8)の入力端とを接続
する。上記状められた時間以外は第1切  l換器(9
m)、(9b)は入力fiiii (1)、(lb)と
受信機(21)、(2b)の各入力端とをそれぞれ接続
し、第2切換器LlGは位相差検出器(6)と第1記憶
回路(7)とを接続する。上記の決められた時間、すな
わち、第1切換器(9り、(9b)が分配器(5)の出
力と受信機(2a)、(2b)の入力端とをそれぞれ接
続し、第2切換器111が位相差検出器(6)の出力端
と第2記憶回路18+の入力端とを接続している時間内
に、発振器(4)は周波数制御器(3)からの周波数制
御器り″によって、不装置が受信する全周波数範囲を掃
引発振する。上記周波数制御信号は同時に受゛信M(2
1)。
The switching command device 1 is used for the first switching device (9a), (9b) and the second switching device (9a), (9b).
A command is sent to the switch, and the first switch (9a), (9b) switches to the distributor (5) for a certain fixed period of time.
The output terminal of the receiver M (2a) and the input terminal of the receiver (2b) are respectively connected, and the second switch is connected to the output terminal of the phase difference detector 16) and the input terminal of the second memory circuit (8). Connect the ends. At times other than the times specified above, the first switch (9
m) and (9b) connect the inputs fiii (1) and (lb) to the input terminals of the receivers (21) and (2b), respectively, and the second switch LlG connects the phase difference detector (6) and It is connected to the first memory circuit (7). At the above-determined time, that is, the first switch (9, (9b) connects the output of the distributor (5) and the input terminal of the receiver (2a), (2b), respectively, and the second switch During the time that the oscillator 111 connects the output end of the phase difference detector (6) and the input end of the second storage circuit 18+, the oscillator (4) receives the frequency control signal from the frequency controller (3). The frequency control signal is simultaneously received by M (2
1).

(2b)及び第2記憶回路(8)へも送られる。すると
受信m (211)、(2b)はこの周波数制&lI信
号により、発振器(4)が発振する周波数と同じ周波数
の信号を受信するように同調される。従って、発振器(
4)が発振する信号は受信4i111 (211)、(
2b)でそれぞれ受信され、位相差検出器(6)に送ら
れる。この位相差検出器(6)は受信41t (2a)
、(2b)の出力信号の位相差を検出し、出力する。
(2b) and is also sent to the second storage circuit (8). Then, the receiver m (211), (2b) is tuned by this frequency control &lI signal so as to receive a signal of the same frequency as the frequency oscillated by the oscillator (4). Therefore, the oscillator (
The signal oscillated by 4) is received by 4i111 (211), (
2b) and sent to the phase difference detector (6). This phase difference detector (6) receives 41t (2a)
, (2b) is detected and output.

本来、受信1m (2a) 、 (2b) ノ特性が全
(同じであるならば発振器(4)の信号を受けている場
合、位相差検出器(6)からの出力は0であるが、同一
仕様の受信機であってもその活性は微妙に異なるのが普
通であり、位相差検出器(6)からの出力はOでなくな
ってくる。従って、第2記憶回路(8)は周波数制御器
13)からの命令によって上記位相差を発振器(4)の
発振信号の周波数に対応させ記憶する。
Originally, if the characteristics of the receiving 1m (2a) and (2b) are the same, then when receiving the signal from the oscillator (4), the output from the phase difference detector (6) is 0, but if they are the same, Even if the receiver meets the specifications, its activity usually differs slightly, and the output from the phase difference detector (6) will no longer be O.Therefore, the second memory circuit (8) is a frequency controller. 13), the phase difference is stored in correspondence with the frequency of the oscillation signal from the oscillator (4).

上記ある決められた時間が過ぎると、第1切換器(9a
)、(9b)は入力端(lり、(lb)と受信機(2a
)、(2b)の各入力端とをそれぞれ接続し、第2切換
器illは位相差検出器16)の出力端と第1記憶回路
(7)の入力端とを接続する。この状態になると、入力
端(la)、(lb)に入ってくる外部入力信号を受信
機(2m)、(2b)がそれぞれ受信することになる。
When the above-determined time has passed, the first switch (9a
), (9b) are the input end (l, (lb) and the receiver (2a
) and (2b), respectively, and the second switch ill connects the output end of the phase difference detector 16) and the input end of the first storage circuit (7). In this state, the receivers (2m) and (2b) receive external input signals that enter the input terminals (la) and (lb), respectively.

すなわち、周波数制御器13)からの周波数制御信号に
より受信am(2a)、(2b)はそれ自身の周波数選
択回路を制御し、入力信号の周波数に合致させ受信ず2
゜その結果、受信機C2m> 、 (2りは入力端(l
a)、(lb)に入ってくる入力信号の位相情報に応じ
た出力を位相差検出器16)に送り、その位相差を検出
して第11記憶回路(7)へ送り、9J1記憶回路(7
)がその位相差を記憶する。さらに、周波数制御器(3
)は受信機(2a)、(2b)が受信した周01叡情報
を第2記憶回路(8)に送り、先に記憶していた位相差
のうち受信機(2a)、(2b)が受信した周波数に合
致する信号の位相差をゲート回路Uυに送り出すよう命
令する。ところで、第1記憶回路(7)が記憶を完了す
ると第1記憶回路(7)はゲート回路1111に同回路
aDの入力端から出力端に信号を通すよう命令する。そ
の結果、jiG1記憶回路(7)からの信号及び第2記
憶回路(8)からの信号はそれぞれ較正器α2に入る。
That is, the receivers am (2a) and (2b) control their own frequency selection circuits according to the frequency control signal from the frequency controller 13) to match the frequency of the input signal and do not receive the signal.
゜As a result, the receiver C2m>, (2 is the input terminal (l
The output corresponding to the phase information of the input signal entering a) and (lb) is sent to the phase difference detector 16), the phase difference is detected and sent to the 11th storage circuit (7), and the 9J1 storage circuit (9J1) is sent to the 11th storage circuit (7). 7
) stores the phase difference. Furthermore, a frequency controller (3
) sends the phase difference information received by the receivers (2a) and (2b) to the second storage circuit (8), and the receivers (2a) and (2b) receive the phase difference that was previously stored. The gate circuit Uυ is commanded to send out the phase difference of the signal matching the frequency. By the way, when the first storage circuit (7) completes storage, it instructs the gate circuit 1111 to pass a signal from the input terminal to the output terminal of the circuit aD. As a result, the signal from the jiG1 storage circuit (7) and the signal from the second storage circuit (8) each enter the calibrator α2.

この較正器(2)は第1記憶回路(7)からの位相差信
号を第2記憶回路(8)からの位相差信号でもって較正
を行う。すなわち、受信機(2a) 、 (2b)の特
性の微妙なちがいによって生ずる位相差を補正する。
This calibrator (2) calibrates the phase difference signal from the first storage circuit (7) with the phase difference signal from the second storage circuit (8). That is, the phase difference caused by a slight difference in the characteristics of the receivers (2a) and (2b) is corrected.

受信機(2λ)、(2b)には発振器(4)からの信号
が同位相で入るので、受信機(2a>、(2b)の位相
特性のちがいは位相差検出器(6)の出力で位相差とし
て出力され、これを第2記憶回路(8)で記憶している
。従って、第2記憶回路(8)の記憶情報は受信機(2
a)、(2b)の位相特性のちがいを記憶していること
になるので、較正器(1zの出力は入力端(la)。
Since the signals from the oscillator (4) enter the receivers (2λ) and (2b) in the same phase, the difference in phase characteristics of the receivers (2a> and (2b)) is determined by the output of the phase difference detector (6). This is output as a phase difference and stored in the second storage circuit (8).Therefore, the information stored in the second storage circuit (8) is output as a phase difference in the receiver (2).
Since the difference in phase characteristics of a) and (2b) is memorized, the output of the calibrator (1z) is the input terminal (la).

(1b)に入った外部信号の位相差を測定したことにな
り、この信号を出力端(131から出力する。
(1b) This means that the phase difference of the input external signal is measured, and this signal is output from the output terminal (131).

従来の箪2の方式の受信装置は以上のように構成されて
いるので、その受信装置に使われるデバイスにはそれほ
ど厳しい性能は必要としないが、この第2の方式の従来
装置は下記のような欠点をもっている。つまり、較正用
の信号を用いて、受4Km(2a)、(2b)の位相特
性のちがいを位相差として第2記憶回路(8)に記憶し
ておき、外部からの入力(if号を待つ構成となってい
るので、何時入力してくるかわからない信号を待受ける
場合、時間的経過に伴い受信m (2a) 、(2b)
に位相特性の変化が生ずる恐れがある。特にこれは装置
の電源投入直後が着しるしく、特性が安定するまで待機
する必要がある。また、入力頻度の少ない信号を対象と
する場合、装置の較正を行っている時間に入力信号が市
った場合、極端に受信確率が落ちる欠点がある。
Since the conventional receiving device of the second method is configured as described above, the device used in the receiving device does not require very strict performance, but the conventional device of this second method is as follows. It has some drawbacks. In other words, using the calibration signal, store the difference in phase characteristics between the receiving 4Km (2a) and (2b) as a phase difference in the second storage circuit (8), and wait for an external input (if signal). Therefore, when waiting for a signal that does not know when it will be input, the reception m (2a), (2b) will change over time.
There is a possibility that a change in phase characteristics may occur. This is particularly likely to occur immediately after the device is powered on, and it is necessary to wait until the characteristics stabilize. In addition, when dealing with signals that are input infrequently, there is a drawback that if an input signal occurs while the device is being calibrated, the probability of reception will be extremely low.

この発明は上記のような従来のものの欠点を除去するた
めになされたもので、ます、外部からの入力信号を受信
し、その情報を記憶するとともに、その周波数情報にも
とすき即座に較正用信号を発し、上記記憶情報を較正す
ることにより、何時入力するかわからない信号に対して
も受信確率を洛すことなく、また、厳しい性能の受信機
を必賛とせず、正確に複数の入力端に入った信号の位相
差を測定する受信装置を提供することを目的としている
This invention was made in order to eliminate the drawbacks of the conventional ones as described above.It receives an input signal from the outside, stores that information, and immediately uses the frequency information for calibration. By emitting a signal and calibrating the above stored information, it is possible to accurately connect multiple input terminals without compromising the reception probability even for signals that do not know when they will be input, and without requiring a receiver with strict performance. It is an object of the present invention to provide a receiving device that measures the phase difference of signals input to the receiver.

以下この発明の一実施例を図について説明する。An embodiment of the present invention will be described below with reference to the drawings.

第2図はこの発明の一実施例による受悟装置を示す。図
において、第1図と同一符号は第1図と同一のものを示
す。(至)は受信Ia(za) 、 (zb)が同時に
探知した同−周′波数の入力信号の周波数情報を記憶す
る周波数記憶器である。(4)は第1図の発振器(4)
に相当するが、周波数記憶器団が記憶した周波数情報を
受け、その周波数と同一の周波数の信号を発生する発振
器である。
FIG. 2 shows a perception device according to an embodiment of the present invention. In the figure, the same reference numerals as in FIG. 1 indicate the same parts as in FIG. 1. (to) is a frequency storage device that stores frequency information of input signals of the same frequency detected simultaneously by receivers Ia(za) and (zb). (4) is the oscillator (4) in Figure 1
It is an oscillator that receives frequency information stored in a frequency storage group and generates a signal of the same frequency as that frequency.

次に動作について説明する。Next, the operation will be explained.

本装置が初期状態にある時、すなわち外部からの未知信
号を待受ける状態の′とき、第1切換器(9a) 、 
(9b)は入力端(1す、(lb)と受信機(2す。
When the device is in its initial state, that is, when it is waiting for an unknown signal from the outside, the first switch (9a),
(9b) is the input terminal (1st, (lb)) and the receiver (2nd stage).

(2b)の対応した入力端とをそれぞれ接続し、第2切
換器ulは位相差検出器(6)の出力端と第1記憶回路
(7)の入力端とを接続している。従って、入力端(I
ll)、(lb)に未知信号が入ってくると、その信号
は対応した受信機(21)、(2b)でそれぞれ受信さ
れ、入力信号の周波数情報は周波数記憶器(至)へ、位
相情報は位相差検出器(6)へそれぞれ送られる・上記
周波数記憶器(至)は受信機(2m)、(2b)からの
周波数情報(同一周波数情報)を記憶し、それを発振器
(4)へ送る。発振器(4)は上記周波数情報どおりの
周波数の信号を発生させ分配器(5)へ送る。
(2b), and the second switch ul connects the output end of the phase difference detector (6) and the input end of the first storage circuit (7). Therefore, the input terminal (I
When an unknown signal enters ll) and (lb), the signal is received by the corresponding receivers (21) and (2b), respectively, and the frequency information of the input signal is transferred to the frequency storage (to), and the phase information is transferred to the frequency storage device (to). are sent to the phase difference detector (6) respectively.The frequency storage device (to) stores the frequency information (same frequency information) from the receivers (2m) and (2b), and sends it to the oscillator (4). send. The oscillator (4) generates a signal with a frequency according to the above frequency information and sends it to the distributor (5).

分配器(5)は発振器(4)からの信号を2つの同位相
の(6号に分配し出力する。
The distributor (5) divides the signal from the oscillator (4) into two signals (6) of the same phase and outputs them.

一方、位相差検出器−(6)は受信機(2m)、(2b
)からそれぞれ位相情報を受け、受信機(22)がらの
位相情報と受信fi (2b)からの位相情報とから位
相差を求め、これを第1記憶回路(7)へ送る。第1記
憶(ロ)路(7)はこの位相差を記憶し、記憶を完了す
ると第1切換器(9a)、(9b)及び第2切換器曲に
命令を発し回路の切換を行う。すなわち、第1切換器(
ga)、(9b)は分配器(5)の各出力端と受信機(
2a) 、 (2b)の各入力端とをそれぞれ接続し、
第2切換器(11は位相差検出器(6)の出力端と第2
記憶回路(8)の入力端とを接続する。その結果、発振
器(4)からの信号が同じでかつ外部入力信号を受信し
た同じ周波数の信号が受信機(2a) 、 (2b)に
入ることになり、受信機(2m) 、(2b)は各々こ
の信号を受信し、それぞれ位相情報を位相差検出器(6
)に送り、両者の位相差を求めこれを第2記憶回路(8
)へ送る。この位相差は第2記憶回路(8)に記憶され
る。第2記憶回路(8)がこの位相差の記憶を完了する
と、第2記憶回路(8)はゲート回路Uυに第1記憶回
路(7)及び第2記憶回路(8)の記憶情報を較正器(
1りの対応した入力端に送り込むよう命令するとともに
、第1切換器(ga) 、 (9b)及び第2切換器O
rを初期の状態に戻すよう命令する。その結果、較正器
[1りは第1記憶回路(7)の記憶情報を第2記憶回路
(8)の記憶情報で較正した結果を出力端113に出力
する。同時に、第1切換器(9m) 、 (9b)及び
第2切換器11(Iは初期の回路接続の状態に戻り、次
の未知信号の人力に備える。
On the other hand, the phase difference detector (6) is connected to the receiver (2m), (2b
), a phase difference is obtained from the phase information from the receiver (22) and the phase information from the reception fi (2b), and this is sent to the first storage circuit (7). The first memory (b) path (7) stores this phase difference, and when the storage is completed, a command is issued to the first switch (9a), (9b) and the second switch to switch the circuit. In other words, the first switch (
ga), (9b) are the output terminals of the distributor (5) and the receiver (
Connect the input terminals of 2a) and (2b) respectively,
The second switch (11 is the output end of the phase difference detector (6)
It is connected to the input end of the memory circuit (8). As a result, the same signal from the oscillator (4) and the same frequency signal that received the external input signal enter the receivers (2a) and (2b), and the receivers (2m) and (2b) Each receives this signal and transmits the phase information to a phase difference detector (6
), the phase difference between the two is determined, and this is sent to the second storage circuit (8
). This phase difference is stored in the second storage circuit (8). When the second memory circuit (8) completes storing this phase difference, the second memory circuit (8) transfers the memory information of the first memory circuit (7) and the second memory circuit (8) to the gate circuit Uυ as a calibrator. (
The first switch (ga), (9b) and the second switch O
Command to return r to its initial state. As a result, the calibrator [1] calibrates the information stored in the first storage circuit (7) with the information stored in the second storage circuit (8) and outputs the result to the output terminal 113. At the same time, the first switch (9m), (9b) and the second switch 11 (I) return to the initial circuit connection state and prepare for the next unknown signal.

以上のような回路構成において、受信am (2a)。In the above circuit configuration, the receiving am (2a).

(2b)が発振器(4)からの信号を受ける場合、受信
1#l (2a) 、(2b)の入力端に入る信号の位
相は同一で、しかも、受信FA (2m) 、 (2b
)が受信した外部からの入力信号の周波数と同じ周波数
の信号であるため、第2記憶回路(8)は外部信号を受
信した周波数での受信M (2a)、(2b)の伝送位
相特性のちがいを位相差として記憶することになる。従
って、第1記憶回路(7)の情報を第2記憶回路(8)
の情報で較正することは、外部入力信号を受信した時の
受(4m (2a)、(2b)の受信した周波数での位
相のちがいを補正することになって、入力端子(la)
 。
When (2b) receives a signal from the oscillator (4), the phases of the signals entering the input terminals of reception 1#l (2a) and (2b) are the same, and moreover, the reception FA (2m) and (2b
) is a signal with the same frequency as the received external input signal, the second storage circuit (8) stores the transmission phase characteristics of the reception M (2a) and (2b) at the frequency at which the external signal is received. The difference will be stored as a phase difference. Therefore, the information in the first memory circuit (7) is transferred to the second memory circuit (8).
Calibration using the information from the input terminal (la) corrects the phase difference at the received frequency of the receiver (4m (2a), (2b)) when receiving an external input signal.
.

(1b)に入ってくる入力信号の位相差を正確に測定し
て出力瑞旧に出力することになる。
(1b) The phase difference of the incoming input signal is accurately measured and outputted to the output terminal.

なお上記実施例では外部信号を入力する入力端  )が
21VJ 、入力信号を受信する受信機が2個の場合に
ついて説明したが、入力端及び受信機が2個以上であっ
てもよい。この場合、位相差検出器(6)は受信機1個
の出力位相情報と他の受信機の出力位相情報との位相差
をそれぞれ求める構成となる。
In the above embodiment, the case where the input terminal (21VJ) for inputting an external signal is 21VJ and the number of receivers for receiving the input signal is two has been described, but the number of input terminals and receivers may be two or more. In this case, the phase difference detector (6) is configured to obtain the phase difference between the output phase information of one receiver and the output phase information of other receivers.

以上のように、この発明によれば複数の外部人力信号の
入力位相差を、装置内のxA做器からの外部信号と同周
波数かつ同位相の信号を各受悟礪の入力端に入力したと
きの位相差信号で較正し、しかも外部入力信号が入力さ
れてから非常に短時間内に較正を行うように装置を構成
したので、時間経過及び環境条件の変化に伴う特性変化
を抑える特別の配慮を必要とせず、また、複数の受1B
機の伝送位相特性が揃っていなくとも、複数の入力4g
号の位相差を正確に測定でき、また、非常にm&の少な
い入力信号に対してはその入力信号を漏らすことなく捕
捉し、その位相差を測定できる効果がある。
As described above, according to the present invention, the input phase difference of a plurality of external human signals is inputted into the input terminal of each receiver as a signal having the same frequency and the same phase as the external signal from the xA generator in the device. Since the device is configured to calibrate using the phase difference signal at the time of the change, and also within a very short time after the external input signal is input, a special No consideration is required, and multiple Uke 1B
Multiple input 4g even if the transmission phase characteristics of the machine are not aligned
It is possible to accurately measure the phase difference of signals, and also has the effect of being able to capture an input signal with very little m& without leaking it and measure its phase difference.

さらに、受信機の時間的経過及び環境条件の変化に伴う
特性変化を抑える必要がないこと及び複数の受信機の位
相特性を揃える必要がないことは当然装置の小型化並び
にコストダウンに結びっく効果がある。
Furthermore, the fact that there is no need to suppress changes in the characteristics of the receiver due to the passage of time or changes in environmental conditions, and that there is no need to align the phase characteristics of multiple receivers, naturally leads to a reduction in the size and cost of the device. There is.

【図面の簡単な説明】 第1Nは従来の受信装置の一例のブロック構成図、第2
図はこの発明の一実施例による受1g装置のブロック構
成図である。 (21)(2b)−・・受信機、(6)・・・位相差検
出器、山・・・周波数記憶器、+41・・・発振器、(
9a) (9b)・・・第1切換器、(1(1・・・第
2切換器、(71・・・第1記儲回路、(8)・・・1
2記憶回路、Ill・・・ゲート回路、色・・・較正器
。 なお図中同一符号は同−又は相当部分を示す。
[BRIEF DESCRIPTION OF THE DRAWINGS] 1N is a block diagram of an example of a conventional receiving device;
The figure is a block diagram of a receiver 1g device according to an embodiment of the present invention. (21) (2b) - Receiver, (6) Phase difference detector, Mountain... Frequency memory, +41... Oscillator, (
9a) (9b)...First switch, (1(1...Second switch, (71...First storage circuit, (8)...1
2 memory circuit, Ill...gate circuit, color...calibrator. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims] (1)受信した入力信号の周波数情報と位相情報とを出
力する複数の受信機と、この複数の受信機のうちの1個
の受信機からの位相情報と他の受信機からの位相情報と
から両者の位相差を検出する位相差検出器と、上記受信
機からの周波数情報を記憶する周波数記憶器と、この周
波数記憶器に記憶された上記周波数情報どおりの周波数
の信号を発振し同相にて上記複数の受信機に供給する発
振器と、この発振器からの信号と未知の入力信号とを切
換えて上記複数の受信機のそれぞれに入力する複数の第
1切換器と、該第1切換器により上記受信機に未知の入
力信号が入力されるよう接続されているとき上記位相差
検出器の出力を第2切侯器を介して記憶する第1記憶回
路と、上記第1切2切侯器を介して記憶する第2記憶回
路と、この第2記憶回路が記憶を完了した時該第2記憶
回路からの命令により該第1およびiJ2記憶回路の記
憶情報を通増させるゲート回路と、このゲート回路を通
過した上記第2記憶回路の情報でもって該ゲート回路を
通過した上記141記憶回路からの情報を較正し位相差
出力信号を得る較正器とを備えたことを特徴とする受信
装置。
(1) A plurality of receivers that output frequency information and phase information of a received input signal, and phase information from one of the plurality of receivers and phase information from another receiver. a phase difference detector that detects the phase difference between the two; a frequency storage device that stores frequency information from the receiver; and a frequency storage device that oscillates a signal with a frequency according to the frequency information stored in the frequency storage device to be in phase. an oscillator that supplies the plurality of receivers to the plurality of receivers, a plurality of first switchers that switch between the signal from the oscillator and the unknown input signal and input the signal to each of the plurality of receivers; a first memory circuit that stores the output of the phase difference detector via a second detector when the receiver is connected to receive an unknown input signal; a second storage circuit for storing information via the first and iJ2 storage circuits; a gate circuit for increasing the storage information in the first and iJ2 storage circuits according to a command from the second storage circuit when the second storage circuit completes storage; A receiving device comprising: a calibrator that calibrates information from the 141 storage circuit that has passed through the gate circuit with information from the second storage circuit that has passed through the gate circuit to obtain a phase difference output signal.
JP18009581A 1981-11-09 1981-11-09 Receiver Pending JPS5880572A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18009581A JPS5880572A (en) 1981-11-09 1981-11-09 Receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18009581A JPS5880572A (en) 1981-11-09 1981-11-09 Receiver

Publications (1)

Publication Number Publication Date
JPS5880572A true JPS5880572A (en) 1983-05-14

Family

ID=16077344

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18009581A Pending JPS5880572A (en) 1981-11-09 1981-11-09 Receiver

Country Status (1)

Country Link
JP (1) JPS5880572A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04132053U (en) * 1991-02-12 1992-12-07 雪印乳業株式会社 combination container

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5096231A (en) * 1973-12-24 1975-07-31

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5096231A (en) * 1973-12-24 1975-07-31

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04132053U (en) * 1991-02-12 1992-12-07 雪印乳業株式会社 combination container

Similar Documents

Publication Publication Date Title
EP0540908B1 (en) Method and apparatus for automatic tuning calibration of electronically tuned filters
US5077759A (en) Phase adjusting system for a radio communication system
SE516597C2 (en) Method and apparatus for liquid level measurement by radar radiation
US6459257B1 (en) Measuring system for measuring power and/or power factors at at least one measuring point in an a.c. voltage network
US4317215A (en) Tuning system for CATV terminal
JPS5880572A (en) Receiver
JPH02219323A (en) Communication device
JPH08130774A (en) Data transmission system
JPS6351274B2 (en)
JP2003273634A (en) Array antenna device
JPS5946350B2 (en) receiving device
JPH0748629B2 (en) Output signal synthesizer
JPH03201840A (en) Switching circuit without short break
JP2002244937A (en) Clocking system utilizing lan
US2991353A (en) Automatic frequency control for multitransmitter radio system
US3037204A (en) Trimode turnstile monopulse feed
JP2634259B2 (en) High frequency signal direction finder
JPH04309878A (en) Receiving device
US3778834A (en) Direction finder calibration system
US20230421102A1 (en) Clock matching tune circuit
JPS637026A (en) Input/output learning device
US3510769A (en) Self-calibrating frequency discriminator circuit
SU1184032A1 (en) Automatic corrector of amplitude-frequency characteristic
CN100411242C (en) Method for tuning radio filter and system for tuning radio filter
US2485619A (en) Direction-responsive receiver