JPS58779A - Radar device - Google Patents
Radar deviceInfo
- Publication number
- JPS58779A JPS58779A JP56099402A JP9940281A JPS58779A JP S58779 A JPS58779 A JP S58779A JP 56099402 A JP56099402 A JP 56099402A JP 9940281 A JP9940281 A JP 9940281A JP S58779 A JPS58779 A JP S58779A
- Authority
- JP
- Japan
- Prior art keywords
- output
- signal
- interference wave
- shift register
- converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
- G01S13/02—Systems using reflection of radio waves, e.g. primary radar systems; Analogous systems
- G01S13/50—Systems of measurement based on relative movement of target
- G01S13/52—Discriminating between fixed and moving objects or between objects moving at different speeds
Landscapes
- Engineering & Computer Science (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は、干渉波を除去する方法を改良したレーダ装
置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a radar device with an improved method of removing interference waves.
従来この種の装置として第1図に示すものかあった。図
において、(1)はビデオ信号をディジタル信号に変換
するA/D変換器、(3) +41はA/D変換器(1
)の出力ディジタル信号の所定レンジの信号を送信パル
スの周期毎にそれぞれ記録する第1.第2のシフトレジ
スタ、(5@)(5b)は2つの入力信号の差の絶対値
が設定値以上である力\占力・を検出する第1.第2の
比較器、(6)は両比較器(5a)(sb)からなり、
複数の周期にわたる同一レンジ信号の相関をとって干渉
波を判別する相関回路、(7)は両比較器+51 +6
1からの信号の状態によりA / D I= 換器(1
)の出力か$1のシフトレジスタ(3)の出力のどちら
かの信号を選択出力する選択(ロ)路、(2)は選択回
路(7)の出力から固定目標信号を消去する〜ITI(
Moving TargethIndicator H
移動目標指示)フィルタである。A conventional device of this type is shown in FIG. In the figure, (1) is an A/D converter that converts a video signal into a digital signal, (3) +41 is an A/D converter (1
) in which signals in a predetermined range of output digital signals are recorded for each transmission pulse period. The second shift register (5@) (5b) detects the force where the absolute value of the difference between the two input signals is greater than or equal to the set value. The second comparator (6) consists of both comparators (5a) (sb),
Correlation circuit that determines interference waves by correlating signals in the same range over multiple periods, (7) includes both comparators +51 +6
Depending on the state of the signal from 1, A / DI = converter (1
) or the output of the $1 shift register (3), the selection (2) path deletes the fixed target signal from the output of the selection circuit (7) ~ ITI (
Moving Target Indicator H
moving target instruction) filter.
第1図において、第1のシフトレジスタ(3)には前回
送信時のデータが、第2のシフトレジスタ(4)には前
々回送信時のデータが記憶されている。今、あるレンジ
の信号がA/D変換器(1)によりディジタル信号に変
換されると同時に、前回、前々同の同一レンジの信号か
シフトレジスタ131 +41より出力されたとし、こ
れらの信号の値を各々A/D変換器(1)の出力はA、
Ifのシフトレジスタ(3)の出力はB 、12のシフ
トレジスタ(4)の出力はCとする。In FIG. 1, the first shift register (3) stores the data from the previous transmission, and the second shift register (4) stores the data from the previous transmission. Now, assume that a signal in a certain range is converted into a digital signal by the A/D converter (1), and at the same time, a signal in the same range from the previous time was output from the shift register 131+41. The output of the A/D converter (1) is A,
The output of the If shift register (3) is B, and the output of the 12 shift register (4) is C.
!$1の比較器(5)はAとBの信号の差の絶対値があ
る設定値X以上の場合にその出力信号を選択回路(7)
に送り、IJ2の比較器(6)はBとCの信号の差の絶
対値が上記設定値X以下の場合に選択回路(7)にその
出力信号を送る。選択回路(7)では両比較器(5)(
6)から信号が来た場合、即ち干渉波と判別された場合
はBの信号を、その他の場合は人の信号をMTIフィル
タ(2)に入力する。! The $1 comparator (5) is a circuit (7) that selects the output signal when the absolute value of the difference between the signals A and B is greater than a certain set value X.
The comparator (6) of IJ2 sends its output signal to the selection circuit (7) when the absolute value of the difference between the B and C signals is less than or equal to the set value X. In the selection circuit (7), both comparators (5) (
6), that is, if it is determined to be an interference wave, the B signal is input to the MTI filter (2), and in other cases, the human signal is input to the MTI filter (2).
そして設定値Xとしては正常な固定目標からの信号が送
信毎に変化する範囲の最大値より少し大きい値を設定す
る。ここで正常な信号はレベル的に大きな目標であって
もアンテナパターンの影響により信号の大きさはなめら
かに変化するものである。The set value X is set to a value slightly larger than the maximum value within the range in which the signal from a normal fixed target changes each time it is transmitted. Here, even if a normal signal is a target with a large level, the signal size changes smoothly due to the influence of the antenna pattern.
次に第2図を用いて本回路の動作を説明する。Next, the operation of this circuit will be explained using FIG. 2.
なお、説明は前回及び前々回の相関について行なう。第
2図において→−はAの値の、前回の同一レンジの値と
の差か設定値以下の場合を示し、−一は設定値以上の場
合を示す。又、区の上側はAの値を示し、下側は選択回
路(7)の出力を示す。矢印は垂直の場合はAの値が選
択回路(7)の出力になり、斜めの場合はBの値が選択
回路(7)の出力になることを示す。Note that the explanation will be about the correlation between the previous time and the time before the previous time. In FIG. 2, →- indicates that the difference between the value of A and the previous value in the same range is less than or equal to the set value, and -1 indicates that the difference is greater than or equal to the set value. Further, the upper side of the ward indicates the value of A, and the lower side indicates the output of the selection circuit (7). If the arrow is vertical, the value of A will be the output of the selection circuit (7), and if it is diagonal, the value of B will be the output of the selection circuit (7).
第2図(a)は干渉波が入らない場合を示す。この時は
Aの値が選択回路(7)の出力になる。FIG. 2(a) shows the case where no interference waves enter. At this time, the value of A becomes the output of the selection circuit (7).
第2図(b)はtI時点で干渉波か入った場合を示す。FIG. 2(b) shows the case where an interference wave enters at time tI.
この時、Bの値が選択回路(7)の出力になるため、選
択回路(7)の出力の変化は滑らかである。この時、B
の値を出力せずに、選択回路(7)の出力を無くすると
、固定目標かあった場合、選択回路(7)の出力は不連
続となり、MTIに消え残りを生する。At this time, since the value of B becomes the output of the selection circuit (7), the output of the selection circuit (7) changes smoothly. At this time, B
If the output of the selection circuit (7) is eliminated without outputting the value of , if there is a fixed target, the output of the selection circuit (7) will be discontinuous, resulting in a residual value in the MTI.
1142図(c)は大きな移動目標がt3時点からt4
時点に入った場合を示す。この時、Bの値か選択回路(
7)の出力になるため、t1時点から14時点までの選
信周期分遅れるか、実用上問題は無い。又、干渉波が連
続して入った場合も同様になるが、干渉波が同一レンジ
に連続して入る確率は非常に小さい。In Figure 1142(c), a large moving target moves from time t3 to t4.
Indicates when the point has been reached. At this time, the value of B or the selection circuit (
7), there is a delay corresponding to the selection period from time t1 to time 14, but there is no practical problem. The same thing will happen if the interference waves enter continuously, but the probability that the interference waves will enter the same range continuously is very small.
一方、選択回路(7)をMTIフィルタ(2)の後に配
置した場合、MTIフィルタが多重の帰還を持っている
と、トランジェント番こより干渉の影響が長い時間に及
び、この影響を除こう表すると移動目標の検出に悪影響
を与える。On the other hand, if the selection circuit (7) is placed after the MTI filter (2), and the MTI filter has multiple feedbacks, the influence of interference will last longer than the transient number, and this influence can be expressed as follows: Adversely affects the detection of moving targets.
従来の装置は以上のように構成されているので、レーダ
が移動した場合や空中線の仰角を変えた場合に大きな固
定目標からの信号の変化か設定値Xを越える場合かあり
、この時信号は干渉波と判断され、MTIフィルタに入
力される信号は1周期抜けるため、通常の場合よりパル
ス毎の信号の変化が大きくなり、MTIの消え残りか出
ることかあるという問題かあった。Conventional equipment is configured as described above, so when the radar moves or the elevation angle of the antenna changes, the signal from a large fixed target may change or exceed the set value X, and in this case the signal Since the signal that is determined to be an interference wave and is input to the MTI filter misses one cycle, the change in the signal from pulse to pulse becomes larger than in the normal case, and there is a problem that only residual MTI may be output.
この発明は上記のような従来のものの欠点を除去するた
めになされたもので、干渉波と判断した場合に前回の信
号の代わりに、その前後の周期の信号の平均値をMTI
フィルタに入力することにより、MTIフィルタ入力の
急な岐化をなくし、消え残りを減少させることのできる
レータ装置を提供することを目的としている。This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and when it is determined that it is an interference wave, the average value of the signals of the periods before and after the previous signal is used as the MTI.
It is an object of the present invention to provide a filter device that can eliminate abrupt transitions in the MTI filter input and reduce residuals by inputting it to the filter.
以下、この発明の一実施例を図について説明する。An embodiment of the present invention will be described below with reference to the drawings.
第3図において、第1図と同一符号は第1図と同一のも
のを示し、(8)はA/D変換器(1)の出力ディジタ
ル信号の所定レンジの信号を起重する第3のシフトレジ
スタで、これは第1のシフトレジスタ(3)の前に挿入
されている。また、(のはA/D変換器(1)の出力D
、即ち今回の受信信号と第1のシフトレジスタ(3)の
出力B、即ち前々回の受信信号とを平均する平均1路で
ある。In FIG. 3, the same reference numerals as in FIG. 1 indicate the same components as in FIG. A shift register, which is inserted before the first shift register (3). Also, (is the output D of the A/D converter (1)
That is, this is an averaging process in which the current received signal and the output B of the first shift register (3), that is, the received signal from the time before the previous time, are averaged.
本実施例回路の動作において従来のものと異なる点は、
本実施例回路では第3のシフトレジスタ(8)が追加さ
れているため、全体の動作か受信信号を1周期遅らせた
信号で行なうことと、干渉波と判断された場合に従来は
前回の受信信号(第1図のB)をMTIフィルタ(2)
に入力していたか、本実施例では干渉波Aの前後の周期
の信号B、Dの平均値を入力している点である。これに
より、本実施例では処理する信号は、受信信号の1周期
遅れたものになるか、実用上問題はない。また干渉波の
前後の周期の信号の平均値を入力しているので、MTI
フィルタ入力の急激な変化をなくして消え残りを防止す
ることができる。The difference in the operation of the circuit of this embodiment from that of the conventional circuit is as follows.
In this example circuit, a third shift register (8) is added, so the entire operation is performed using a signal delayed by one cycle of the received signal, and when it is determined that it is an interference wave, conventionally The signal (B in Figure 1) is passed through the MTI filter (2)
In this embodiment, the average value of the signals B and D of the periods before and after the interference wave A is input. As a result, in this embodiment, the signal to be processed is delayed by one cycle of the received signal, but there is no problem in practical use. Also, since the average value of the signals before and after the interference wave is input, the MTI
By eliminating sudden changes in the filter input, it is possible to prevent unerased images.
なお上記実施例におけるシフトレジス々f31 +41
+81はメモリにより代用してもよい。In addition, the shift registers f31 +41 in the above embodiment
+81 may be substituted by memory.
以上のように、この発明に係るレーダ装置によれば、干
渉波と判断した場合に、前回の信号の代わりに、その前
後の周期の信号の平均値をMTIフィルタに入力するよ
うにしたので、MTIフィルタ入力の急激な変化をなく
して消え残りを減少させることができ、これにより設定
値Xを決める時の予想より大きな固定目標からの信号か
あった場合1ども、MTIの消去性能を劣化させること
なく、干渉波を除去できる効果がある。As described above, according to the radar device according to the present invention, when an interference wave is determined, the average value of the signals of the cycles before and after the previous signal is input to the MTI filter instead of the previous signal. By eliminating sudden changes in the MTI filter input, it is possible to reduce residual erasure, which degrades the erasure performance of the MTI even if there is a signal from a fixed target that is larger than expected when determining the set value X. This has the effect of eliminating interference waves without causing interference.
第1図は従来のレーダ装置の構成図、第2図は従来の装
置の動作説明図、第3図は本発明の一実施例番とよるレ
ーダ装置の構成図である。
(1)・・・A/D変換器、(2)・・・MTIフィル
タ、(3)・・・シフトレジスタ、(4)・・・シフト
レジスタ、(6)・・・相関回路、(7)・・・選択回
路、(8)・・・シフトレジスタ、(9)・・・平均回
路。
な右図中、同一符号は同−又は相当部分を示す。FIG. 1 is a configuration diagram of a conventional radar device, FIG. 2 is an explanatory diagram of the operation of the conventional device, and FIG. 3 is a configuration diagram of a radar device according to an embodiment of the present invention. (1)...A/D converter, (2)...MTI filter, (3)...shift register, (4)...shift register, (6)...correlation circuit, (7 )... Selection circuit, (8)... Shift register, (9)... Average circuit. In the figure on the right, the same reference numerals indicate the same or equivalent parts.
Claims (1)
D変換器と、このA/D変換器の出力の所定レンジの信
号を送信パルスの周期毎に記憶する複数のシフトレジス
タと、この複数のシフトレジスタの出力として得られる
複数の周期にわたる同一レンジの受信信号の相関をとっ
て干渉波を判別する相関回路と、上記複数のうちの所定
のシフトレジスタの出力受信信号の前後の周期の受信信
号の平均をとる平均回路と、上記相関回路により干渉波
を判別しないとき上記所定のシフトレジスタの出力を、
干渉波を判別したとき上記平均回路の出力を選択出力す
る選択回路と、この選択回路の出力から固定目標成分を
除去する移動目標指示フィルタとを備えたことを特徴と
するレーダ装置。(1) A/A converting the received video signal into a digital signal
A D converter, a plurality of shift registers that store signals in a predetermined range of the output of the A/D converter for each period of the transmission pulse, and a plurality of shift registers that store signals in a predetermined range of the output of the A/D converter for each period of the transmission pulse; A correlation circuit that determines the interference wave by correlating the received signals, an averaging circuit that averages the received signals in cycles before and after the output reception signal of a predetermined shift register among the plurality of shift registers, and the correlation circuit detects the interference wave. When the above predetermined shift register output is not determined,
A radar device comprising: a selection circuit that selects and outputs the output of the averaging circuit when an interference wave is determined; and a moving target indicating filter that removes a fixed target component from the output of the selection circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56099402A JPS58779A (en) | 1981-06-24 | 1981-06-24 | Radar device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56099402A JPS58779A (en) | 1981-06-24 | 1981-06-24 | Radar device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58779A true JPS58779A (en) | 1983-01-05 |
Family
ID=14246494
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56099402A Pending JPS58779A (en) | 1981-06-24 | 1981-06-24 | Radar device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58779A (en) |
-
1981
- 1981-06-24 JP JP56099402A patent/JPS58779A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4090221A (en) | Apparatus for improving video signal-to-noise ratio | |
US5465405A (en) | Apparatus and method for detecting signals | |
US4290125A (en) | Fish detector capable of detecting species of fish | |
US4119910A (en) | Method and apparatus for detecting whether phase difference between two signals is constant | |
JPS5596746A (en) | Adaptive signal discrimination unit | |
US4044352A (en) | Signal processor | |
JPH0693780B2 (en) | Signal processing circuit | |
EP0833483A3 (en) | Phase comparator for demodulator using differential detection | |
GB1509464A (en) | Radar video processors | |
EP0284498B1 (en) | Frequency counter in particular for counting partly varying frequencies in real time | |
JPS6051339A (en) | Arrival time instructing device of receiving signal | |
JPS58779A (en) | Radar device | |
JPH0372798A (en) | Adaptive antenna | |
US4782343A (en) | Device for eliminating fixed echoes in a radar | |
JPS5549042A (en) | Sound momentary break interpolating receiver | |
US4245332A (en) | Receiver circuit for an echo-sounding system | |
JPS5829910B2 (en) | Image signal correlation processing method | |
JPH03128478A (en) | Integration circuit for radar | |
US4458269A (en) | Sampling arrangement for a television ghost signal cancellation system | |
JP2596614B2 (en) | Signal processing method and signal processing device | |
US20020114414A1 (en) | Digital signal processing apparatus | |
JPS5855474B2 (en) | radar device | |
RU1807568C (en) | Device for detection of symmetrical signals | |
EP0446833A2 (en) | Display control apparatus enabling clear display of operation performance of an arithmetic processor | |
JP2614157B2 (en) | STC control signal generation circuit |