JPS58764A - Voltage discriminating circuit - Google Patents
Voltage discriminating circuitInfo
- Publication number
- JPS58764A JPS58764A JP9891481A JP9891481A JPS58764A JP S58764 A JPS58764 A JP S58764A JP 9891481 A JP9891481 A JP 9891481A JP 9891481 A JP9891481 A JP 9891481A JP S58764 A JPS58764 A JP S58764A
- Authority
- JP
- Japan
- Prior art keywords
- diode
- current source
- analog voltage
- diodes
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
- 101000927265 Hyas araneus Arasin 2 Proteins 0.000 description 1
- 230000001139 anti-pruritic effect Effects 0.000 description 1
- 239000003908 antipruritic agent Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16566—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
- G01R19/16576—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 comparing DC or AC voltage with one threshold
Abstract
Description
【発明の詳細な説明】
本発明は、複数のアナログ入力電圧のうち、最も電圧の
高す入力電圧または最も低い入力電圧と等しい電圧を取
出せる入力弁別回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an input discrimination circuit that can extract a voltage equal to the highest or lowest input voltage among a plurality of analog input voltages.
従来の演算増幅器を応用したアナログ重圧最大入力弁別
回路として第１図に示すものが知らｎている。同図にお
いて、演算増幅器１〜３の出力はそれぞれダイオード５
〜７のアノードにそれぞれ導かれ、そのカソードは共通
接続されて出力端子８に接続されている。この出力端子
８Ｆｉ前記演痒増幅器１〜３の負入力端子に抵抗ｌＯ〜
１１介して負帰還接続されている。この演算増幅器１〜
３の正入力端子には入力端子１４〜１６からアナログ入
力電圧がそれぞれ印加さｎる。The circuit shown in FIG. 1 is known as an analog heavy pressure maximum input discrimination circuit using a conventional operational amplifier. In the figure, the outputs of operational amplifiers 1 to 3 are connected to diodes 5, respectively.
~7 anodes, respectively, and their cathodes are connected in common to an output terminal 8. This output terminal 8Fi is connected to the negative input terminal of the antipruritic amplifiers 1 to 3 with a resistor lO~
11 for negative feedback connection. This operational amplifier 1~
Analog input voltages are applied to the positive input terminals 3 from input terminals 14 to 16, respectively.
ダイオード５〜７は負帰還ループ内に挿入さｎているこ
とになるので、ダイオードの順方向電圧ｖ、１；を無視
できる。ダイオード５〜７のカソードは共通接続されて
いるので、入力Ｖ□８．〜Ｖ□Ｎ５のうち最も高い電圧
が印加さｎている演算増幅器１〜３のうちの１つ、例え
ば３は電圧フォロワとじて働く。しかし、残りの演算増
幅器１．２は正入力端より負入力端の電位の方が高いた
め出力は負電源側に飽和しているため、その演算増幅器
１１２の出力端に接続されているダイオード５．６は逆
バイアスとなり出力から切離される。これにより、多数
アナログ入力電圧の内の最大電圧が出力される。Since the diodes 5 to 7 are inserted into the negative feedback loop, the forward voltage v,1 of the diodes can be ignored. Since the cathodes of diodes 5 to 7 are commonly connected, the input V□8. One of the operational amplifiers 1 to 3, for example 3, to which the highest voltage of ~V□N5 is applied functions as a voltage follower. However, since the potential of the negative input terminal of the remaining operational amplifier 1.2 is higher than that of the positive input terminal, the output is saturated to the negative power supply side, so the diode 5 connected to the output terminal of the operational amplifier 112 .6 becomes a reverse bias and is separated from the output. As a result, the maximum voltage among the multiple analog input voltages is output.
しかし、入力数が多くなった場合には、１チヤンネル轟
たりに１個の演算増幅器、１個のダイオードおよび１個
の抵抗がそれぞれ必要となり、この回路を集積化する場
合にもかなりの規模になり、コスト高になる欠点を有す
る。However, when the number of inputs increases, one operational amplifier, one diode, and one resistor are required for each channel, and even if this circuit is integrated, it will require a considerable scale. This has the disadvantage of high cost.
本発明はこの点を改良するもので、多数のアナログ入力
電圧間の差が比較的大きい場合、（１２０ｍＶ以上）少
ない素子数で構成することができるアナログ電圧最大（
または最小）入力弁別回路を提供することを目的とする
。The present invention improves on this point by providing a maximum analog voltage (120 mV or more) that can be constructed with fewer elements (more than 120 mV) when the difference between multiple analog input voltages is relatively large.
or minimum) aims to provide an input discrimination circuit.
本発明は、複数のアナログ電圧入す端子と、この端子と
共通接続接点との間にそれぞれ同一極性に挿入された複
数の第一のダイオードと、この共通接続点と電源の一端
との関に接続さ几たｙ−の定電流源と、この共通接続点
に一端が接続され前記第−の定電流源と直列に順方向と
なる極性の第二のダイオードと、このダイオードの他端
とＭ Ｍｄ電源の他端との間に接続されこのダイオード
とＩＵ列に順方向となる極性であって前記第一の定電流
源のほぼ半分の電流値に設定された第二の定電流源とを
備え、この定電流源と前駅第二のタイオードとの接続点
の電位を出力とするように構成ｊ ｆしたことを特徴と
する。The present invention relates to a plurality of analog voltage input terminals, a plurality of first diodes inserted with the same polarity between the terminals and a common connection contact, and a connection between the common connection point and one end of the power supply. a Y- constant current source connected, a second diode having one end connected to this common connection point and having a forward polarity in series with the Y-th constant current source, the other end of this diode and M A second constant current source connected between the other end of the Md power source and having a polarity that is in the forward direction of the diode and the IU column and set to a current value approximately half of that of the first constant current source. The present invention is characterized in that it is configured such that the potential at the connection point between the constant current source and the second diode at the front station is output.
本発明の一実施例を図面に基づいて説明する。An embodiment of the present invention will be described based on the drawings.
第２図は、本発明第一実施例の要部回路構成図である。FIG. 2 is a diagram showing the main circuit configuration of the first embodiment of the present invention.
第２図で′、工という値をもっ九吐出型１！流源１８の
一端は電源端子１９に、他端はダイオード加のアノード
側にそれぞれ接続されている。この接続点２１にはイン
ピーダンス賛換用増幅器２２の正入力端が接続されてい
る。この増幅器ｎの負入力端子はその出力が帰還され電
圧フォロワとして動作する。前記ダイオード加のカソー
ドは前記電流源１８の２倍の容量、すなわち２１な。値
の吸込型の電流源ｎの一方に接続されている。この電流
源おの他端は接地端２４に接続されている。また、ダイ
オード妬〜ｎのカソードは共通接続さｎ、ダイオード加
のカン〜ドに接続されている。前記タイオード６〜２′
７のアノードにはそれぞれアナログ入力電圧Ｖ工８．〜
ｖＴＮＳが印加される。In Figure 2, the value of ′ and the number of units is 9 discharge type 1! One end of the current source 18 is connected to the power supply terminal 19, and the other end is connected to the anode side of the diode. A positive input terminal of an impedance conversion amplifier 22 is connected to this connection point 21. The output of the negative input terminal of the amplifier n is fed back and operates as a voltage follower. The cathode of the diode has a capacity twice that of the current source 18, that is, 21. It is connected to one side of a value sink type current source n. The other end of this current source is connected to ground terminal 24. Further, the cathodes of the diodes 1 and 2 are commonly connected to the cans of the diodes. Said diode 6~2'
Analog input voltage V is connected to the anodes of 7 and 8. ~
vTNS is applied.
ダイオード５〜２７＃′ｉ、ロジック回路のＯＲ回路で
あや、ダイオードのスイッチング動作によりアナログ入
力電圧Ｖ□９．〜Ｖ□Ｎ３の内報も高い入力電圧が印加
されているダイオードだけが導通し、他のダイオードは
全て逆バイアスとなってライン四から切離なされる。こ
こで導通状態となっているダイオードＫＲれる電流をＩ
Ｄとすると、■＋より一２工＝０ ・・・・
・・・・・（すより
ち＝工
なる電流が流れる。ライン詔上の電圧をｖＬ２Ｂとし、
導通状態となっているダイオードの了ノードに印加され
ている電圧をＶ とすると
■′Ｎω区Ｘ）
友だし、ｋ：ポルツマ／定数、Ｔ：絶対温度、ｑ：電子
の電荷、工。：ダイオードの逆方向飽和電流（以下同じ
）
となる。また、ダイオード２０に流れる電流は工である
から、順方向電圧Ｖアは
浄；了ｑ「耳 ・・・・・・・・（３）となる。こ
のことにより、ダイオード２５〜２７と２０が同じＩ８
なら、ライン２１上には前記（２）式の第２項とダイオ
ード加のＶ、が打ち消された電圧ｖｎ（ｎａｘ）が出力
される。したがって、出力端２９ Ｋは温度補償さｎた
多数人力アナログ電圧の最高（Ｉｌｊが出力される。Diodes 5 to 27#'i and the OR circuit of the logic circuit, the analog input voltage V□9. ~V□N3 also indicates that only the diode to which a high input voltage is applied is conductive, and all other diodes are reverse biased and disconnected from line 4. Here, the current flowing through the conductive diode KR is I
If D, then 12 k = 0 from ■+
...(A current flows. The voltage on the line is vL2B,
If the voltage applied to the terminal node of the diode in the conductive state is V, then ■'Nω ward X) Tomodashi, k: Portsma/constant, T: absolute temperature, q: electron charge, : Reverse saturation current of the diode (same below). Also, since the current flowing through the diode 20 is constant, the forward voltage Va is pure; Same I8
Then, a voltage vn(nax) in which the second term of equation (2) and V added by the diode are canceled is output on the line 21. Therefore, the output terminal 29K outputs the highest temperature-compensated multi-power analog voltage (Ilj).
なお、上記実施例では３チャンネル人力の例を示したが
、必要に応じてカソードを共３Ｉ！１接続しにスイッチ
ングダイオードの数だけを増やすこと番・こより容易に
入力チャンネル数を増やすことができる。また、この回
路を集積化する場合には、ダイオード２５〜２７と加と
＃ｉ特に整合性がよく、梢度の高いものが得られる。In the above embodiment, an example of 3-channel manual operation was shown, but if necessary, the cathodes can be connected to 3 I! The number of input channels can be easily increased by increasing only the number of switching diodes in one connection. Further, when this circuit is integrated, it is possible to obtain a circuit with particularly good matching between the diodes 25 to 27 and the addition #i, and a high degree of coupling.
また、第５図に示す本発明第二実施例のようにダイオー
ドと電流源の極性を逆にすることにより、第一実施例と
全く同様の考え方でアナログ電圧最小弁別回路が構成で
きる。第３図で第２図と同一符号は、第２図と同一の本
のをそｎぞれ示す。Furthermore, by reversing the polarities of the diode and current source as in the second embodiment of the present invention shown in FIG. 5, an analog voltage minimum discriminator circuit can be constructed in exactly the same way as in the first embodiment. In FIG. 3, the same reference numerals as in FIG. 2 indicate the same books as in FIG. 2, respectively.
以上説明したように本発明によｊば、従来回路に比較し
て非常に少ない素子数で、温度的にも安定なアナログ電
圧最大（又は、最小）入力弁別回路を実現することがで
きる効果を有する。As explained above, according to the present invention, it is possible to realize a temperature-stable analog voltage maximum (or minimum) input discrimination circuit with a very small number of elements compared to conventional circuits. have
第１図は従来例回路の要部構成図。
第２図は本発明第一実施例の要部回路構成図。
第３図は本発明第二実施例の要部回路構成図。
１〜３−・演算増幅器、５〜７．２０、δ〜ｌ・・・グ
イメート、１８、※・・・電流源。
特許出願人 日本電気株式会社
代理人 弁理士 井 出 直 孝
亮 １ 図
ｑ
荒 ２ 図FIG. 1 is a diagram showing the main parts of a conventional circuit. FIG. 2 is a diagram showing the main circuit configuration of the first embodiment of the present invention. FIG. 3 is a diagram showing the main circuit configuration of a second embodiment of the present invention. 1-3--Operation amplifier, 5-7.20, δ-l... Guimate, 18, *... Current source. Patent applicant NEC Corporation Representative Patent attorney Takasuke Ide 1 Figure q Ara 2 Figure
Claims (1)
共通接続接点との間尺それぞれ同一極性に挿入され友複
数の第一のダイオードと、この共通接続点と電源の一端
との間に接続された第一の定電流源と、この共通接続点
に一端が接続され前記第一の定電流源と直列に順方向と
なる極性の第二のダイオードと、このダイオードの他端
と前記電源の他端との間に接続されこのタイオードと直
列に順方向となる極性であって前記第一の定電流源のほ
ぼ半分の電流値に設定された第二の定電流源とを備え、
この定電流源と前記第二のダイオードとの接続点の電位
を出力とするように構成された電圧弁別回路。(1) A plurality of analog voltage input terminals, a plurality of first diodes each inserted with the same polarity between the terminals and the common connection contact, and connected between the common connection point and one end of the power supply. a first constant current source, a second diode having one end connected to this common connection point and having a forward polarity in series with the first constant current source; a second constant current source connected between the diode and the diode in series with a forward polarity and set to a current value approximately half that of the first constant current source;
A voltage discrimination circuit configured to output a potential at a connection point between the constant current source and the second diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9891481A JPS58764A (en) | 1981-06-24 | 1981-06-24 | Voltage discriminating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9891481A JPS58764A (en) | 1981-06-24 | 1981-06-24 | Voltage discriminating circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58764A true JPS58764A (en) | 1983-01-05 |
Family
ID=14232392
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9891481A Pending JPS58764A (en) | 1981-06-24 | 1981-06-24 | Voltage discriminating circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58764A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100660856B1 (en) | 2005-01-26 | 2006-12-26 | 삼성전자주식회사 | Apparatus for monitoring plural voltages |
-
1981
- 1981-06-24 JP JP9891481A patent/JPS58764A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100660856B1 (en) | 2005-01-26 | 2006-12-26 | 삼성전자주식회사 | Apparatus for monitoring plural voltages |
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