JPS5875379A - Compensating circuit for up-down pincushion distortion - Google Patents

Abstract

PURPOSE:To ensure the correct interlace, by supplying the compensating signal for up-down pincushion distortion to a vertical output circuit only in a vertical scanning period. CONSTITUTION:The vertical synchronized blanking pulse PB is supplied to a blanking circuit 20. With application of the blanking, the vertical sawtooth wave signal S'V has a waveform C. Therefore the modulation output to be balanced of a vertical flyback time TR is set at zero. As a result, the compensating signal S'CR is delivered from a balanced modulator 4 as shown by a waveform D which lacks the signals only in the time TR. Thus the driving signal S'D delivered from a comparator 6 has a waveform F, and no horizontal parabola wave signal exists at all to the flyback pulse PR. In this connection, a transistor Q3 is turned on and off at the same time point in both n-field and (n+1)-field. As a result, the coincidence is obtained for the timing of vertical deflection, and the raster has the correct interlace.

Description

DETAILED DESCRIPTION OF THE INVENTION There is a correction circuit using a balanced modulator or a saturable reactor to correct vertical bin cushion distortion.

Figure 1 shows an example of a correction circuit using a balanced modulator.

One series synchronous pulse Pv separated by the synchronous separation circuit (1) is supplied to the sawtooth wave generation circuit (2) K to form a vertical sawtooth wave signal Sv (Fig. 2 A), while the synchronous separation The horizontal synchronizing pulse pH is supplied to a parabolic wave generation circuit (3) composed of an integrating circuit, etc., to form a horizontal parabolic wave signal 8H (FIG. 2B).

The vertical ζ-wave signal sy and the horizontal parabolic wave signal 8H are supplied to a balanced modulator (4) to generate the horizontal parabolic wave signal 8.
A correction signal 80R (C in the same figure) of vertical and vertical distortion is formed in which H is balanced-modulated with a vertical sawtooth signal sy.
This is superimposed with a sawtooth wave signal of 8vK by a metal generator (5).

This composite signal 8AD (D in the same figure) is compared with a correction signal S8 for screen size, etc. in a comparator circuit (6), and then the comparison signal 8D (n in the same figure) is sent to the QiaoLan output circuit 4 as a drive signal. supplied/received.

- The direct output circuit 01 is composed of a pair of transistors Ql and Q2 connected in a combination 5EPP and an input transistor Q3 to which a drive signal SD is supplied.

A vertical deflection coil LDY is connected to this vertical output circuit, and a vertical deflection current superimposed with a correction signal 8CH flows through this coil LDY.

In addition, capacitor C is a capacitor for character 8 correction,
R is a resistor for detecting the deflection current, and the detection voltage obtained at both ends is used as a correction signal 8B for screen size, etc.
used as.

Now, in this correction circuit, as shown in FIG. 2, the balanced modulation operation is performed even during the vertical retrace period TI, so that a correction signal 80R as shown in FIG. 2C is obtained during this period TRK41. Therefore, the drive signal 8Df) #I line pulse PR supplied to the vertical output circuit QIK is also modulated and
The waveform is distorted as shown in ft.1. Note that this second
The relationship between the horizontal period and the vertical retrace period TR in the figure does not correspond to the relationship between the actual periods; in reality, it is 5 as shown in FIG.

This figure shows an example in which the rectangle period TR is 12H (H is one horizontal period) Kl, and the original retrace pulse p5 has a waveform without distortion as shown by the dashed line. , in fact, a waveform on which the horizontal parabolic wave signal 8H is superimposed is obtained as shown in FIG. 1 by the correction signal SCRK present in the vertical retrace period Tg:.

Since the output circuit wheel is driven by the drive signal 8D having the distorted compressed pulse PRV, the following problem occurs.

That is, when the waveform of the retrace pulse PR of the drive signal SD obtained in the n-th field is as shown in the figure, and when the VBI of the transistor Qs is 11iRm in the diagram Iia, point 1 is the ON state of the transistor Qs. This is the off switching point. On the other hand, since the drive signal of the (n+1)th field is shifted by o, in from the drive signal of the nth field, it is shifted by the horizontal parabolic wave signal 8H4, 0, 5H superimposed with the retrace pulse PRK. Therefore,
(Il+1) field retrace I (direction of Luss PH
The envelope (partial) on ll5 is shifted by 0.5H, as shown by the broken line in FIG. As a result, (n+
1) The switching point of the transistor Qs in the field is a point temporally preceding the first point by 0.5H.

As described above, since the switching tie-inter of the transistor Qs is shifted by the field, the phase of the vertical deflection current flowing through the linear deflection coil LDY is shifted by the output signal Iii[, resulting in incomplete interlacing.

That is, the middle K (El+
1) The raster of the field is not positioned and is shifted to either side, resulting in incorrect interlacing.This problem is solved by the balanced modulator (4)t shown in Figure 1.
- This phenomenon occurs not only in the correction circuit used, but also in a commonly known correction circuit using a saturable reactor.

This imperfection of interlacing is hardly a problem in normal television receivers used for home use, but it is especially true in broadcasting stations! In high-end television receivers such as those used for star monitors, interlacing must be performed accurately, so it is necessary to correct this.

Therefore, the present invention is devised to interlace correctly. Therefore, in the present invention, a correction signal for correcting the upper and lower bottle cushion distortion is supplied to one direct output circuit (IK) only during the vertical scanning period.

Next, a case in which an example of the present invention is applied to the above-mentioned correction circuit will be described with reference to FIG. 4 and subsequent figures.

In the example shown in FIG. 4, when the vertical sawtooth signal Sv supplied to the balanced modulator (4) is blanked, the vertical sawtooth signal obtained by [i[m As shown in the figure, a blanking circuit is provided, to which a vertically periodic blanking pulse FB (IIS diagram B) is supplied.

Therefore, by applying this blanking, the vertical sawtooth signal Sv' becomes K as shown in FIG. 5C, so that the balanced modulation output during the vertical retrace period TH becomes zero. Therefore,
The balanced modulator (4) outputs a correction signal 80R as shown in Figure 5, in which no signal is present during the vertical retrace period TR, and as a result, the drive signal S output from the comparator circuit (6)
D' becomes as shown in FIG. 5F, and there is no horizontal parabolic wave signal sH in the retrace pulse PR.

From this, the on/off timing of transistor Q3 is the same for both the n field and the (fl+1) field.

Both are at the same point in time, 11 direct deflection currents Therefore, the vertical deflection tie-inters match, and the raster is correctly interlaced.In addition, instead of blanking the 6-line shear wave signal Sv, Ii direct deflection Even if you blank the horizontal parabolic wave signal sH obtained during the period TRk,! 11th return period TR
A corrected signal ScR is obtained in which only the signal is missing.

In the example of FIG. 4, the [1IiL sawtooth signal 8v is supplied to the adder (5) K, but the vertical sawtooth signal Sv' after blanking is used instead of the -1IiL sawtooth signal Sv. Adder (5)K supplies 5KL.

It's okay.

Fig. 6 shows a case where the present invention is applied to a correction circuit designed to correct upper and lower pink distortion distortion using a saturable reactor.
01) K is supplied with the horizontal synchronizing pulse PH, and in this example, the horizontal synchronizing pulse pH is supplied via the blanking circuit cIIJv. Also, part 2
The secondary coil (36b) is connected to the vertical deflection coil LDYK via the variable inductance element Glv, and a capacitor is connected in parallel to the secondary coil (30b) and the variable inductance element 0υ to form a parallel resonant circuit (toward).
is configured, and is superimposed on the vertical deflection current by adjusting the variable inductance element Cl1). The phase of the horizontal parabolic wave signal sH, which is a correction signal for vertical bin cushion distortion, is controlled.

Since the supply of the horizontal synchronizing pulse can be controlled by the blanking pulse PBK, the correction circuit can be controlled by the blanking pulse PBK. It is possible to correct the distortion.

As described above, according to the present invention, there is no correction signal during the Ii retrace period TR, so the waveform of the retrace pulse PR is not set to 1 by the horizontal parabolic wave signal 8H. Therefore, since the tie-inter of the single direct deflection does not vary depending on the field, the raster can be correctly interlaced. Therefore, the present invention is particularly suitable for application to a television receiver for a master monitor in a station.

[Brief explanation of the drawing]

FIG. 1 is a system diagram showing a conventional example of an upper and lower binarcus distortion correction circuit, FIGS. 2 and 3 are waveform diagrams for explaining its operation, and FIG. 4 is an upper and lower binarcus distortion correction circuit according to the present invention. A system diagram showing an example. Figure 6 shows the theory of operation I! FIG. 6 is a connection diagram showing the main parts of another example of the present invention. (2) - sawtooth wave signal 8VF) formation circuit, (3)
is a horizontal parabolic wave signal sH forming circuit % (4) is a balanced modulator', a is a single direct output circuit, and LDY is a single direct deflection coil. SCRe SCR is a correction signal. Figure 2

Claims (1)

[Claims] A top and bottom bin distortion correction circuit supplies a correction signal for correcting top and bottom bin cushion distortion only during one direct scanning period, and does not supply it during Illllll edge periods.