JPH0521470B2 - - Google Patents
Info
- Publication number
- JPH0521470B2 JPH0521470B2 JP60134902A JP13490285A JPH0521470B2 JP H0521470 B2 JPH0521470 B2 JP H0521470B2 JP 60134902 A JP60134902 A JP 60134902A JP 13490285 A JP13490285 A JP 13490285A JP H0521470 B2 JPH0521470 B2 JP H0521470B2
- Authority
- JP
- Japan
- Prior art keywords
- vertical
- signal
- pincushion distortion
- circuit
- distortion correction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 241000226585 Antennaria plantaginifolia Species 0.000 claims description 50
- 230000000630 rising effect Effects 0.000 claims description 11
- 238000005070 sampling Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- 230000006866 deterioration Effects 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
Landscapes
- Details Of Television Scanning (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、インターレース信号を入力とする
テレビ受信機において上下糸巻歪補正回路を付加
した場合、上下糸巻歪補正信号を垂直走査始まり
の立上がり部分で抜取り、インターレースを良好
なものとする上下糸巻歪補正回路に関するもので
ある。[Detailed Description of the Invention] [Industrial Application Field] The present invention provides that when a top and bottom pincushion distortion correction circuit is added to a television receiver that inputs interlaced signals, the top and bottom pincushion distortion correction signals are adjusted to the rising portion at the beginning of vertical scanning. The present invention relates to a vertical pincushion distortion correction circuit that improves interlacing and sampling.
第３図は例えば初等カラーテレビ教科書（電子
機械工業会・テレビ技術委員会編 オーム社 昭
和43年12月10日発行 p.144）を参考にして上下
糸巻歪補正回路のブロツク図を表わしたものであ
り、図において、１は垂直ドライブ回路と、その
後段の垂直出力回路とを有し、垂直偏向出力を上
記垂直ドライブ回路に負帰還するよう構成した垂
直偏向回路、２は上記垂直偏向出力により駆動さ
れる垂直偏向ヨーク、３は水平同期パラボラと垂
直鋸歯状波を入力として、上下糸巻歪補正信号を
形成する上下糸巻歪補正信号変調器（Ｔ／Ｂ−
PCC変調器）、４は上下糸巻歪補正信号変調器３
出力信号をドライブする上下糸巻歪補正信号ドラ
イブ回路（Ｔ／Ｂ−PCCドライブ回路）、５は垂
直偏向回路１出力電流Ｉに、上下糸巻歪補正信号
ドライブ回路４の出力電流を重畳するための垂直
偏向電流変調器である。
Figure 3 shows the block diagram of the upper and lower pincushion distortion correction circuit, with reference to, for example, the elementary color television textbook (edited by the Electronic Equipment Manufacturers Association, Television Technology Committee, published by Ohmsha, December 10, 1961, p. 144). In the figure, 1 is a vertical deflection circuit that has a vertical drive circuit and a subsequent vertical output circuit, and is configured to feed back the vertical deflection output negatively to the vertical drive circuit; The driven vertical deflection yoke, 3, is a vertical pincushion distortion correction signal modulator (T/B-) which receives the horizontal synchronization parabola and vertical sawtooth wave as input and forms a vertical pincushion distortion correction signal.
PCC modulator), 4 is the upper and lower pincushion distortion correction signal modulator 3
A vertical pincushion distortion correction signal drive circuit (T/B-PCC drive circuit) 5 drives the output signal, and a vertical pincushion distortion correction signal drive circuit 5 superimposes the output current of the vertical pincushion distortion correction signal drive circuit 4 on the output current I of the vertical deflection circuit 1. It is a deflection current modulator.
次に第４図により、上下糸巻歪補正回路の動作
を説明する。 Next, the operation of the vertical pincushion distortion correction circuit will be explained with reference to FIG.
垂直偏向回路１に、垂直同期信号Vsaが入力さ
れると、Vsに同期した垂直鋸歯状偏向電流Ｉが
偏向ヨーク２に流れる。この時、ここで発生した
垂直鋸歯状信号VTｂと水平同期パラボラ信号VH
ｃとを上下糸巻歪補正信号変調器３の入力とし、
上下糸巻歪補正信号ｄを得る。この上下糸巻歪補
正信号ｄは上下糸巻歪補正信号ドライブ回路４を
経て、垂直偏向電流変調器５をドライブする。垂
直偏向電流変調器５は、例えば第３図に示すよう
に、トランス結合等により、垂直偏向電流Ｉに上
下糸巻歪補正信号ｄを重畳するものである。 When a vertical synchronizing signal Vsa is input to the vertical deflection circuit 1, a vertical sawtooth deflection current I synchronized with Vs flows through the deflection yoke 2. At this time, the vertical sawtooth signal V T b generated here and the horizontal synchronous parabolic signal V H
c and is input to the vertical pincushion distortion correction signal modulator 3,
A vertical pincushion distortion correction signal d is obtained. This vertical pincushion distortion correction signal d passes through a vertical pincushion distortion correction signal drive circuit 4 and drives a vertical deflection current modulator 5. The vertical deflection current modulator 5 superimposes the vertical pincushion distortion correction signal d on the vertical deflection current I by transformer coupling or the like, as shown in FIG. 3, for example.
従来の上下糸巻歪補正回路は以上のように構成
されており、一般に垂直偏向回路１は垂直鋸歯状
波の直線性補正のため、垂直偏向回路内部のドラ
イブ回路に、出力垂直鋸歯状信号VTの帰還をか
けている。この場合、垂直鋸歯状信号VTには、
上下糸巻歪補正信号による水平パラボラ成分がの
つているので、これによる水平信号成分は、垂直
偏向回路１内ルーブに入り込んでしまう。今、イ
ンターレースを考えた場合、垂直偏向回路１内ド
ライブ回路出力は、第４図ｅに示す波形となり、
その垂直ドライブパルス立上がり部分taに注目す
ると、第５図ｆに示す波形で表わされる。垂直ド
ライブパルスｆの立ち上がりはtbの幅をもつてお
り、垂直出力回路が動作するためのスレシヨール
ドレベルをVthとした時、インターレース信号の
場合、例えばｇの水平同期パラボラ信号が奇数フ
イールドのタイミングであるとすれば、偶数フイ
ールドの水平同期パラボラ信号のタイミングはｈ
となる。前述の通り、垂直偏向回路内ループに
は、この水平信号成分が入り込んでいるので、奇
数フイールドｇと偶数フイールドｈでは、垂直ド
ライブパルスｆに水平同期周波数Hの半周期１／
（2H）位相のずれた水平信号成分が重畳される。
従つて、奇数フイールド、偶数フイールドで、垂
直ドライブパルス立上がりが、Vthに到達するタ
イミングが１／（2H）からずれることになり、
インターレースが悪くなるという問題点がある。
The conventional vertical pincushion distortion correction circuit is configured as described above. Generally, the vertical deflection circuit 1 inputs the output vertical sawtooth signal V T to the drive circuit inside the vertical deflection circuit in order to correct the linearity of the vertical sawtooth wave. is hoping for the return of In this case, the vertical sawtooth signal V T has
Since the horizontal parabola component due to the vertical pincushion distortion correction signal is present, the horizontal signal component resulting from this will enter the lube in the vertical deflection circuit 1. Now, when considering interlacing, the output of the drive circuit in the vertical deflection circuit 1 has the waveform shown in Figure 4e,
If we pay attention to the rising portion ta of the vertical drive pulse, it is represented by the waveform shown in FIG. 5f. The rising edge of the vertical drive pulse f has a width t b , and when the threshold level for operating the vertical output circuit is Vth, in the case of an interlaced signal, for example, the horizontal synchronization parabola signal g is in an odd field. If it is a timing, the timing of the horizontal synchronization parabola signal of an even field is h
becomes. As mentioned above, this horizontal signal component enters the loop in the vertical deflection circuit, so in the odd field g and even field h, the vertical drive pulse f has a half period 1/1 of the horizontal synchronization frequency H.
( 2H ) Out-of-phase horizontal signal components are superimposed.
Therefore, in odd-numbered fields and even-numbered fields, the timing at which the vertical drive pulse rises to Vth will deviate from 1/( 2H ).
There is a problem that interlacing becomes worse.
この発明は上記のような問題点を解消するため
になされたもので、奇数フイールド、偶数フイー
ルドにかかわらず、垂直ドライブパルスの立上り
に要する時間を常に一定にすることができ、これ
によつて糸巻歪の補正をインターレースの劣化を
招くことなく行うことができる上下糸巻歪補正回
路を得ることを目的とする。 This invention was made to solve the above-mentioned problems. Regardless of whether the field is an odd number field or an even number field, the time required for the rise of the vertical drive pulse can be made constant. It is an object of the present invention to provide an upper and lower pincushion distortion correction circuit capable of correcting distortion without causing deterioration of interlacing.
この発明にかかる上下糸巻歪補正回路は、垂直
偏向ドライブ信号の立上り期間、上下糸巻歪補正
信号の垂直偏向出力への重畳を停止するよう構成
したものである。
The vertical pincushion distortion correction circuit according to the present invention is configured to stop superimposing the vertical pincushion distortion correction signal on the vertical deflection output during the rising edge period of the vertical deflection drive signal.
この発明においては、垂直偏向ドライブ信号の
立上り期間、上下糸巻歪補正信号の垂直偏向出力
への重畳を停止するようにしたから、垂直偏向ド
ライブ信号が完全に立ち上がつてしまうまでは糸
巻歪補正信号の成分が垂直偏向出力へ影響するこ
とはなくなる。これにより垂直偏向ドライブ信号
の立上りに要する時間は、奇数フイールド、偶数
フイールドにかかわらず常に一定となり、上下糸
巻歪補正をインターレースの悪化を招くことなく
良好に行うことができる。
In this invention, since the superimposition of the vertical pincushion distortion correction signal on the vertical deflection output is stopped during the rising period of the vertical deflection drive signal, the pincushion distortion correction signal is not corrected until the vertical deflection drive signal completely rises. The signal components no longer affect the vertical deflection output. As a result, the time required for the vertical deflection drive signal to rise is always constant regardless of whether it is an odd field or an even field, and vertical pincushion distortion can be corrected well without causing deterioration of interlacing.
以下、この発明の一実施例を図について説明す
る。第１図において、１〜５は前記従来回路と全
く同じものである。６は垂直偏向回路１の垂直同
期信号または垂直ドライブ出力信号等の信号から
上下糸巻歪補正信号を抜きとるためのパルスを発
生、成形する抜取パルス発生回路、７は抜取パル
ス発生回路６で発生したパルスで上下糸巻歪補正
信号変調器３の出力を抜きとる信号抜取回路であ
る。
An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, numerals 1 to 5 are exactly the same as the conventional circuit. 6 is a sampling pulse generation circuit that generates and shapes a pulse for extracting the vertical pincushion distortion correction signal from a signal such as a vertical synchronization signal or a vertical drive output signal of the vertical deflection circuit 1; This is a signal extraction circuit that extracts the output of the upper and lower pincushion distortion correction signal modulator 3 using pulses.
次に第１図における動作を第２図により説明す
る。信号波形ａ〜ｄは従来例における第４図と同
様であるので省略する。まず、垂直偏向回路１か
ら、例えば、垂直ドライブ出力信号ｅを取出し、
抜取パルス発生回路６に入力する。ここで、垂直
ドライブ出力信号ｅの垂直同期パルス成分（垂直
帰線パルス）を抜取り、時定数回路により若干遅
らせて、垂直ドライブ立上がり期間taにおいて、
信号抜取パルスｉが完全にHigh（またはLow）状
態となるように波形成形する。この上下糸巻歪補
正信号抜取パルスｉを入力とする信号抜取回路７
では、上下糸巻歪補正信号変調器３の出力信号ｄ
を上下糸巻歪補正信号抜取パルスｉの期間だけ抜
きとり、上下糸巻歪補正信号ｊを出力し、上下糸
巻歪補正ドライブ回路４に入力する。この他の動
作については、前記第３図の説明で述べたものと
同様である。 Next, the operation in FIG. 1 will be explained with reference to FIG. 2. Signal waveforms a to d are the same as those shown in FIG. 4 in the conventional example, so their description will be omitted. First, take out, for example, the vertical drive output signal e from the vertical deflection circuit 1,
It is input to the sampling pulse generation circuit 6. Here, the vertical synchronizing pulse component (vertical retrace pulse) of the vertical drive output signal e is extracted and delayed slightly by a time constant circuit, and during the vertical drive rising period ta,
The waveform is shaped so that the signal sampling pulse i is completely in a High (or Low) state. A signal sampling circuit 7 which receives this vertical pincushion distortion correction signal sampling pulse i as input.
Now, the output signal d of the vertical pincushion distortion correction signal modulator 3
is extracted during the period of the upper and lower pincushion distortion correction signal extraction pulse i, and the upper and lower pincushion distortion correction signal j is outputted and input to the upper and lower pincushion distortion correction drive circuit 4. Other operations are similar to those described in the explanation of FIG. 3 above.
このようにして、垂直帰線期間から垂直走査期
間に移る垂直ドライブ信号の立上り期間上下糸巻
歪補正信号ｊを無信号としたので、垂直ドライブ
信号の立上りのみ同期した垂直偏向出力が得られ
インターレースは良好なものとなる。 In this way, since the vertical pincushion distortion correction signal j is made non-signal during the rising edge of the vertical drive signal that moves from the vertical retrace period to the vertical scanning period, a vertical deflection output that is synchronized only with the rising edge of the vertical drive signal can be obtained, and interlacing is eliminated. It will be good.
またこの実施例では、垂直帰線期間内も上下糸
巻歪補正信号が無信号状態となつているため、上
下糸巻歪補正信号成分の影響により垂直帰線パル
スに歪みが生じたり、垂直帰線消去が不完全とな
つたりするのを防止することができる。 In addition, in this embodiment, since the upper and lower pincushion distortion correction signals are in a non-signal state even during the vertical retrace period, distortion may occur in the vertical retrace pulse due to the influence of the upper and lower pincushion distortion correction signal components, and vertical retrace cancellation may occur. can be prevented from becoming incomplete.
なお、上記実施例では、信号抜取回路７を上下
糸巻歪補正信号変調器３と上下糸巻歪補正ドライ
ブ回路４との間に接続したものを示したが、例え
ば、垂直鋸歯状信号VTが上下糸巻歪補正信号変
調器３に入力される前に、垂直鋸歯状信号VTに、
上記実施例と同様の信号抜取りを行なうようにし
ても、または、上下糸巻歪補正ドライブ回路４出
力部において、上記実施例と同様の信号抜取りを
行なうようにしても同様の効果が期待できる。 In the above embodiment, the signal sampling circuit 7 is connected between the upper and lower pincushion distortion correction signal modulators 3 and the upper and lower pincushion distortion correction drive circuits 4. For example, if the vertical sawtooth signal V T Before being input to the pincushion distortion correction signal modulator 3, the vertical sawtooth signal V T is
The same effect can be expected even if the same signal sampling as in the above embodiment is performed, or even if the signal sampling is performed in the same manner as in the above embodiment at the output section of the upper and lower pincushion distortion correction drive circuit 4.
以上のように、この発明に係る上下糸巻歪補正
回路によれば、垂直偏向ドライブ信号の立上り期
間、上下糸巻歪補正信号の垂直偏向出力への重畳
を停止するようにしたので、垂直偏向ドライブ信
号の立上りに要する時間は、奇数フイールド、偶
数フイールドにかかわらず常に一定となり、上下
糸巻歪補正をインターレースの悪化を招くことな
く良好に行うことができる効果がある。
As described above, according to the vertical pincushion distortion correction circuit according to the present invention, since the superimposition of the vertical pincushion distortion correction signal on the vertical deflection output is stopped during the rising period of the vertical deflection drive signal, the vertical deflection drive signal The time required for the rise of is always constant regardless of whether it is an odd field or an even field, which has the effect that vertical pincushion distortion correction can be performed satisfactorily without causing deterioration of interlacing.
第１図はこの発明の一実施例による上下糸巻歪
補正回路構成図、第２図はこの実施例回路の動作
波形図、第３図は従来の上下糸巻歪補正回路構成
図、第４図は従来の回路の動作波形図、第５図は
垂直ドライブ波形立ち上がり時におけるタイミン
グ図である。
図において、１は垂直偏向回路、６は抜取パル
ス発生回路、７は信号抜取回路、ｄは上下糸巻歪
補正信号、ｅは垂直偏向ドライブ信号、ｉは抜取
りパルスである。なお、図中同一符号は同一、ま
たは相当部分を示す。
FIG. 1 is a block diagram of a top and bottom pincushion distortion correction circuit according to an embodiment of the present invention, FIG. 2 is an operational waveform diagram of this embodiment circuit, FIG. 3 is a block diagram of a conventional top and bottom pincushion distortion correction circuit, and FIG. FIG. 5, which is an operational waveform diagram of the conventional circuit, is a timing diagram at the rise of the vertical drive waveform. In the figure, 1 is a vertical deflection circuit, 6 is a sampling pulse generation circuit, 7 is a signal sampling circuit, d is an upper and lower pincushion distortion correction signal, e is a vertical deflection drive signal, and i is a sampling pulse. Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
路とを有し、垂直偏向出力を上記垂直ドライブ回
路に負帰還するよう構成した垂直偏向回路を備
え、インターレース方式のテレビ信号を入力とす
るテレビジヨン受信機において、上記垂直偏向出
力に上下糸巻歪補正信号を重畳して上下糸巻歪を
補正する補正回路において、 垂直帰線期間直後の垂直偏向ドライブ信号の立
上り期間、上下糸巻歪補正信号の垂直偏向出力へ
の重畳を停止する補正信号制御手段を備えたこと
を特徴とする上下糸巻歪補正回路。 ２ 上記補正信号制御手段は、 上記垂直帰線期間直後の垂直偏向ドライブ信号
の立上り期間だけでなく、垂直帰線期間も上下糸
巻歪補正信号の垂直偏向出力への重畳を停止する
よう構成されていることを特徴とする特許請求の
範囲第１項記載の上下糸巻歪補正回路。[Claims] 1. A vertical deflection circuit comprising a vertical drive circuit and a subsequent vertical output circuit, configured to feed back a vertical deflection output negatively to the vertical drive circuit, and capable of outputting an interlaced television signal. In the input television receiver, in the correction circuit that corrects the vertical pincushion distortion by superimposing the vertical pincushion distortion correction signal on the vertical deflection output, the vertical pincushion distortion is corrected during the rising period of the vertical deflection drive signal immediately after the vertical retrace period. A vertical pincushion distortion correction circuit comprising correction signal control means for stopping superimposition of a correction signal on a vertical deflection output. 2. The correction signal control means is configured to stop superimposing the vertical pincushion distortion correction signal on the vertical deflection output not only during the rising period of the vertical deflection drive signal immediately after the vertical retrace period, but also during the vertical retrace period. The vertical pincushion distortion correction circuit according to claim 1, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13490285A JPS61293072A (en) | 1985-06-20 | 1985-06-20 | Correcting circuit for upper and lower pincushion distortion |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13490285A JPS61293072A (en) | 1985-06-20 | 1985-06-20 | Correcting circuit for upper and lower pincushion distortion |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61293072A JPS61293072A (en) | 1986-12-23 |
| JPH0521470B2 true JPH0521470B2 (en) | 1993-03-24 |
Family
ID=15139192
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13490285A Granted JPS61293072A (en) | 1985-06-20 | 1985-06-20 | Correcting circuit for upper and lower pincushion distortion |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61293072A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS553871A (en) * | 1978-06-27 | 1980-01-11 | Toho Rayon Co Ltd | Adsorbent for removal of poisonous gas containing sulfur |
| JPS5875379A (en) * | 1981-10-29 | 1983-05-07 | Sony Corp | Compensating circuit for up-down pincushion distortion |
-
1985
- 1985-06-20 JP JP13490285A patent/JPS61293072A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS553871A (en) * | 1978-06-27 | 1980-01-11 | Toho Rayon Co Ltd | Adsorbent for removal of poisonous gas containing sulfur |
| JPS5875379A (en) * | 1981-10-29 | 1983-05-07 | Sony Corp | Compensating circuit for up-down pincushion distortion |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61293072A (en) | 1986-12-23 |
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