JPS5873146A - Hybrid integrated circuit and manufacture thereof - Google Patents

Hybrid integrated circuit and manufacture thereof

Info

Publication number
JPS5873146A
JPS5873146A JP56171405A JP17140581A JPS5873146A JP S5873146 A JPS5873146 A JP S5873146A JP 56171405 A JP56171405 A JP 56171405A JP 17140581 A JP17140581 A JP 17140581A JP S5873146 A JPS5873146 A JP S5873146A
Authority
JP
Japan
Prior art keywords
glass
thick film
substrate
conductor
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56171405A
Other languages
Japanese (ja)
Inventor
Shinya Niizaki
新居崎 信也
Kazutami Kawamoto
和民 川本
Ichiro Ishi
石 一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56171405A priority Critical patent/JPS5873146A/en
Publication of JPS5873146A publication Critical patent/JPS5873146A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/01Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
    • H01L27/013Thick-film circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/381Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Abstract

PURPOSE:To obtain a small-sized hybrid integrated circuit with a highly precise and stabilized resistor and a conductor having high connecting strength by a method wherein a glass intermediate layer is formed between a high dielectric constant substrate and a thick film resistor with a conductor. CONSTITUTION:A glass layer 4 is provided on the high dielectric constant substrate 1, consisting of rutile type or probeskite type dielectric grains 9 such as ZrTiO4, CaTiO3 and the like, a distribution constant line 2, conductors 4 and 5, a thick film resistor 6, an active element 4, and a capacitor 7 are provided, and an earth conductor 2' is attached to the back side of the glass layer 14. The glass 14 on the dielectric particles 9 is infiltrated into the substrate by sintering. The thick film resistor consists of the conductive material praticles 10 of ruthenium such as RuO2 and the like which was connected by the glass binder 11 having Pb, Si, Ca and the like as main components. Because there exists the glass layer 14 below the binder 11, the infiltration and diffusion into lower part is a little, and the particles 10 are connected moderately. Besides, the sintering of the thick film or the conductor is to be performed at the temperature lower than that of the transition or crystallization of glass. According to this constitution, the obtained resistors have excellent accuracy and stability, and a small-sized hybrid IC of high adhesive strength can be obtained.

Description

【発明の詳細な説明】 本発明は、マイクロ波混成集積回路の構造およびその製
造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a structure of a microwave hybrid integrated circuit and a method of manufacturing the same.

従来、UHF@の電気回路はコイルとコンデンサおよび
トランジスタ等の能動素子で構成されていたが、精度を
向上させ、調整工程をなくし、薄形にするためには、共
振回路等の平面化すなわち分布定数線路化が望まれる。
Conventionally, UHF@ electric circuits were composed of active elements such as coils, capacitors, and transistors, but in order to improve accuracy, eliminate adjustment processes, and make them thinner, it was necessary to flatten or distribute the resonant circuit etc. A constant line is desired.

例えば、帯域増幅器を分布定数回路で構成した場合、分
布定数線路の大きさは、混成集積回路で一般に用いられ
てるアルミナ基板(誘電率ε 9)を用いると、IGH
zの帯域増幅器では第1表より明らかなように1辺が5
〜1o6nの大きさとなり実用的ではない。このため高
誘電率基板(ε〉1o)を用いると1.第1表に示すよ
うに例えばε 36で約6crn角、ε 100で2c
rn角の大きさとなり実用的な混成集積回路の大きさと
なる。
For example, when a band amplifier is configured with a distributed constant circuit, the size of the distributed constant line is IGH if an alumina substrate (dielectric constant ε 9), which is commonly used in hybrid integrated circuits, is used.
As is clear from Table 1, for the Z band amplifier, one side is 5.
The size is 106n, which is not practical. Therefore, if a high dielectric constant substrate (ε>1o) is used, 1. As shown in Table 1, for example, when ε is 36, it is about 6 crn angle, and when ε is 100, it is about 2 crn angle.
This is the size of the rn angle, which is the size of a practical hybrid integrated circuit.

(hス下41白ジ 第1表 基板誘電率と波長(1Qflz)第1図はこの
高誘電率基板を用いた混成集積回路の断面模式図で、裏
面アース導体2′を形成した高誘電率基板1上に分布定
数線路導体2゜ボンディング部品搭載用導体4,5が形
成されさらに抵抗6が形成されている。この配線基板に
、トランジスタ等の能動素子6.チップコンデンサ等の
部品7がはんだ8で部品搭載用導体4.5に接続して搭
載され、混成集積回路が完成する。ところで、高誘電率
基板上に厚膜抵抗体を形成すると第2図に示すように、
通常のアルミナ基板に形成した場合のシート抵抗値の数
倍の値を示し、そのばらつきおよび経時変化も大きい。
(Table 1 on white page, bottom 41) Substrate dielectric constant and wavelength (1Qflz) Figure 1 is a cross-sectional schematic diagram of a hybrid integrated circuit using this high dielectric constant substrate. A distributed constant line conductor 2° and bonding component mounting conductors 4 and 5 are formed on a substrate 1, and a resistor 6 is further formed.On this wiring substrate, an active element 6 such as a transistor, and a component 7 such as a chip capacitor are soldered. At step 8, the component mounting conductor 4.5 is connected and mounted to complete the hybrid integrated circuit.By the way, when a thick film resistor is formed on a high dielectric constant substrate, as shown in FIG.
The sheet resistance value is several times higher than that when formed on a normal alumina substrate, and its variation and change over time are also large.

第6図(a)は高誘電率基板上に形成された厚膜抵抗の
断面模式図を示したもので、ZrT104IZnTiO
4,MgTiO31CaTiO3等ノルチル型ないしベ
ブロスヵイト型誘電体粒9上に、RIJO21Bi2R
uO7+ PbzRu20s  等のルテニウム系導電
物質10が付着し、さらに該導電物質問と基板誘電休校
は、主成分がPb + bi+ Ca 9Mg等である
厚膜抵抗体ガラスバインダ11にょシ接着されている。
Figure 6(a) shows a schematic cross-sectional view of a thick film resistor formed on a high dielectric constant substrate.
4, RIJO21Bi2R on nortyl type or bevlovskite type dielectric grains 9 such as MgTiO31CaTiO3
A ruthenium-based conductive material 10 such as uO7+PbzRu20s is attached, and the conductive material and the substrate dielectric material are bonded to a thick film resistor glass binder 11 whose main component is Pb+bi+Ca9Mg or the like.

厚膜抵抗体はこのガラスにょシ導電物質粒子10間が適
度に接続され、所望のシート抵抗値を得ていると言われ
ている。高誘電率基板上での厚膜抵抗体の抵抗値が大き
いのは、第3図(b)に示すように通常のアルミナ基板
上に形成した場合のカラスの分布12より、高誘電率基
板上でのガラスの分布16は前記ppm体の粒界間によ
り−1−浸透していき、抵抗導電粒子間の適度な接続が
行なわれないためと推定される。
It is said that in the thick film resistor, the glass conductive material particles 10 are appropriately connected to obtain a desired sheet resistance value. The reason why the resistance value of a thick film resistor on a high dielectric constant substrate is large is that the resistance value of a thick film resistor on a high dielectric constant substrate is higher than that when it is formed on a normal alumina substrate, as shown in Fig. 3(b). It is presumed that the glass distribution 16 in the above is because -1- penetrates between the grain boundaries of the ppm body, and appropriate connection between the resistive conductive particles is not achieved.

以上抵抗体で説明したが、高n電率基板上に形成し、た
厚膜導体の接着強度も、アルミナ基板上に形成した場合
に比較し、数分の1から1桁小さい強度であり、この原
因もバインダガラス成分の基板中への過剰な浸透のため
と推定される。
Although the above explanation was made using a resistor, the adhesive strength of a thick film conductor formed on a high-n conductivity substrate is also a few orders of magnitude lower than that of a thick film conductor formed on an alumina substrate. The reason for this is also presumed to be excessive penetration of the binder glass component into the substrate.

本発明の目的は、上記した高誘電率基板を用いた従来混
成集積回路の欠点をなくし、精度。
The purpose of the present invention is to eliminate the drawbacks of conventional hybrid integrated circuits using high dielectric constant substrates as described above, and to improve accuracy.

および安定性の高い抵抗体、接続強度の大きい導体を有
する小形マイクロ波混成集積回路とその製造方法を提供
するにある。
Another object of the present invention is to provide a small microwave hybrid integrated circuit having a resistor with high stability and a conductor with high connection strength, and a method for manufacturing the same.

このために、高誘1率基板と、厚膜抵抗体。For this purpose, a high dielectric constant substrate and a thick film resistor are used.

導体間にガラスよりなる中間層を形成する。An intermediate layer of glass is formed between the conductors.

以下本発明を具体例を用いて詳細に説明する○第4図は
本発明の1実施例の断面模式図で、グレーズ層14を形
成した高誘電率基板1の上面に分布定数線路導体2.ボ
ンディング部品搭載等導体4,5、および厚膜抵抗体6
を、裏面にアース導体2′を形成した配線基板上に、ト
ランジスタ等の能動素子4、チップコンデンサ等の部品
7を搭載したものである。第5図(&)は、本実施例の
厚膜抵抗体と高誘電率基板部の断面模盛、図で、vI電
体粒9上に形成されたカラス14は焼成により高誘電率
基板内部に浸透しているが、このグレーズ層上に形成さ
れた抵抗体は、ルテニウム系導電物質10間と基板を接
続する抵抗体用ガラスバインダ11は、下にグレーズ層
があるだめ、下部への浸透・拡散が少なく、導電物質間
の適度な接続を保っている。
The present invention will be explained in detail below using specific examples. ○ Fig. 4 is a schematic cross-sectional view of one embodiment of the present invention, in which a distributed constant line conductor 2. Conductors 4, 5, and thick film resistor 6 with bonding components mounted
Active elements 4 such as transistors and components 7 such as chip capacitors are mounted on a wiring board with a ground conductor 2' formed on the back surface. FIG. 5 (&) is a schematic diagram of the cross section of the thick film resistor and high dielectric constant substrate of this example, and the crow 14 formed on the vI electric particles 9 is inside the high dielectric constant substrate by firing. However, in the resistor formed on this glaze layer, the resistor glass binder 11 that connects the ruthenium-based conductive material 10 and the substrate penetrates into the lower part because there is a glaze layer below.・There is little diffusion and maintains an appropriate connection between conductive materials.

前記したことより、実施例に示す混成集積回路基板では
、ガラス層14と抵抗体6は別に焼成しなければならな
い。もし同時焼成を行なうとガラス+414ト抵抗体中
のガラス成分11の相互拡散が大きく、本来のシート抵
抗値(アルミナ基板上での値)と大きく異なった値をと
りまたそのばらつきも大きい。
As described above, in the hybrid integrated circuit board shown in the embodiment, the glass layer 14 and the resistor 6 must be fired separately. If simultaneous firing is performed, the mutual diffusion of the glass component 11 in the glass + 414 resistor will be large, resulting in a value that is significantly different from the original sheet resistance value (value on the alumina substrate), and the variation thereof is also large.

さらに抵抗体6の焼成温度TfRとグレーズ層カラス1
4の軟化温度T8および結晶化温度Tcとの関係を調べ
ると、表2に示すようにTc>TfHであれば、抵抗値
の変動は小さい。非晶質ガラスを用いた場合は、当然ガ
ラス転移温度TgはTgン1’fRでなければならない
。グレーズ層として非晶質ガラスと結晶化ガラスを比較
した場合結晶化ガラスの方が、抵抗の変動値は小さい。
Furthermore, the firing temperature TfR of the resistor 6 and the glaze layer glass 1
Examining the relationship between the softening temperature T8 and the crystallization temperature Tc of No. 4, as shown in Table 2, if Tc>TfH, the variation in resistance value is small. When amorphous glass is used, the glass transition temperature Tg must naturally be Tgn1'fR. When amorphous glass and crystallized glass are compared as a glaze layer, the resistance fluctuation value of crystallized glass is smaller.

以上のことより、グレーズ層として最適のガラスペース
トは、結晶化温度Tcが抵抗体の焼成温度TfRより高
い結晶化ガラスペーストである。
From the above, the most suitable glass paste for the glaze layer is a crystallized glass paste whose crystallization temperature Tc is higher than the firing temperature TfR of the resistor.

この場合グレーズ層の焼成温度はTcより高くする必要
がある。なお、第2表で示した最適ペーストは、St 
、 Ca、 Mgl Al、 Zr、 Bを主成分元素
とする結晶化ガラスである。
In this case, the firing temperature of the glaze layer needs to be higher than Tc. The optimum paste shown in Table 2 is St.
, Ca, Mgl, Al, Zr, and B as main constituent elements.

第2表  グレーズ層ガラスペーストと抵抗の適合性こ
のガラスペーストを用い、850°C焼成のルテニウム
系抵抗体を用いた場合、初期シート抵抗値は本来のシー
ト抵抗値(アルミナ基板上に形成した場合)に比較し0
7〜1.1倍であり、高誘電率基板上直接に抵抗体を形
成した場合に比べ本来のシート抵抗値に非常に近い値が
得られ、そのばらつきも小さい。
Table 2 Compatibility of Glaze Layer Glass Paste and Resistance When using this glass paste and using a ruthenium-based resistor fired at 850°C, the initial sheet resistance value will be the original sheet resistance value (when formed on an alumina substrate). ) compared to 0
This value is 7 to 1.1 times higher than that of the original sheet resistance value, which is much closer to the original sheet resistance than when a resistor is formed directly on a high dielectric constant substrate, and the variation thereof is also small.

また経時変化も150°Cl000時間放置で06%で
あり、高誘電率基板上直接に形成した場合よりはるかに
安定であり、アルミナ基板上に直接形成した場合と同じ
である。もちろん、さらに抵抗オーバコートガラスをか
けると0.1 %の変動となる。
Further, the change over time was 0.6% when left at 150°C for 000 hours, which is much more stable than when formed directly on a high dielectric constant substrate, and the same as when formed directly on an alumina substrate. Of course, if a resistive overcoat glass is applied, the variation will be 0.1%.

また導体に於ても、導体粒子間とグレーズ層間に適度の
バインダガラスがあ仝ため、その接続強度も高誘電率基
板上に直接形成した場合に比較し、数倍も大きくなる。
Also, in the conductor, since there is a suitable amount of binder glass between the conductor particles and the glaze layer, the connection strength is several times greater than that when the conductor is formed directly on a high dielectric constant substrate.

なお、グレーズ層の誘電率εは通常10〜15で高誘電
率基板の誘電率に比較し、小さいが、その厚さが通常5
〜50μmであり、通常の基板厚さ06〜51Kに比較
し小さいため、波長短縮率すなわち小形化にはほとんど
影替を与えない。
The dielectric constant ε of the glaze layer is usually 10 to 15, which is smaller than the dielectric constant of the high dielectric constant substrate, but its thickness is usually 5 to 15.
~50 μm, which is smaller than the normal substrate thickness of 06 to 51K, so it hardly affects the wavelength shortening rate, that is, miniaturization.

さらに、分布定数線路部、能動素子、小形部品搭載部等
接続強度をあまり必要としない部分では、グレーズ層を
省略してもよい。
Furthermore, the glaze layer may be omitted in portions that do not require much connection strength, such as distributed constant line portions, active elements, and small component mounting portions.

以上述べたように、ルチル型、プロブスカイト型高誘電
率基板上に、ガラス層を形成し、その上に抵抗、導体を
形成した混成集積回路の構造とすることにより、高誘電
率基板を用いた小形・無調整等の波長短縮形マイクロ波
混成集積回路の特長を失うことなく、抵抗の精度、安定
性が良く、導体の接続強度が大きい高信頼小形マイクロ
波混成集積回路を得ることができる。
As mentioned above, a high dielectric constant substrate can be used by creating a hybrid integrated circuit structure in which a glass layer is formed on a rutile type or provskite type high dielectric constant substrate, and a resistor and a conductor are formed on it. It is possible to obtain a highly reliable small microwave hybrid integrated circuit with good resistance accuracy and stability and high conductor connection strength without losing the features of the wavelength shortened microwave hybrid integrated circuit such as small size and no adjustment. .

【図面の簡単な説明】[Brief explanation of the drawing]

回絡め初期抵抗値の変動を、第嫉図は高誘電率年 基板と厚膜抵抗部の断面模式図を、第〜図は本発明の一
実施例を示す高誘電率基板を用いだ混成集積回路の断面
模式図を、第6図は高誘電率基板と厚膜抵抗間にグレー
ズ層を設けた実施例ア。704式、″1゛      
    −・−−ス」−と     ゛      −
1・・・高誘電率基板 2.4.5・・・厚膜導体 6・・・厚膜抵抗体 11・・・厚膜ペーストバインダガラス14・・・グレ
ーズ層ガラス ″J−トセ\1岨t1 第37 刀ブスへ分 第4図 荊S図
Figure 1 shows a schematic cross-sectional view of a high-permittivity substrate and a thick-film resistor section, and Figures 1-2 show an embodiment of the present invention for hybrid integration using a high-permittivity substrate. A schematic cross-sectional view of the circuit is shown in FIG. 6, which is an example A in which a glaze layer is provided between a high dielectric constant substrate and a thick film resistor. Type 704, ″1゛
−・−−su”− and ゛ −
1... High dielectric constant substrate 2.4.5... Thick film conductor 6... Thick film resistor 11... Thick film paste binder glass 14... Glaze layer glass "J-TOSE\1岨" t1 No. 37 Sword Bushe Min. 4th diagram 荊S diagram

Claims (1)

【特許請求の範囲】 1、 高誘電率基板の一部ないし、全部にグレーズ層の
設けられた基板上に、厚膜導体、厚膜抵抗で回路が設け
られていることを特徴とする混成集積回路。 2 グレーズ層が、ガラスであって、かつそのガラス転
位温度ないし結晶化温度が厚膜導体ないし抵抗体の焼成
温度より高いものであることを特徴とする特許請求の範
囲第1項記載の混成集積回路。 3、 高誘電率基板の一部ないし全部にグレーズ層を設
け、この基板上に厚膜導体、厚膜抵抗を設けて混成集積
回路を製造するに際して、抵抗をグレーズ層の焼成温度
より低い温度で焼成することを特徴とする混成集積回路
の製造方法。
[Claims] 1. A hybrid integration characterized in that a circuit is provided with a thick film conductor and a thick film resistor on a substrate having a glaze layer on part or all of a high dielectric constant substrate. circuit. 2. The hybrid assembly according to claim 1, wherein the glaze layer is made of glass, and its glass transition temperature or crystallization temperature is higher than the firing temperature of the thick film conductor or resistor. circuit. 3. When manufacturing a hybrid integrated circuit by providing a glaze layer on part or all of a high dielectric constant substrate and providing a thick film conductor and a thick film resistor on this substrate, the resistor is baked at a temperature lower than the firing temperature of the glaze layer. A method for manufacturing a hybrid integrated circuit, which comprises firing.
JP56171405A 1981-10-28 1981-10-28 Hybrid integrated circuit and manufacture thereof Pending JPS5873146A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56171405A JPS5873146A (en) 1981-10-28 1981-10-28 Hybrid integrated circuit and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56171405A JPS5873146A (en) 1981-10-28 1981-10-28 Hybrid integrated circuit and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS5873146A true JPS5873146A (en) 1983-05-02

Family

ID=15922536

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56171405A Pending JPS5873146A (en) 1981-10-28 1981-10-28 Hybrid integrated circuit and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS5873146A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63164301A (en) * 1986-12-26 1988-07-07 松下電器産業株式会社 Thin film resistor and manufacture of the same
EP0324555A2 (en) * 1988-01-11 1989-07-19 Hitachi, Ltd. Substrate for hybrid IC, hybrid IC using the substrate and its application
EP0608376A1 (en) * 1991-10-15 1994-08-03 Motorola, Inc. Voltage variable capacitor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63164301A (en) * 1986-12-26 1988-07-07 松下電器産業株式会社 Thin film resistor and manufacture of the same
EP0324555A2 (en) * 1988-01-11 1989-07-19 Hitachi, Ltd. Substrate for hybrid IC, hybrid IC using the substrate and its application
EP0324555A3 (en) * 1988-01-11 1991-05-02 Hitachi, Ltd. Substrate for hybrid ic, hybrid ic using the substrate and its application
EP0608376A1 (en) * 1991-10-15 1994-08-03 Motorola, Inc. Voltage variable capacitor
EP0608376A4 (en) * 1991-10-15 1994-12-07 Motorola Inc Voltage variable capacitor.

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