JPS5870664A - Msk demodulation circuit - Google Patents

Msk demodulation circuit

Info

Publication number
JPS5870664A
JPS5870664A JP16957281A JP16957281A JPS5870664A JP S5870664 A JPS5870664 A JP S5870664A JP 16957281 A JP16957281 A JP 16957281A JP 16957281 A JP16957281 A JP 16957281A JP S5870664 A JPS5870664 A JP S5870664A
Authority
JP
Japan
Prior art keywords
circuit
inputted
clock
multiplier
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16957281A
Other languages
Japanese (ja)
Inventor
Seiya Inoue
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16957281A priority Critical patent/JPS5870664A/en
Publication of JPS5870664A publication Critical patent/JPS5870664A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22Demodulator circuits; Receiver circuits
    • H04L27/227Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2273Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals associated with quadrature demodulation, e.g. Costas loop

Abstract

PURPOSE:To obtain an MSK demodulating circuit with a simple constitution, reproducing a reference carrier wave and a reference clock at the same time, by constituting a clock tracing circuit with a square circuit and a phase locking circuit. CONSTITUTION:An MSK wave is inputted to an input terminal 1 and also synchronizing detectors 2, 3. Demodulated carrier waves shifted with 90 deg. are inputted from a voltage controlled oscillator 6 to the detectors 2, 3, the output of which is inputted to a multiplier 10. The output of multiplication is squared at a square circuit 21 and inputted to a phase locking loop 27 operated in the clock frequency. The loop 27 reproduces clock signals, the reproduced clock signal is frequency-divided into two at a two-frequency-division circuit 27 and inputted to a multiplier 9. The multiplier 9 multiplies the frequency-divided clock signal from the circuit 27 with the signal from the multiplier 10, and the multiplied output is given to the voltage controlled oscillator 6.
JP16957281A 1981-10-22 1981-10-22 Msk demodulation circuit Pending JPS5870664A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16957281A JPS5870664A (en) 1981-10-22 1981-10-22 Msk demodulation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16957281A JPS5870664A (en) 1981-10-22 1981-10-22 Msk demodulation circuit

Publications (1)

Publication Number Publication Date
JPS5870664A true JPS5870664A (en) 1983-04-27

Family

ID=15888955

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16957281A Pending JPS5870664A (en) 1981-10-22 1981-10-22 Msk demodulation circuit

Country Status (1)

Country Link
JP (1) JPS5870664A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60183858A (en) * 1984-03-02 1985-09-19 Anritsu Corp Clock synchronizing circuit of msk demodulator
JPH04168839A (en) * 1990-10-31 1992-06-17 Sharp Corp Msk demodulation circuit
US5170131A (en) * 1990-11-07 1992-12-08 Sharp Kabushiki Kaisha Demodulator for demodulating digital signal modulated by minimum shift keying and method therefor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60183858A (en) * 1984-03-02 1985-09-19 Anritsu Corp Clock synchronizing circuit of msk demodulator
JPH04168839A (en) * 1990-10-31 1992-06-17 Sharp Corp Msk demodulation circuit
US5170131A (en) * 1990-11-07 1992-12-08 Sharp Kabushiki Kaisha Demodulator for demodulating digital signal modulated by minimum shift keying and method therefor

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