JPS5869138A - Receiver provided with diversity antenna - Google Patents

Abstract

PURPOSE:To avoid distortion in a strong electric field of an amplitude modulation signal, by giving a signal not amplified at an amplification circuit in the strong electric field to a front end circuit through switching, at the reception of the amplitude modulation signal. CONSTITUTION:An output of a detection circuit 105 exceeds a voltage Vr in a strong electric field of an amplitude modulation signal and a line 108 becomes a high potential. Then, a diode 109 is conductive and a diode 98 is conductive regardless of the level of a line 56. Thus, a signal from an antenna 18 is given to an amplifying circuit 82. A transistor TR110 is conductive at the same time, an anode of a diode 94 is grounded and a signal from an amplifying circuit 81 is not given to a front end circuit 42. Thus, a signal distorted through saturation of an amplifying circuit 85 is not given to the circuit 42 at a strong electric field and an excellent reception state can be attained.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a receiver equipped with a diversity antenna.

Such a receiver is installed in a car, for example, and when the level of the input signal from one of the multiple antennas decreases, the signal from another antenna (No. 8 is switched to receive the signal). This enables stable reception even in places where the electric field strength of the wireless signal is weak.In the prior art, the signal from each antenna is amplified by an amplifier circuit, and the amplified signal is switched. In this case, especially when receiving an amplitude modulated signal in a strong electric field, the output of the amplifier circuit becomes saturated and distortion occurs.

An object of the present invention is to provide a receiver equipped with a diversity antenna that can receive an amplitude modulated signal without causing distortion when receiving the amplitude modulated signal in a strong electric field.

FIG. 1 is a block diagram of one embodiment of the present invention. This receiver a is mounted on a car, and an antenna 10 and an antenna 18, which will be described later with reference to FIG. 6, are mounted on the rear window 1 of the car. The input signal from the antenna 10.18 is supplied to a front end circuit 42Vc for amplitude modulation reception and frequency modulation reception via a changeover switch 41 through a &%1 increase circuit and a second amplifier circuit 82, respectively. It will be done. Front end episode lol! 142
The output from the input 44 is applied to a circuit 43 that performs intermediate frequency amplification and detection. 47 is a 19KHz input signal indicating that it is a stereo broadcast.
When a stereo pilot signal of 7 is included, a stereo pilot signal of 7 is detected and a stereo audio signal is given to the amplification circuits 48 and 49, and when there is no stereo pilot signal, a monaural signal is sent to the amplification circuits 48 and 49i1? :give. Voice message from amplifier circuit 48.49 Jj! ! is given to the speaker 50°51.

The high-pass filter 45 is responsive to a control signal from line 52, and when line 52 is at the lotus level, line 44 is
The stereo pilot signal and the high-frequency same wave number components contained in the signal are removed and applied to the noise blanker 46.

The noise blanker 46 is used to eliminate noise such as the ignition nozzle when the internal combustion engine is ignited or the noise generated when the wiper motor is operating.
Pulses and noise with relatively strong electric field strength are detected by antenna 10.
．． 18, it serves to temporarily interrupt the reproduction of the desired signal, thereby improving clarity.

The intermediate frequency amplification and detection circuit 43 has a muting function, and includes a muting control terminal A and a muting terminal B. When the level of the input signal from the muting control terminal AH and the antenna 10.18 is weak and therefore the reception detection level in the circuit 43 is low, a high level voltage is led out to the line 53. The signal from this line 53 is input to muting terminal B.
Ru. When a high level voltage is applied to the muting terminal B, muting, that is, inter-office noise is removed. When the input signal Ω level from the antenna 10.18 is strong and the reception detection level is high, the voltage from the muting control terminal A is low and the muting operation is stopped.

Referring to Figure gK2, a graph illustrating the characteristics of the receiver shown in Figure 1 is shown. In FIG. 2 fil n , the relationship between the level of the input signal from antenna 10.18 and the signal-to-noise ratio of the signal derived on line 44 is shown. When the level of the input signal from antenna 10.18 is small as shown by Hl, the S/N ratio is small and antenna 1
As the input signal level from 0.18 reaches a high value H2, the S/N ratio improves. When the input signal level from the antenna 10.18 is sufficiently higher than H2, S/NJt is good and is approximately a constant value.

, g2 Figure (2) shows the relationship between the level of the input signal from the l'j s antenna 10.18 and the output level from the muting control terminal A of the intermediate frequency amplification and detection circuit 43. As the level of the antenna input signal increases, the voltage from muting control terminal A decreases. antenna 1
When the level of the input signal from 0.18 is at a low value H1, a high voltage Vl is derived on the line 53, and when the level of the antenna input signal is at a high value H2, the voltage is increased as indicated by the reference sign v2. becomes a low value.

The outputs Q and Q from the changeover switch 41H and toggle 7 lip 70 knob 54 are received via lines 55 and 56'. , when the output terminal Q of the selector switch 41ri and the 7-lip 70 knob 54 is at a high level, the antenna 1
0 to the front end circuit 42, and another
When the two outputs Q are at a high level, the signal from the antenna 18 is applied to the front end circuit 42. 7 every time a pulse from the i-line 57 is received on the rip prop 54.

Change the output Q and Q levels alternately.

Output G from flip 70 tube 54 via line 56
is given to the differentiating circuit 58. This differentiation circuit 58 is
It has a capacitor 59 and diodes 60 and 61, and provides unipolar pulses to an integrating circuit 62. Integral times lol! l62
ri, including a capacitor 63 and a resistor 64 for discharging the seven capacitors 4j63.

The integrated output is given to one input of the comparator circuit 65. The other input vc of the comparison circuit 65 is supplied with a signal from the muting control terminal A via the line 53.

The comparison circuit 65 connects the output from the integration circuit 62 to the line 53.
The signal 't is high level when the level of the signal 't
When the output from the integrating circuit 62 is higher than the level of the signal on the line 53, a low level signal t-4 is output. The output fl from the comparison circuit 65 is applied to one input of an AND gate 66.

The signal from line 53 is also applied to one input of comparator circuit 67. A predetermined voltage v3 is applied to the other input of the comparison circuit 67. Comparison episode lol! When the voltage of the 167 line 53 is less than a predetermined voltage 13, a low level M signal is derived, and when it is 3 or more, a high level signal is derived. A to the signal from the comparison circuit 67
It is applied to the other input of ND gate 66 and also applied to one input of AND gate 69 via 1 inversion circuit 68 . AND game) 66. The output from 69 is OR
It is applied to one input of AND game 1 via gate 70. The other input of the AND game 71 is supplied with a tarok pulse from a clock generation circuit 72 having a frequency of, for example, about 100 KHz. The output from AND game 71 is provided via line 57 to seven lip-flops 54. The signal from the medium frequency amplification/detection circuit 43 via the line 44 is applied to the bandpass filter 73. Ko (71
) The panned pass fusult tough 3 selectively extracts the stereo pilot signal and supplies it to the amplitude detection circuit 74. The signal from the amplitude detection circuit 74 is applied to another amplitude detection circuit 75 connected in cascade. Amplitude detection circuit Ili! I75
The output from the comparator circuit 76 is applied to one input of the comparator circuit 76. The other input Vr- of the comparator circuit 76 is given a predetermined voltage 4. The output from comparator circuit 76 is on line 52. It is applied to the high-cut filter 45 via the line 77 and to the other input of the AND gate 69 via the line 77.

The input signal from antenna 10.18 is small.

Therefore, when the signal from the muting control terminal A of the intermediate frequency amplification/detection circuit 43 is higher than the predetermined alternating current voltage V3, a signal at the comparative circuit 67ri hash level is derived. In such a weak electric field strength, the signal from the muting control terminal A through the input 53 is transmitted to the integrating circuit 6.
When the output becomes equal to or higher than 2, the comparator circuit 65ri derives a high level signal Jl+. Therefore, the AND game IVc is applied from the lotus level signal flORG) 70 from the AND gate 66. Tarock generation circuit 72 is the third
The pulse f:* shown in FIG. 10 is emitted. The high level signal of the AND gate 66ρ1 is applied from the AND gate 1 to the line 5 by being applied as described above through the OR gate 70.
7, a pulse n shown in FIG. 3(2) is derived. Therefore, the knob 54 of the prip 70 changes its stable state each time it receives a pulse via the line 57, and thereby a unipolar differentiated pulse shown in FIG. 3(3) is obtained from the differentiating circuit 58. The integrating circuit 62 is the differentiating circuit 58
3 (4) to the comparator circuit 65.
gives an output with a waveform shown by . As the flip 70 knob 54 repeatedly changes its stability state, the output of the integrating circuit 62 increases step by step until it reaches the level 78 of the signal from the muting control terminal A via the line 53. Therefore, the output of the comparator circuit 65 (7) becomes low level as shown in FIG. 3 (5), and accordingly, the AND condition of the AND game 1 no longer holds.
Flip flop 54 is no longer pulsed.

In this way, the antenna 10.18 corresponding to the voltage Vl
When the switching operation of the changeover switch 41 is repeatedly performed in a weak electric field strength where the level of the input power symbol is low, the repetition of the switching operation is stopped. Therefore, the S/N ratio is prevented from further deteriorating due to the continuation of the switching operation of the changeover switch 41. The output of the integrating circuit 62 is connected to a capacitor 63 and a resistor 64.
It is reduced depending on the time constant 1k determined by . Therefore, depending on the time constant, the continuation of the switching operation of the changeover switch 41 is stopped for nine hours.

The level of the input signal from antenna 10.18 is high,
When the level of the signal from the muting control terminal A via the line 53 is less than the voltage 73, the comparison circuit 67
The output of is low level.

Stereo broadcasting is received in such a so-called medium to strong electric field strength, and moreover, the multipath is such that a stereo pilot signal with a constant amplitude of 2μ is transmitted from the bandpass filter 73 as shown in FIG. 4(1). Take out. Amplitude detection circuit No. 7 derives a constant level signal 8tl shown in FIG. 4(2) which corresponds to the amplitude of the stereo pilot signal and has nine levels.

Since the output from the amplitude detection circuit 74 is constant, the other amplitude detection circuit 75 derives a low level signal below a predetermined voltage v4 as shown in FIG. 4 (3).
Consequently, the output of the comparison port Ij 1176 is at a low level $I as shown in FIG. to multiplexer 47iC. The friend multiplexer 47#-j derives all the audio signals in response to the stereo pilot signal, so that the stereo broadcast can be heard.

Since the output from the comparison circuit 76 is at a low level, the output from the AND gate 69 remains at a low level, and the output of the AND gate 1 is at a low level. In this way, a stable stereo broadcast reception state is maintained.

It is assumed that a stereo broadcast is being received at the above-mentioned medium to strong electric field strength where the level of the input signal from the antenna 10.18 is high, and multipath distortion occurs in this state. When the bass distortion occurs, the amplitude rj of the stereo pilot signal derived from the bandpass filter 73 changes as shown in FIG. 5fl). Amplitude detection circuit 74
derives a signal having the waveform shown in FIG. 5(2).

The seventh nine amplitude detection circuit 75 derives the signal shown in Figure (3) @5 having a level higher than the voltage v4. The ninth comparison circuit 76 supplies a high level signal to the line 52.77 as shown in FIG. 5(4). The high-frequency cut-off filter 45 prevents the stereo pilot signal from being applied to the multiplexer 47 via the noise blanker 46, thereby preventing the left/right separation operation of the multiplexer 47 and obtaining a monaural signal. Therefore, the S/N ratio will be improved. Also, since the line 77 becomes the lotus level, the AND gate 69 is connected to the A via the OR gate 70.
A lotus level signal is derived from the ND game) 71. Therefore, the pulse of the clock generation circuit 72 is applied to the flip 70 tube 54 via the AND gate 71 and the line 57. In this way, the stable state of the pripprop 540 is switched, and the pre-switching operation of the selector switch ↓l is performed. When multipath distortion no longer occurs, the line 77 becomes low level, and the changeover operation of the changeover switch 41 stops.

Referring to FIG. 6, an antenna 10.18 is embedded in the rear window 1 of the automobile. In this rear glass 1,
Lines 2 and 3, which function as anti-fog heaters, are arranged side by side, and a heating current is supplied from the bus bar 5 through the line 2, from the bus bar 6, further through the line 3, and then to the bus bar 7. The signal from the connection point ll of the antenna IO is applied to the first amplifier circuit 81n.

From the antenna 18 through the connection point 12 to the second amplification circuit I@
0, amplitude modulation 1d where 82Vc and A are given respectively
The carrier wave frequency of the signal is on the order of around 1 MHz, and on the other hand, the carrier frequency of the signal g is on the order of 100 MHz.
The order is before and after. In the amplifier circuit 81, signals from the antenna IO are applied to the amplifier circuits 85 and 86 through the coil 83 and the capacitor 84f, which have different impedances depending on the frequency. In this way, the amplitude modulation signal is amplified by the amplifier circuit 85, and the amplitude modulation signal is amplified by the amplifier circuit 86.
The same wave number modulation signal is already amplified. In another second amplification circuit 82, the amplitude modulation signal is derived without being amplified via a circuit consisting of a coil 8, 88 and a capacitor 89. The interwave number modulation signal is
In the switching circuit 41, the signal from the amplifier circuit 81 is passed from the capacitor 93 to the diode 94, and then from the line 95 to the coupling capacitor 96. Front end circuit through 4
given to 2. The signal from amplifier circuit 82 is routed to line 95r! via capacitor 97 and diode 98 to line 95r! Coil 99 and resistance j00'
Grounding via i. 55 lines, 101 diodes
is connected in the forward direction to the anode of the diode 94 through the coil 102'e. The main line 56 is connected from the diode 103 to the anode of the diode 98 via the coil 104'i L7. A signal from the amplifier circuit 81 via the capacitor 93 is applied to one input of the comparison circuit 106 via the detection circuit 105. A predetermined voltage Vr is applied to the other input of the comparison circuit 106. Comparator circuit 106i is powered through switch l071. This switch 107i is turned on when the front end circuit 42 receives an amplitude modulation signal,
As a result, the comparison circuit 106 is in a state similar to the previous one.When the level of the signal from the amplifier circuit 81 is high, and the output of the line detection circuit 105 exceeds the voltage Vr, the comparison circuit 106 operates on the line 108. Deriving a high level signal to.

Line 108 is connected to the cathode of diode 103 via diode 109'i. The cathode of the diode 1()l is grounded via the transistor 1lOi.

A positive voltage is applied through the resistor 111i. The signal from line 108 is connected to the base of transistor 110 through resistor 1.
12.

When the front end circuit 42 is in the state m of receiving the frequency modulated signal, it is shut off by the switch 107. When the line 55 is at a high level, the diodes 101 and 94 are conductive, and the nine wave number modulated signal is amplified by the amplifier circuit 86 in the amplifier circuit 81 and provided to the front end circuit 42. When line 56 is at a high level, diodes 103 and 98 pass through, thereby preventing the frequency modulated signal amplified by amplifier circuit 91 in amplifier circuit 82 from being applied to front end circuit 42.

When the front end circuit 42 is receiving an amplitude modulated signal, the switch 107 is conductive. When the electric field strength of the amplitude modulation signal is a weak electric field to a medium electric field, the output of the detection circuit 105 is less than the voltage Vr. Consequently, the line 108 remains at a low level, and the transistor 1lOri is cut off. Therefore, 6L is at the level of line 55.56.

The same switching operation as when receiving the same wave number modulation signal is performed.

In the strong electric field of the amplitude modulated signal, the output of the detection circuit 105 exceeds the voltage Vr, and therefore the line 108 becomes high level. Therefore, diode 109 interrogates line 5.
Diode 98 is conductive regardless of the level of 6. Consequently, the signal from the antenna 18 is given to the front end circuit 42 via the coil 87 #88 in the amplifier circuit 82. At the same time, transistor 11
O conducts, the anode of the diode 94 is grounded, and the signal from the amplifier circuit 81 is connected to the front end circuit 1.
iI! Not given to i42. In this way, the S signal distorted by the saturation of the amplifier circuit 85 in a strong electric field is not applied to the front end circuit 42, making it possible to achieve a good reception condition.

Although in the embodiment described above only two antennas 10.18 are provided, in other embodiments of the invention a greater number of antennas may be sequentially switched and provided to the front end circuit 42. Good too. In this case, the first amplifier circuit 811''j at least one of the plurality of antennas
n interposed between one antenna and the changeover switch 41;
4. According to the present invention, the amplitude quality is greater than or equal to n0. When receiving the signal No. 7, the signal that is not amplified by the amplifier circuit in the strong electric field of 7 is switched and given to the front end circuit, making it possible to eliminate distortion of the amplitude modulated signal in the strong electric field. .

[Brief explanation of drawings]

Figure 1 is a block diagram of an embodiment of the present invention. Figure 2 is a block diagram of an embodiment of the present invention.
A detailed graph explaining the previous work of the receiving circuit shown in the figure,
Figure 3 is a waveform diagram to explain the operation of the embodiment shown in glJ1 when the level of the input signal from antenna 10.18 is small, and Figures 4 and 5 explain the operation when multipath distortion occurs. The waveform diagram, Figure 6, for
It is a circuit diagram of an amplifier circuit. 10.18... Antenna, 41... Changeover switch, 42... Front end circuit, 43... Intermediate frequency amplification and detection circuit, 45... High frequency shielding filter, 16...
・Nosuzuplan power, 47...Multiplexer, 48.
49...Amplification circuit, 50.51...Speaker, 54
...Flip 7a knob, 58... Differential circuit, 62.
...Integrator circuit, 65.67.76-...Comparison circuit, 72
... Clock generation 1141%, 73... Band pass filter, 74, 75... Swing 1 positive detection circuit, 81.
... @ 11 Amplifier circuit, 82... 2nd amplifier circuit agent Patent attorney Kei Nishi Figure 2 Input signal level Input signal level Figure 3 (5) - 11'' - Figure 4 (4). Figure 5 (4).

Claims (1)

[Claims] A plurality of antennas, a receiving circuit that receives an amplitude modulated signal and a frequency modulated signal, a changeover switch that switches the input signal from the antenna to the receiving circuit, and a switch that changes the level of the input signal to the receiving circuit. Level detection circuit to detect. a control circuit that responds to the output from the level detection circuit and sequentially switches the switching mode of the changeover switch when the level of the input signal to the reception circuit is less than a predetermined value; at least one of the plurality of antennas and the changeover switch; a first amplification circuit interposed between the plurality of antennas and amplifying the amplitude modulation signal and the frequency modulation signal; and a first amplification circuit interposed between the changeover switch and at least one of the remaining antennas and amplifying the amplitude modulation signal. a second amplifier circuit that amplifies the same wave number modulated signal without any interference, and the control circuit controls when the output from the first amplifier circuit exceeds a predetermined ratio value when the receiving circuit is receiving the amplitude modulated signal. , a friend receiver equipped with a daspersity antenna, characterized in that the output from the second amplifier circuit is forced to be given to the receiving circuit.