JPS5866447A - Information transmitting system - Google Patents
Information transmitting systemInfo
- Publication number
- JPS5866447A JPS5866447A JP56165056A JP16505681A JPS5866447A JP S5866447 A JPS5866447 A JP S5866447A JP 56165056 A JP56165056 A JP 56165056A JP 16505681 A JP16505681 A JP 16505681A JP S5866447 A JPS5866447 A JP S5866447A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- terminal
- multiplexer
- information
- circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Communication Control (AREA)
- Time-Division Multiplex Systems (AREA)
- Small-Scale Networks (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は端末制御装置と複数の端末装置との間の情報伝
送方式に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an information transmission system between a terminal control device and a plurality of terminal devices.
例えば複数の画像表示装置を端末装置として備え、これ
らの画像表示装置と端末制御装置との間で相互に画像情
報の送受信をおこないながら画像情報の編集をおこなう
画像情報処理システムにおいては、従来、端末制御装置
と各の画像表示装置との間の情報の送受信を時分割でお
こなう方式が用いられている。For example, in an image information processing system that includes a plurality of image display devices as terminal devices and edits image information while mutually transmitting and receiving image information between these image display devices and a terminal control device, conventionally, the terminal control device A method is used in which information is transmitted and received between a control device and each image display device in a time-sharing manner.
このようなシステムにおいては、端末制御装置と画像表
示装置との間における情報の送受信は、定められた時間
帯を除き任意の時間にこれをおこなうことができない。In such a system, information cannot be transmitted and received between the terminal control device and the image display device at any time except during a predetermined time period.
このために画像編集に長時間を要するという問題がある
。For this reason, there is a problem in that image editing takes a long time.
上記のような方式ｌこ対し並列方式が考えらｎるが、並
列方式、特に端末制御装置と画像表示装置との間の情報
伝送速度を上げるために光ファイバを用いるようなシス
テムにおいては、画像表示装置と同数の符号回路および
復号回路を端末制御装置側にも設ける必要があるなど、
システム全体が非常に高価になるという問題がある。In contrast to the above-mentioned method, a parallel method can be considered, but the parallel method, especially in systems that use optical fibers to increase the information transmission speed between the terminal control device and the image display device, For example, it is necessary to provide the same number of encoding circuits and decoding circuits on the terminal control device side as there are display devices.
The problem is that the entire system is very expensive.
本発明は上記のような問題に対処するためになされたも
のであり、端末制御装置と複数の端末装置との間におけ
る情報の伝送を安価且つ高速におこなうことのできる方
式を提供することをその目的とするＯ
すなわち本発明においては、符号回路と、チャンネル・
セレクタと、複数の送信回路と、複数の受信回路と、マ
ルチプレクサと復号回路とを備え、複数の端末装置との
間において、時分割により相互−こ情報の伝送を可能と
する端末制御装置において、前記複数の受信回路に接続
される割込信号検出回路上、前記割込信号検出回路の検
出出力を端末装置に対応して記憶する割込レジスタとを
前記マルチプレクサおよび復号回路とに対し独立して込
信号を発信し、端末制御装置は割込信号の発せられた端
末を直ちに識別できるので、端末装置は必要なおきに端
末制御装置との間で情報の送受信をおこなうことができ
るようｔこしたものである。The present invention has been made to address the above-mentioned problems, and an object of the present invention is to provide a method that allows information to be transmitted between a terminal control device and a plurality of terminal devices at low cost and at high speed. In other words, in the present invention, the code circuit and the channel
A terminal control device comprising a selector, a plurality of transmitting circuits, a plurality of receiving circuits, a multiplexer and a decoding circuit, and capable of mutually transmitting information by time division between a plurality of terminal devices, On the interrupt signal detection circuit connected to the plurality of receiving circuits, an interrupt register for storing the detection output of the interrupt signal detection circuit corresponding to the terminal device is provided independently from the multiplexer and the decoding circuit. The terminal control device can immediately identify the terminal from which the interrupt signal has been issued, so that the terminal device can send and receive information to and from the terminal control device as needed. It is.
以下、図に示す実施例によりて本発明の要旨の具体的な
説明をおこなう。図は本発明の方式による端末制御装置
のシステム・ブロック図を示し、図において１はシステ
ム・パスＢを介し画像処理用コンビ凰−タ（図示せず）
と端末装置として用いられる画像表示装置Ｔ、〜Ｔ、と
の間の情報の送信と受信の制御をおこなう送受信制御回
路、２は端末装置へ送信する情報の符号変換をおこなう
符号回路、３は後記ｎ個の送信回路の一つを選択し、選
択された送信回路に対し符号回路２の出方を入力Ｔ＋チ
ャンネル・セレクタ、４．〜４勇はｎ個の端末装置の各
ｌこ対応して設けられ、それぞれの端末装置Ｔ、 −Ｔ
−に対し情報を送信〜する送信回路、５、〜５騙はｎ個
の端末装＠Ｔ、〜Ｔ、の各ζこ対して設けられ、それぞ
れの端末装置から送らゎる情報を受信する受信回路、６
はｎ個の受信回路６．〜６１１の一つを選択し、選択さ
れた受信回路の出力を後記復号回路に入力するマルチプ
レクサ、７はマルチプレクサ６から送られた信号を復調
する復調回路、８はチャンネル拳セレクタ３およびマル
チプレクサ６を制御する端末切換回路、９１〜９−はｎ
個の受信回路５１〜５−の各々に接続され、ｎ個の端末
装置Ｔ、〜Ｔ、から送られる割込信号の有無を検出Ｔる
割込信号検出回路、１０は割込信号検出回路９Ｉ〜９ｍ
の検出出力をそれぞれの端末装置に対応して一時記憶す
る割込レジスタである。Hereinafter, the gist of the present invention will be specifically explained using examples shown in the drawings. The figure shows a system block diagram of a terminal control device according to the method of the present invention.
2 is a transmission/reception control circuit that controls the transmission and reception of information between the image display device T, ~T, used as a terminal device, 2 is a code circuit that converts the code of information to be sent to the terminal device, and 3 is a code circuit described later. Select one of the n transmitting circuits and input the output of the encoder circuit 2 to the selected transmitting circuit T+ channel selector; 4. ~4 units are provided corresponding to each of n terminal devices, and each terminal device T, -T
- A transmitting circuit 5, which transmits information to ~, is provided for each of the n terminal devices @T, ~T, and receives information sent from each terminal device. circuit, 6
is n receiving circuits 6. 611, and inputs the output of the selected receiving circuit to the decoding circuit described later; 7, a demodulation circuit that demodulates the signal sent from the multiplexer 6; 8, the channel selector 3 and the multiplexer 6; The terminal switching circuits to be controlled, 91 to 9- are n
An interrupt signal detection circuit connected to each of the n receiving circuits 51 to 5- and detecting the presence or absence of an interrupt signal sent from the n terminal devices T, -T; 10 is an interrupt signal detection circuit 9I; ~9m
This is an interrupt register that temporarily stores the detection output corresponding to each terminal device.
以上のような構成ｌこおいて、いずれの端末装置からも
割込信号が発せられていないとき、割込信号検出回路９
．〜９穐はいずれも割込信号を検知せず、したがって割
込レジスタ１旧こは割込信号検知出力が記憶されていな
い。このような場合には、１１ｈｉ１１１！処理コンビ
エータ（図示せず）は端末切換回路８を制御し、端末切
換回路８はセレクタ３詔よびマルチプレクサ６とを制御
し、セレクタ３およびマルチプレクサ６は、あらかじめ
定められた願序七時間間隔にしたがりて送信回路４Ｉ〜
４厘および受信回路５Ｉ〜６ｓを選択する。このように
して画像処理コンビエータと複数の端末装置との間で時
分割方式による情報の送受信がなされる。In the above configuration, when no interrupt signal is issued from any terminal device, the interrupt signal detection circuit 9
．． No interrupt signal is detected in any of the registers 1 to 9, and therefore no interrupt signal detection output is stored in the interrupt register 1. In such a case, 11hi111! A processing combinator (not shown) controls a terminal switching circuit 8, which controls a selector 3 and a multiplexer 6, and the selector 3 and the multiplexer 6 are arranged at predetermined intervals of seven hours. Transmission circuit 4I~
4 and receiving circuits 5I to 6s are selected. In this way, information is transmitted and received between the image processing combiator and the plurality of terminal devices in a time-sharing manner.
いずれかの端末装置から割込信号が発せられるさ、これ
に対応する割込信号検出回路９．〜９ｍのいずれかがこ
れを検出し、その検出出方が害１１込レジスタ１０に一
時記憶され、画像処理コンビ二一夕は端末切替回路８を
制御し、端末切替回路８はセレクタ３およびマルチプレ
クサ６を制御し、それぞれ割込要求のありた端末装置に
対応する送信回路４１〜４１のいずれか、および受信回
路５Ｉ〜５ｍのいずれかを選択する。このようにして、
短時間の間に画像処理コンビエータと割込要求のあった
端末装置との間で情報の送受信が可能さなる。When an interrupt signal is issued from one of the terminal devices, the corresponding interrupt signal detection circuit 9. ~9m detects this, the way it is detected is temporarily stored in the register 10 including the error 11, and the image processing unit 21 controls the terminal switching circuit 8, and the terminal switching circuit 8 controls the selector 3 and the multiplexer. 6, and selects one of the transmitting circuits 41 to 41 and one of the receiving circuits 5I to 5m corresponding to the terminal device that has made the interrupt request, respectively. In this way,
Information can be sent and received between the image processing combiator and the terminal device that made the interrupt request in a short period of time.
符号回路２および復号回路７は、端末制御装置と端末装
置上の間の情報伝送速度を上げるために光通信方式を採
用Ｔる場合、マーク率すなわち所定の単位時間あたりの
同一符号発生比率３０％〜６０％以内に収めるため及び
同一符号の連続数を設計基準以内に押えるために設けた
ものであるが、端末装置から発せられる割込信号につい
てはマーク率が約５０％となるような符号をあらかじめ
定めておくことによってこのような回路を用いる必要が
ない。When the encoding circuit 2 and the decoding circuit 7 adopt an optical communication method to increase the information transmission speed between the terminal control device and the terminal device, the mark rate, that is, the same code generation rate per predetermined unit time is 30%. This was created to keep the mark rate within ~60% and to keep the number of consecutive identical codes within the design standard, but for interrupt signals issued from terminal equipment, codes such that the mark rate is approximately 50% are used. By determining this in advance, there is no need to use such a circuit.
以上説明したように、本発明によれば、安価な装置を用
い、必要が生じたときには、端末制御装置と任意の端末
装置の間で短時間の間に情報の送受信をおこなうことが
できる。As described above, according to the present invention, information can be transmitted and received between a terminal control device and any terminal device in a short time when the need arises using an inexpensive device.
図は本発明の方式による端末制御装置の一実施例のシス
テム・ブロック図を示す。図において２は符号回路、３
はセレクタ、４１〜４簡は送信回路５１〜５１１は受信
回路、６はマルチプレクサ、７は復号回路、９．〜９１
は割込信号検出回路、１０は割込信号レジスタである。The figure shows a system block diagram of an embodiment of a terminal control device according to the method of the present invention. In the figure, 2 is a code circuit, 3
41 to 4 are transmitting circuits 51 to 511 are receiving circuits, 6 is a multiplexer, 7 is a decoding circuit, 9. ~91
1 is an interrupt signal detection circuit, and 10 is an interrupt signal register.
Claims (1)
回路を選択し核選択された送信回路に対し前記符号回路
の出力を入力するチャンネル・セレクタと、複数の端末
装置の各に対応して設けられる送信回路と、複数の端末
装置の各φこ対応して設けられる受信回路と、前記複数
の受信回路を選択し該選択された受信回路の出力を後記
復号回路に入力するマルチプレクサと、前記マルチプレ
クサが選択した受信回路の出力をり号する復号回路と、
前記チャンネル・セレクタによる送信回路Ｑ）選択と前
記マルチプレクサによる受信回路の選択とを制御する端
末切換回路とを偏え、複数の端末装置との間において時
分割により相互に情報の伝送を可能とする端末制御袋Ｗ
／ｌ＃こおいて、前配豪数の受信回路の各に接続され端
末装置から送信される害１１込み信号を検出する割込み
信号検出回路と、前記割込み信号検出回路の検出出力を
端末装置に対応して記憶する割込信号レジスタとを、前
記マルチプレクサと前記復号回路に対し独立して設けた
ことを特徴とする情報伝送方式。an encoding circuit for converting the code of transmission information; a channel selector for selecting a plurality of transmission circuits described later and inputting the output of the encoding circuit to the selected transmission circuit; and a channel selector for each of the plurality of terminal devices. a transmitting circuit provided, a receiving circuit provided corresponding to each of the plurality of terminal devices, a multiplexer that selects the plurality of receiving circuits and inputs the output of the selected receiving circuit to the post-decoding circuit; a decoding circuit that decodes the output of the receiving circuit selected by the multiplexer;
A terminal switching circuit that controls the transmission circuit Q) selection by the channel selector and the reception circuit selection by the multiplexer is biased to enable mutual transmission of information by time division between multiple terminal devices. Terminal control bag W
/l# Here, an interrupt signal detection circuit is connected to each of the receiving circuits of the predistribution number and detects an interrupt signal transmitted from a terminal device, and a detection output of the interrupt signal detection circuit is transmitted to the terminal device. An information transmission system characterized in that an interrupt signal register that is stored in a corresponding manner is provided independently for the multiplexer and the decoding circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56165056A JPS5866447A (en) | 1981-10-16 | 1981-10-16 | Information transmitting system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56165056A JPS5866447A (en) | 1981-10-16 | 1981-10-16 | Information transmitting system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5866447A true JPS5866447A (en) | 1983-04-20 |
Family
ID=15805000
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56165056A Pending JPS5866447A (en) | 1981-10-16 | 1981-10-16 | Information transmitting system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5866447A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01307859A (en) * | 1988-06-06 | 1989-12-12 | Hitachi Ltd | Data transfer controller |
-
1981
- 1981-10-16 JP JP56165056A patent/JPS5866447A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01307859A (en) * | 1988-06-06 | 1989-12-12 | Hitachi Ltd | Data transfer controller |
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