JPS5860878A - Picture recording device - Google Patents

Picture recording device

Info

Publication number
JPS5860878A
JPS5860878A JP56159902A JP15990281A JPS5860878A JP S5860878 A JPS5860878 A JP S5860878A JP 56159902 A JP56159902 A JP 56159902A JP 15990281 A JP15990281 A JP 15990281A JP S5860878 A JPS5860878 A JP S5860878A
Authority
JP
Japan
Prior art keywords
gradation
level
data
pixel
dither
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56159902A
Other languages
Japanese (ja)
Inventor
Mitsuyoshi Shindo
神藤 充由
Kazuya Umeyama
梅山 一弥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP56159902A priority Critical patent/JPS5860878A/en
Publication of JPS5860878A publication Critical patent/JPS5860878A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/40Picture signal circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Signal Processing For Recording (AREA)
  • Facsimile Image Signal Circuits (AREA)

Abstract

PURPOSE:To improve an apparatus resolution by making a maximum gradation difference between respective dots in one picture element or picture elements in one group less than the gradation difference between the highest gradation level and lowest gradation level, and smoothing the presentation of a color grade table. CONSTITUTION:The upper half data of picture elements are supplied to a decoder 1 and exploded according to the gradations that the data represents. For example, when the data has a gradation[5], the decoder 1 outputs a signal from its terminal 5. At this time, an up/down control signal shows[up]and a frequency control signal has a level[H], so outputs from AND gates AG1 and AG5 are inputted to a buffer memory 2 through OR gates OG8 and OG9 to perform the 1st printing. Then, the same data is supplied to the decoder 1 and the frequency control signal goes down to[L], so only the AND gate AG6 is opened to print the right upper dot again. Thus, a print having a right black and a left half-tone part is obtained. Similarly, the lower half part of picture elements is printed.

Description

【発明の詳細な説明】 本発明は画像信号を受けてハードコピーを作成する画像
記録装置に関し、特に階調を有する画像を作成する装置
に用いて最適なものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image recording device that receives an image signal and creates a hard copy, and is particularly suitable for use in a device that creates images with gradation.

従来のこの種の装置における階調記録方式としては次の
ようなものが知られている。
The following is known as a conventional gradation recording method for this type of apparatus.

(1)、階調に従って各画素に濃淡を付けることにより
階調を表現する方式。
(1) A method of expressing gradation by adding shading to each pixel according to the gradation.

(21,1jii素を複数のドツトで構成し、その印字
ドツト数を階調に従って制御し、各画素中のドツト密度
によって階調を表現する方式。
(A method in which each pixel is composed of a plurality of dots, the number of printed dots is controlled according to the gradation, and the gradation is expressed by the dot density in each pixel.

(3)、ディザ法を用いた方式。(3) A method using the dither method.

<41、(1)と(2)との併用で、ドツト密度による
階調表現法に濃淡を付ける階調表現法を導入し、1画素
を構成するドツト数を減少させた方式。
<41. A method that reduces the number of dots constituting one pixel by using a combination of (1) and (2) to introduce a gradation expression method that adds shading to the gradation expression method based on dot density.

(1)の方式では、印字手段の非線形特性、記録紙の発
色の非線形特性及びこれらの印字手段または記録紙の特
性のばらつき等によって階調レベルが影響を受は易く、
安定性、再現性等の面で実用上極めて不利である。
In the method (1), the gradation level is easily affected by the nonlinear characteristics of the printing means, the nonlinear characteristics of the color development of the recording paper, and variations in the characteristics of these printing means or the recording paper.
This is extremely disadvantageous in terms of stability, reproducibility, etc. in practice.

(2)の方式では、I!1図及び第2図の印字概念図(
夫々1画素を4ドツト及び9ドツトで構成した場合)に
示す如く1画素中の発色ドツト数で階調表現が行われる
が、階調数を増大させると1画素の両横が太き(なり、
解像度が低下Tる欠点を有する。
In method (2), I! Conceptual diagram of printing in Figures 1 and 2 (
As shown in the case where one pixel is composed of 4 dots and 9 dots, respectively, gradation is expressed by the number of colored dots in one pixel, but as the number of gradations increases, both sides of one pixel become thicker ( ,
It has the disadvantage that the resolution decreases.

(3)の方式では、(2)の方式はど解像度が低下する
ことはないが1階調数を多くすると、やはり解像度が低
下Tる傾向を有Tる。特に浸析の淡い画像部分では解像
度の劣化が顕著になる。
In the method (3), the resolution does not decrease as in the method (2), but when the number of gradations is increased, the resolution tends to decrease as well. The deterioration of resolution is particularly noticeable in image areas where the immersion is weak.

(4)の方式は特公昭56−19836号公報で開示さ
れたものであって、例えば第3図の印字概念図に示Tよ
うに1画素が4ドツトで構成されていても9階調を表現
できる。従って1画素の面積を大きくしなくても多階調
の画像を形成することができる。しかしドツト密度によ
る階調因子が導入されているので、成る程度の解像度へ
の影響は避けられない。また1画素中の任意の隣接する
二つのドツトの階調差が大であって、白、黒のパターン
が混在するので、画像がなめらかさに欠け、見かけ上解
像度が低下Tる欠点もある。
The method (4) is disclosed in Japanese Patent Publication No. 19836/1983, and for example, even if one pixel is composed of 4 dots as shown in the printing conceptual diagram in Fig. 3, 9 gradations can be achieved. I can express it. Therefore, a multi-tone image can be formed without increasing the area of one pixel. However, since a gradation factor based on dot density is introduced, some influence on resolution cannot be avoided. Furthermore, the difference in gradation between any two adjacent dots in one pixel is large, and white and black patterns coexist, resulting in an image that lacks smoothness and an apparent reduction in resolution.

本発明は上述の諸方式の問題点にかんがみ、解像度の低
下を押え、安定で且つなめらかな階調表現を実現するも
のである。
In view of the problems of the above-mentioned methods, the present invention is intended to suppress a decrease in resolution and realize stable and smooth gradation expression.

以下本発明の実施例を図面に従って説明する。Embodiments of the present invention will be described below with reference to the drawings.

第4図は本発明の第1の実施例を示す印字概念図である
。lI4図に示T印字パターンは発熱ヘッドと感熱紙を
用いたサーマルプリンタで印字することができ、最大濃
度の発色(クロスハツチングング部〕のドツトで構成゛
されている。各1画素中ではドツト間の階調差は必ず1
であって、最低レベル(無発色)ドツトと最大濃度ドツ
ト(階調差2)とが混在Tることが、ないようにパター
ンが定められている。
FIG. 4 is a conceptual diagram of printing showing the first embodiment of the present invention. The T print pattern shown in Figure lI4 can be printed with a thermal printer using a heat-generating head and thermal paper, and is composed of dots with maximum density color (cross-hatching area). The gradation difference between is always 1
The pattern is determined so that the lowest level (no color) dots and the highest density dots (gradation difference 2) do not coexist.

lI5図は第4図の階調@3″、14″及び@5″の印
字を行う場合の発熱ヘッドの通電タイムチャートで、第
6図は階調制御回路の回路図である。
FIG. 1I5 is a power supply time chart of the heating head when printing at gradations @3'', 14'', and @5'' shown in FIG. 4, and FIG. 6 is a circuit diagram of the gradation control circuit.

第5図に示Tよう暑こ各1画素(4×4ドツト)の上半
分と下半分とは時分割で印字され、また各1画素の左半
分と右半分は同時に(並行して)または順次に印字され
る。1つのドツトは前半及び後生の二回にわたって印字
され、前の半サイクルT゛1で中間濃度のドツトが形成
され、更に後の半サイクルT2で同一ドツトが再加熱さ
れることにより、最大貴度のドツトが形成される。
As shown in Figure 5, the upper and lower halves of each pixel (4 x 4 dots) are printed in time division, and the left and right halves of each pixel are printed simultaneously (in parallel) or Printed sequentially. One dot is printed twice, in the first half and second half, with a dot of intermediate density being formed in the first half cycle T1, and the same dot being reheated in the second half cycle T2, resulting in the maximum purity. dots are formed.

第6図において、1枚の面間の情報は図外の画素メモリ
・−に書込まれていて、印字タイミングに合わせて、1
水平ラインずつ或いは数画素ずつ読み出される。画素の
上半分を印字するために画像メモリーへの第1回目のア
クセスで読出されたデータは、デコーダ(1)に与えら
れ、そのデータが代宍する階調に従って展開される。例
えば階調′″5”のデータであれば、デコーダ(1)の
5の熾子から信号が出力きれ、オアグー)OG3〜OG
7を介してアンドゲート人G1、AG3、人G5、λG
6、AG7の夫々に入力きれる。このとき上下制御信号
は1上′m1回数制御信号は′H″(1回目)となって
いるので、アンドゲートAG1及びAG5の出力がオア
ゲートOG8.0G9flkってバッファーメモリー(
21に入力すも、更にバッファーメモリー(2)から直
列信号として次段のドライブ系に送られて第5図のタイ
ムチャートの如く1回目の印字()1−7トーン)が行
われる。
In Fig. 6, the information between the surfaces of one sheet is written in a pixel memory (not shown), and one page is written in accordance with the printing timing.
It is read out horizontally line by line or by several pixels. The data read out in the first access to the image memory for printing the upper half of the pixel is applied to a decoder (1), where it is developed according to the gradations it represents. For example, if the data is gradation ``5'', the signal will be output from the 5th layer of the decoder (1), and the signal will be output from OG3 to OG
7 through and gate person G1, AG3, person G5, λG
6. You can input to each of AG7. At this time, the up/down control signal is 1 above 'm1 and the number of times control signal is 'H' (first time), so the outputs of AND gates AG1 and AG5 are outputted by OR gate OG8.0G9flk and the buffer memory (
21 is further sent as a serial signal from the buffer memory (2) to the next stage drive system, and the first printing (1-7 tones) is performed as shown in the time chart of FIG.

1回目の印字情報の送出が終ると、再度画像メモリーが
アクセスされ、同一のデータがデコーダ(1)に供給さ
れる。このとき回数制御信号はlLI″(2回目)にな
るため、アンドゲートAG6だけが開かれて、第5vA
のタイムチャートの如くに右上のドツトだけが再度印字
される。この結果、第4図の階調15″のパターンの上
半分のように右側が黒で左側がハーフトーンの印字が行
われる。
When the first printing information is sent out, the image memory is accessed again and the same data is supplied to the decoder (1). At this time, the number control signal becomes lLI'' (second time), so only the AND gate AG6 is opened and the 5th vA
Only the upper right dot is printed again as shown in the time chart. As a result, printing is performed in which the right side is black and the left side is halftone, as in the upper half of the 15'' pattern in FIG.

上述のようにして一行(ライン)分の画素の上半分の印
字が終ると、上下制御信号が1下”の万に切換えられ、
再び上述と同じ処理が行われて画素の下半分が印字され
る。
When the upper half of the pixels for one line has been printed as described above, the up/down control signal is switched to 10,000, which is 1 down.
The same process as described above is performed again to print the lower half of the pixel.

上述の実施例によれば、濃度差の大きいドツト(黒と白
)が1画素中に混在しないので、なめらかな階調の画像
を得ることができ、見かけ上解像度が曳くなる。
According to the above-described embodiment, since dots with large density differences (black and white) are not mixed in one pixel, an image with smooth gradation can be obtained, and the apparent resolution is reduced.

次に本発明をディザ法に適用した印字装置について説明
する。CのwJ2の実施例では、纂7図の濃度レベル線
図に示Tように、発色濃度が16段階(0〜15)で安
定に得られるサーマルプリンタを用いて61段階の階調
画像が得られるようにしている。すなわち各レベルの領
域81〜B、6が実質的1こ4つのレベルに分割され、
白印字を含めて15X4+1=61通りの階調が作られ
ている。
Next, a printing device in which the present invention is applied to the dither method will be described. In the example of wJ2 in C, as shown in the density level diagram in Figure 7, a 61-step gradation image was obtained using a thermal printer that can stably obtain color density in 16 steps (0 to 15). I'm trying to be able to do that. That is, the areas 81 to B, 6 of each level are substantially divided into four levels,
Including white printing, 15×4+1=61 gradations are created.

各領域S、〜S1Bに対しては、2×2のデイザマトリ
ックス(合計15(II)が用意されていて、各領域ご
とにディザ法が適用される。領域Snに対する2×2の
ディザマトリックスDnの閾値は、Dn= Do + 
(n−1) U −・−−−−−−−−−(t)Do−
(00,5 0,250,75) (U:2X2の各要素か全て1の単位マトリックス)で
与えられる。例えばn = 5では、44.5 D5””(4,254,75) となる。このディザマトリックスを基準にして入力デー
タのレベルか判定されて、ディザ値0,1が決定される
ー。印字濃度は入力データの有Tるレベルが入る領域の
両端の濃度が用いられる。例えば、領域S6では、ディ
ザ値が″0”のとき、濃度レベル@5″、ディザ値が1
″のとき、濃度レベル”6″を夫々割尚てる。
For each region S, ~S1B, a 2×2 dither matrix (total 15 (II)) is prepared, and a dither method is applied to each region.A 2×2 dither matrix for the region Sn The threshold value of Dn is Dn=Do +
(n-1) U −・−−−−−−−−−(t)Do−
(00,5 0,250,75) (U: Each element of 2×2 or a unit matrix with all 1s) is given. For example, when n = 5, it becomes 44.5 D5"" (4,254,75). The level of the input data is determined based on this dither matrix, and dither values 0 and 1 are determined. As the print density, the density at both ends of the area where the input data level is entered is used. For example, in area S6, when the dither value is "0", the density level is @5" and the dither value is 1.
'', the density level ``6'' is reassigned.

第8図はこの#!2の実施例による階調制御回路のブロ
ック図で、第9図M1〜M15は181式で定められる
ディザマトリックスの模式図、第10図は印字画面の路
線図、第11図は各ディザマトリックスの各要素を示T
模式図である。
Figure 8 is this #! FIG. 9 is a block diagram of the gradation control circuit according to the second embodiment. FIG. 9 M1 to M15 are schematic diagrams of dither matrices determined by formula 181, FIG. 10 is a route map of the print screen, and FIG. 11 is a diagram of each dither matrix. Indicate each element
It is a schematic diagram.

89図に示される15通りのディザマトリックスは、上
のドツトのグループと下のドツトのグループに分離され
、第8図のマトリックスメモリー(4)に記憶されてい
る。上側の2ドツトの各グループはyドレス1〜15に
書込まれ、また下側の2ドツトの各グループはアドレス
17〜31に書込蒙れでいる。
The 15 dither matrices shown in FIG. 89 are separated into an upper dot group and a lower dot group, and are stored in the matrix memory (4) in FIG. Each group of upper two dots is written to y addresses 1-15, and each group of two lower dots is written to addresses 17-31.

81.0図に示T印字画面の1ライン目画素/161の
サンプルデータ(アナログ値〕が第8図の端子(5)に
入力されると、8g8図のスイッチ顛が1左”、スイッ
チaυが1上”の位置にセットされ、アドレスカウンタ
a4か端子(9)からのクロックパルスCKのカウント
を開始T′る。なおスイッチQI Ql)はアドレスコ
ントローラa場の出力で切換制御される。アドレスコン
トローラ翰は、端子(6)〜(8)に与えられる水平同
期信号H1垂直同期信号V%サンプルパルスに基いて、
全印字画面のアドレスに対応した切換制御信号を作成す
る。
81.0 When the sample data (analog value) of the 1st line pixel/161 of the T print screen shown in Figure 8 is input to the terminal (5) in Figure 8, the switch number in Figure 8g8 is 1 left, switch aυ. is set to the 1-up'' position, and the address counter a4 starts counting the clock pulses CK from the terminal (9) T'.The switch QI (Ql) is switched and controlled by the output of the address controller a field. Based on the horizontal synchronization signal H1 and the vertical synchronization signal V% sample pulse given to terminals (6) to (8), the address controller
Create a switching control signal that corresponds to the address of all print screens.

カウンタa2の出力はD/A変換器(13でアナログ値
に変えられ、比較器α尋に送られて入力データと比較さ
れる。D/A変換器の田カレベルが入力データを越える
と、アドレスカウンタaりは停止される。カウンタa)
の出力はスイッチq1)を介してアドレスデータとして
メモリー(4)に与えられ、第11図1こ示Tディザマ
トリックスの上側のデータが読出され、更にスイッチ四
で左側のデータが選択される。
The output of the counter a2 is converted into an analog value by the D/A converter (13) and sent to the comparator αhiro to be compared with the input data. When the output level of the D/A converter exceeds the input data, the address Counter a is stopped. Counter a)
The output of is given to the memory (4) as address data via switch q1), the upper data of the T dither matrix shown in FIG. 11 is read out, and the data on the left side is further selected by switch 4.

例えば、入力データレベルが3.4のとき、アドレスカ
ウンタaりが4を計数したとき、このカウンタ〔りが停
止されるので、第7図の領域S4に対応したディザマト
リックス(@9図のM4)が選択され、その左上の閾値
a4=6が読ffl?れる。Cの閾値14は、第8図の
比較器aつに送られ、入力データと比較されてディザ値
@0”′″1″が決定される。
For example, when the input data level is 3.4 and the address counter a counts 4, this counter is stopped, so the dither matrix corresponding to area S4 in FIG. ) is selected, and the upper left threshold value a4=6 is read ffl? It will be done. The threshold value 14 of C is sent to one comparator of FIG. 8 and compared with the input data to determine the dither value @0"'"1".

このディザ値はスイッチaQの操作に用いられ、ディザ
値10”の時はアドレスカウンタa2の出力から減算器
(1?)で1を引いたデータが、またディザ値″1”の
時はアドレスカウンタa2の出力そのものがスイッチQ
f9で選択される。スイッチaf9の出力は画素41の
印字濃度(16レベルのうちの1つ)を示している。
This dither value is used to operate the switch aQ, and when the dither value is 10'', the data obtained by subtracting 1 from the output of the address counter a2 with a subtracter (1?) is used, and when the dither value is ``1'', the data is obtained by subtracting 1 from the output of the address counter a2. The output of a2 itself is switch Q
Selected with f9. The output of the switch af9 indicates the print density (one of 16 levels) of the pixel 41.

例えば、上述のように入力データレベルが3.4であれ
ば、アドレス値4で読みff15れた閾値3と比較され
て、ディザ値@0′″が求められ、アドレス値4から1
を引いた濃度レベル3で印字が行われるO 次に第10図の1ライン目の/I62のサンプルデータ
が入力されると、スイッチQ(iが1右”にセットされ
、第11図のマ) IJラックス上部布の閾値が読出さ
れる。そして上述と同様にしてディザ値が決定され、こ
のディザ値lこ基いて印字濃度レベルが決定される。
For example, if the input data level is 3.4 as described above, the address value 4 is read and compared with the threshold value 3, which is ff15, and the dither value @0'' is determined.
Printing is performed at density level 3, which is obtained by subtracting O.Next, when the sample data of /I62 on the first line in Figure 10 is input, the switch Q (i is set to 1 right), and the ) The threshold value of the IJ Lux upper cloth is read out. Then, the dither value is determined in the same manner as described above, and the print density level is determined based on this dither value.

以後/I63のサンプルデータが入力されるとスイッチ
四が1左”に、/I64では1右”というように交互に
切換えられて、1ラインのデータ処理が行われる。
Thereafter, when the sample data of /I63 is input, switch 4 is alternately switched to 1" to the left, and to 1 to the right for /I64, thereby processing one line of data.

1ライン目の処理が終了すると、スイッチaυが下側に
切換えられ、次の2ライン目の処理が行われる。sio
図に示T2ライン目の画素* n + 1では、アドレ
スカウンタa2の出力に加算器α樽で16を加えたアド
レスデータがスイッチαυからメモリー(4)に供給さ
れるので、第11図のマトリックスの下部左側の閾値C
が読出され、その隣りの画素An+2では、スイッチG
oの切換えでマトリックスの下部右側の閾値dが読出さ
れる。
When the processing of the first line is completed, the switch aυ is switched to the lower side, and the processing of the next second line is performed. sio
In the pixel *n+1 of line T2 shown in the figure, address data obtained by adding 16 to the output of the address counter a2 by the adder α barrel is supplied from the switch αυ to the memory (4), so that the matrix shown in FIG. The lower left threshold C of
is read out, and in the pixel An+2 next to it, the switch G
By switching o, the threshold value d on the lower right side of the matrix is read out.

更に次のラインではス、イツチθυが1上”に切換えら
れ、以後、ラインごとに交互にスイッチαυが9上”、
′下”に切換えられて全画面に対する処理が行われる。
Furthermore, in the next line, the switch θυ is switched to "1 above", and thereafter, the switch αυ is alternately switched to "9 above" for each line.
``Down'' and processing is performed on the entire screen.

例えば、上下、左右に隣接する4つの微少画素グループ
tこついての入力データレベルが、3.4  3.4 (3,、s   s 、 4)  ””””” (21
の場合には、カウンタαのか計数Tるアドレス値代夫々
について、 (44・・・・・・・・・・・・(3)4  4ン となる。従って、このアドレスに基いてマトリックスメ
モリー(4)からスイッチaωαυの選択に応じて読出
されたディザマトリックスの閾値は、となる。この閾値
と2式の入力データとが比較器霞で比較され、次のディ
ザ値が決定される。
For example, the input data level of four minute pixel groups t that are adjacent to each other vertically, horizontally, and vertically is 3.4 3.4 (3,,s s , 4) ``”””” (21
In this case, for each address value counted by counter α or T, it becomes (44...................................(3)44).Therefore, based on this address, matrix memory ( The threshold value of the dither matrix read out according to the selection of the switch aωαυ from 4) is as follows.This threshold value and the input data of the two equations are compared by the comparator Kasumi, and the next dither value is determined.

(81)・・・・・・・・・・・・・・・(5)このデ
ィザ値に基いて3式のアドレス値tこ0または−1の修
正が加えられるので、各ドツトの印字濃度は、 (34 34ン ・・・・・・・・・・・・・・・ (6)とな
る。従って、16通りの階調では、第2式の入力データ
3.4に対する印字濃度は6または4のみであるが、デ
ィザ法を適用した場合、6式に示すよう(こ上下左右暑
こ隣接Tる4画素のグループに関しては、平均して(5
+5+4+4)/4=5.5の濃度の中間階調が得られ
る。すなわち、61通りの階調の印字画面を得ることが
できる。
(81)・・・・・・・・・・・・・・・(5) Based on this dither value, the address value t of the three formulas is corrected by 0 or -1, so the print density of each dot is is (34 34n . . . . . . . (6). Therefore, with 16 gradations, the print density for the input data 3.4 of the second equation is 6. However, when the dither method is applied, as shown in equation 6, for a group of 4 pixels adjacent to each other (top, bottom, left, right, top), on average (5
+5+4+4)/4=5.5 intermediate gradations are obtained. That is, a printing screen with 61 different gradations can be obtained.

従来の白黒−の2値をこよるディザ法若しくは第1図ま
たはIIK2図のドツト密度制御法で、61−階調表現
を得る場合、8×8ドツトが必!となるが、上記@2実
施例では2×2のドツトで済むから、解像度の点で極め
て有利である。
If you want to obtain 61-gradation expression using the conventional dithering method that uses black and white binary values or the dot density control method shown in Figure 1 or IIK2, 8x8 dots are required! However, in the @2 embodiment, only 2×2 dots are required, which is extremely advantageous in terms of resolution.

また各濃度領域内において、求められたディザ値に基い
て真の濃度の近傍(該当濃度領域の上側及び下側のil
Kレベル)が選ばれるので、1画素グループ内で濃度差
の大きなドツトが混在することがな(、なめらかな階調
表現を行うことができ、より自然な画像が得られる。ま
た階調表現がよりなめらかになることで、見かけ上の解
像度は同上する。更に、ディザ法を適用しているので、
ドツト密度制御及び印字濃度制御を併用する第3図のよ
うな1式に対しても解像度に関して有利であもなお第2
の実施例で、ディザマトリックスを3×6にTれば、1
66階調の表現も可能である。
In addition, within each density region, based on the obtained dither value, the vicinity of the true density (il
K level) is selected, so that dots with large density differences do not coexist within one pixel group (K level), smooth gradation expression can be performed, and a more natural image can be obtained. By making it smoother, the apparent resolution is the same as above.Furthermore, since the dither method is applied,
Although it is advantageous in terms of resolution compared to the one system shown in Fig. 3 that uses both dot density control and print density control, it is still
In the example, if the dither matrix is 3×6, then 1
It is also possible to express 66 gradations.

また各サンプルデータに対してシリアル処理を行ってい
るが、パラレル処理も可能である。
Although serial processing is performed on each sample data, parallel processing is also possible.

本発明は上述の如(,1画素若しくは1グループの画素
中の各ドツト間の最大階調差を最高階調レベルと最低階
調レベルとの階調差よりも小さくしたから、よりなめら
かな階調表現の画像を得ることができ、見かけ上の解像
度も改善される。
As described above, the present invention makes the maximum gradation difference between each dot in one pixel or one group of pixels smaller than the gradation difference between the highest gradation level and the lowest gradation level, resulting in smoother gradation. An image with tone expression can be obtained, and the apparent resolution is also improved.

る印字概念図、第4図は本発明のwLlの実施例を示T
印字概念図、It!5WJは第4図の階調@3”、14
”及び@5″の印字を行う場合の発熱ヘッドの通電タイ
ムチャート、第6図は階調制御回路の回路図、第7図は
本発明の1!2の実施例におけ7る濃度レベル線図、@
8図はこのIt12の実施例による階調制御回路のブロ
ック囚、第9図KM1〜M15は纂1式で定められるデ
ィザマトリックスの模式図、第10図は印字画面の路線
図、第11図は各ディザマトリックスの各要素を示す模
式図である。
Figure 4 shows an embodiment of wLl of the present invention.
Printing concept diagram, It! 5WJ is the gradation level in Figure 4 @3”, 14
6 is a circuit diagram of the gradation control circuit, and FIG. 7 is the density level line 7 in the 1!2 embodiment of the present invention. figure,@
Figure 8 is a block diagram of the gradation control circuit according to this embodiment of It12, Figure 9 KM1-M15 is a schematic diagram of the dither matrix determined by the formula 1, Figure 10 is a route map of the print screen, and Figure 11 is FIG. 3 is a schematic diagram showing each element of each dither matrix.

なお図面に用いた符号において、 (4)・・・・・・・・・・・・・・・マトリックスメ
モリーa備υ・・・・・・・・・・・・スイッチaの・
・・・・・・・・・・・・・・アドレスカウンタα■・
・・・・・・・・・・・・・・D/A変換器Qa5・・
・・・・・・・・・・比較器αe・・・・・・・・・・
・・・・・スイッチαD・・・・・・・・・・・・・・
・減算器αQ・・・・・・・・・・・・・・・加算器で
ある。
In addition, in the symbols used in the drawings, (4)・・・・・・・・・・・・Matrix memory a is equipped with switch a.
・・・・・・・・・・・・Address counter α■・
・・・・・・・・・・・・D/A converter Qa5...
・・・・・・・・・Comparator αe・・・・・・・・・・・・
・・・・・・Switch αD・・・・・・・・・・・・・・・
・Subtractor αQ・・・・・・・・・・・・It is an adder.

代理人 上屋 勝 第1図 第2図 第3図 □      第4図Agent Katsu Ueya Figure 1 Figure 2 Figure 3 □      Figure 4

Claims (1)

【特許請求の範囲】[Claims] 1つの画素若しくは1グループの画素が複数のドツトで
構成され、各ドツトが所定の段階の階調で記録されるよ
うにした画像記録装置において、1画素若しくは1グル
ープの画素中の各ドツト間の最大階調差を最高階調レベ
ルと最小階調レベルとの階調差よりも小さくシたことを
特徴とする画像記録装置。
In an image recording device in which one pixel or one group of pixels is composed of a plurality of dots and each dot is recorded at a predetermined level of gradation, the difference between each dot in one pixel or one group of pixels is An image recording device characterized in that the maximum gradation difference is smaller than the gradation difference between the highest gradation level and the lowest gradation level.
JP56159902A 1981-10-07 1981-10-07 Picture recording device Pending JPS5860878A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56159902A JPS5860878A (en) 1981-10-07 1981-10-07 Picture recording device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56159902A JPS5860878A (en) 1981-10-07 1981-10-07 Picture recording device

Publications (1)

Publication Number Publication Date
JPS5860878A true JPS5860878A (en) 1983-04-11

Family

ID=15703662

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56159902A Pending JPS5860878A (en) 1981-10-07 1981-10-07 Picture recording device

Country Status (1)

Country Link
JP (1) JPS5860878A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6243264A (en) * 1985-08-20 1987-02-25 Toshiba Corp Multi-gradation recording system
US4686538A (en) * 1984-10-31 1987-08-11 Canon Kabushiki Kaisha Tone recording method
US4692773A (en) * 1982-07-23 1987-09-08 Canon Kabushiki Kaisha Image forming method using image forming elements having different concentrations and pitches
JPS62249565A (en) * 1986-04-23 1987-10-30 Toshiba Corp Multilevel recording system
US4713746A (en) * 1982-05-14 1987-12-15 Canon Kabushiki Kaisha Method for forming pictures
US4714964A (en) * 1984-07-13 1987-12-22 Canon Kabushiki Kaisha Intermediate gradient image forming method
US4727436A (en) * 1982-09-01 1988-02-23 Canon Kabushiki Kaisha Method and apparatus for producing a picture
US4772911A (en) * 1984-01-19 1988-09-20 Canon Kabushiki Kaisha Image formation apparatus
US4959659A (en) * 1983-03-08 1990-09-25 Canon Kabushiki Kaisha Color picture forming apparatus and method
JPH0890820A (en) * 1994-09-26 1996-04-09 Nec Corp Method and apparatus for driving thermal head

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4713746A (en) * 1982-05-14 1987-12-15 Canon Kabushiki Kaisha Method for forming pictures
US4692773A (en) * 1982-07-23 1987-09-08 Canon Kabushiki Kaisha Image forming method using image forming elements having different concentrations and pitches
US4727436A (en) * 1982-09-01 1988-02-23 Canon Kabushiki Kaisha Method and apparatus for producing a picture
US4959659A (en) * 1983-03-08 1990-09-25 Canon Kabushiki Kaisha Color picture forming apparatus and method
US4772911A (en) * 1984-01-19 1988-09-20 Canon Kabushiki Kaisha Image formation apparatus
US4714964A (en) * 1984-07-13 1987-12-22 Canon Kabushiki Kaisha Intermediate gradient image forming method
US4686538A (en) * 1984-10-31 1987-08-11 Canon Kabushiki Kaisha Tone recording method
JPS6243264A (en) * 1985-08-20 1987-02-25 Toshiba Corp Multi-gradation recording system
JPS62249565A (en) * 1986-04-23 1987-10-30 Toshiba Corp Multilevel recording system
JPH0890820A (en) * 1994-09-26 1996-04-09 Nec Corp Method and apparatus for driving thermal head

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