JPS5859669A - Error control system of facsimile - Google Patents

Error control system of facsimile

Info

Publication number
JPS5859669A
JPS5859669A JP56158936A JP15893681A JPS5859669A JP S5859669 A JPS5859669 A JP S5859669A JP 56158936 A JP56158936 A JP 56158936A JP 15893681 A JP15893681 A JP 15893681A JP S5859669 A JPS5859669 A JP S5859669A
Authority
JP
Japan
Prior art keywords
line
circuit
stored
original
line number
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56158936A
Other languages
Japanese (ja)
Inventor
Yoshinori Yamada
義憲 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP56158936A priority Critical patent/JPS5859669A/en
Publication of JPS5859669A publication Critical patent/JPS5859669A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/40Picture signal circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Storing Facsimile Image Data (AREA)
  • Facsimile Transmission Control (AREA)

Abstract

PURPOSE:To obtain a recording picture being faithful to an original, and also to shorten a time required for correcting an error, by resending an erroneous line picture signal of the original, and substituting a correct picture signal for this erroneous line picture signal which has been resent. CONSTITUTION:An erroneous line detecting circuit 16 counts the number of bits of a picture signal of its decoded line, checks an error of the line concerned, and if there is an error, a line number code stored in a line number detecting circuit 17 is stored as an erroneous line number code in a memory circuit 18. When a signal showing a picture signal end as to one sheet of original is received, a controlling circuit 19 transmits the erroneous line number code stored in the memory 18, to the transmitting side. In the transmitting side, a resending line number code arriving from a line number detecting circuit 6 is stored in order. A memory circuit 2 sends out a picture signal of a line corresponding to the resending line number stored in the detecting circuit 6, to the receiving side through an MODEM5.

Description

【発明の詳細な説明】 不発明はツアクvi!lの瞑如制鈎方式に関し。[Detailed description of the invention] Non-invention is Tsuaku vi! Concerning the meditation method of l.

特に1枚の原稿の伝送終了後に、その原稿め誤9たライ
ンの画側−号な再送するようにした制一方式を提案Tる
ものである。
In particular, we propose a control system in which, after the transmission of one sheet of original is completed, the image side number of the wrong line of the original is retransmitted.

一般に7′アクPt5画情報は、隣接する2ライン間に
相関関係がある丸め、誤シラインを前ラインの画信号で
置換して記録再現しても元の原稿に略忠実なε録画を得
ることができる。しかし、それはxbがランダムに且つ
許容される範囲内で生じ九場合にgeする事でるうで1
例えば#4)が数ラインに亘りてバースト鈎に生じえ場
合、Toるいは。
In general, 7'AkPt5 image information is rounded off because of the correlation between two adjacent lines, and even if the erroneous line is replaced with the image signal of the previous line and recorded and reproduced, it is possible to obtain an ε recording that is approximately faithful to the original manuscript. Can be done. However, it is possible that xb occurs randomly and within an allowable range, and ge occurs in 9 cases.
For example, if #4) can occur on a burst hook over several lines, To or.

誤〕ライン数が許容される。範囲を越えて増加した場合
には、記録−品質は急激に低下する。従りて。
Incorrect] Number of lines is allowed. If it increases beyond this range, the recording quality will drop sharply. Therefore.

この方式では1時には致命的なε録画となり、ファクシ
tヲ本来の機能が連成されなiことになる。
In this method, fatal ε recording occurs at 1 o'clock, and the original function of the facsimile machine is no longer coupled.

このため、最近のファクシミヲ装置にお−ては。For this reason, recent facsimile machines.

ファクシtヲ画情報をある単位毎のプロッタに分割し、
このブロック単位毎の誤〉刺−を行ないクク伝送すると
いう方法が提案されて−る。しかし。
Divide the facsimile image information into plotters for each unit,
A method has been proposed in which this error is performed on a block-by-block basis and the block is transmitted. but.

誤〉制御の方法としそ誤〉の生じたブロックにつ−で再
送し、誤)の訂正な行なおうとする場合。
When trying to correct the error by retransmitting the block where the error occurred using the control method.

必然的に受amから送amtc対するブロック単位毎の
応答が必要とな)、これは轟然のことながら、誤〉制御
に要する時間だけ伝送時間が艮(なることを意味する。
Naturally, a response is required for each block from the receiving AM to the sending AMTC, which means that the transmission time is increased by the time required for error control.

他方、WL稿1枚を単位として誤〉制御な行なう方法、
即ち、原稿1枚にウ一ての受信記録画の剛質な判定し、
II質の悪い場合には、該白原稿を始めから再送Tると
いう方法も提案されてiる。この方法は誤シの生じてい
ない場合、あるいは、許容される範囲内の誤シの場合は
、ブロック単位で誤〉制御を行う場合に比し誤〉制御の
為の時間を一切要しない。しかし、誤シのな一ラインに
つ−でも全て再送を行なわねばならず、従りて、一般的
に誤〉のないラインが誤)ラインに比して充分に少ない
ことを考慮すると、再送の必要のないツ従りて、Cの方
式では比較的安価に実現で台るが、その反−1一度誤シ
が生じると、、原稿全体な再送しなけれとならないため
、特に長距離通信の場合には電話料金が高くり(と云う
欠点がある。
On the other hand, a method of performing incorrect control for one WL document as a unit,
In other words, rigid judgment of all received recorded images for one original,
In the case of poor quality, a method has also been proposed in which the blank original is resent from the beginning. This method does not require any time for error control compared to the case where error control is performed on a block-by-block basis when no error occurs or when the error is within an allowable range. However, it is necessary to retransmit every single line without errors, and therefore, considering that the number of lines without errors is generally much smaller than the lines with errors, retransmission is necessary. Therefore, method C can be implemented relatively inexpensively, but on the other hand, once an error occurs, the entire document must be retransmitted, especially in long-distance communication. has the disadvantage of high telephone charges.

本発明は断る背景のもとになされたものであ〉。The present invention was made against this background.

以下1本発明のWAシ制御方式を図面を#煕して説明す
る。
The WA control system of the present invention will be explained below with reference to the drawings.

図面は本発明を実施し九ファク&/lツ装置の概略構成
を表わしておシ、第1図が送信側装置で。
The drawings schematically show the configuration of a nine-fax machine that implements the present invention, and FIG. 1 shows the transmitting side device.

第2図が受信af!置である。Figure 2 is received af! It is a place.

第1図KjPい’C,<1)はファクVtす原稿を光学
的に読み取)電気的な11信号に変換する読取シ回路、
(2jは読取)1路(1)で得られた画信号を少なくと
%b1枚の原稿にクーて記憶する容置を持りノモヲ回路
、【3Jはメそヲ回路(2)から順次続出された画信号
を抑圧符号化する符号化回路、(4jは符号化回路(3
Jに各1ライン分のWIR@が導入される毎にその各画
信号のライン番号を表わ丁2進数符号等の適当なコード
偏@を作成するライン番号コード作成回路、(5)は送
出償8t#変調し受!II9を復−するモデム回°路、
16)は受信側よ〉返送されるライン番号コードを検出
するライン番り検出回路、(7)は原稿の読取シを含む
一連の7アクVt!7送信動作の制gな司どる制御回路
、(8)は回線との接続端子である。 “ まえ、第2図に於いて、aDは回線との接続端子。
Fig. 1 shows a reading circuit that optically reads the original document and converts it into an electrical 11 signal;
(2j is reading) The image signal obtained in 1st pass (1) is stored in at least %b of one original document and has a storage capacity, and 3J is sequentially output from main circuit (2). An encoding circuit (4j is an encoding circuit (3)
(5) is a line number code generation circuit that represents the line number of each image signal each time one line of WIR@ is introduced into J, and generates an appropriate code such as a binary code. Compensation 8t #modulated reception! modem circuit for returning II9;
16) is a line number detection circuit that detects the line number code sent back from the receiving side, and (7) is a series of 7 ac Vt! 7. A control circuit that controls the transmission operation, and (8) a connection terminal with the line. “First, in Figure 2, aD is the connection terminal to the line.

■は受信信号を復調し送出信号を変調するモデム回路、
Uは符号化画信号な復号して元のlliill号を得る
復す化回路、 (14はこの復号化回路か′ら得た画信
号な少なくとも1枚の原稿についてε億する容置を持゛
り第1のメモリ回路、 IIはこのメモリ回路から続出
され九画信号の記録を行なう記録回路。
■ is a modem circuit that demodulates the received signal and modulates the transmitted signal;
U is a decoding circuit which decodes the encoded image signal to obtain the original lliill code, (14 has a capacity for storing at least one original document which is the image signal obtained from this decoding circuit); a first memory circuit, and II a recording circuit that records nine-picture signals successively output from this memory circuit.

1!は復号された各ラインの画信号のビット数を計数す
る等の方法によ)娯シラインを検出する誤〉ライン検出
回路、aDは送信側より到来するフィン番号コードな検
出するライン番号検出回路、 (18は誤〉ライン検出
回路tteで誤〉ラインが検出された場合に、ライン番
号検出回w!111からのライン番号コードを記憶する
第20)そり回路、鰭はε録酬御を含む一連のファクV
19受侶動作の制a#を司どる制御回路である。
1! aD is a line number detection circuit that detects the fin number code coming from the transmitting side; (18 is the 20th sled circuit that stores the line number code from the line number detection circuit w! 111 when the line detection circuit tte detects an erroneous line), and the fin is a series including the ε recording control. Faku V
19 This is a control circuit that controls the control a# of the recipient's movements.

次に、所るファクシミツ装置の動作を第5図を参照して
説明する。
Next, the operation of a certain facsimile machine will be explained with reference to FIG.

今、交信開始時に於ける送信側及び受信側での制御信号
の授受が終了し、vR信号の伝送段階に入りたとすると
、送g!@装置(g!11図)の続取り回路(1)は制
御回路(7)の制御の下に、原稿の読み取りな開始Tる
。読取り回路(1)で読み取られた画信号はメモリ回I
I (2)に記憶され1次にこのメモリ回路(2)よシ
符号化回路(3)に導出され冗長度抑圧の為の符号化な
受ける。ライン番号コード作成回路(4)は。
Now, suppose that the sending and receiving of control signals between the transmitting side and the receiving side at the start of communication has been completed, and the stage of transmitting the vR signal has begun. The takeover circuit (1) of the device (Fig. 11) starts reading the original under the control of the control circuit (7). The image signal read by the reading circuit (1) is stored in the memory circuit I.
The signal is stored in the memory circuit (2) and then sent to the encoding circuit (3) where it is encoded to reduce redundancy. Line number code creation circuit (4).

符号化回路(33が各ラインの符号化出力な導出する毎
に内蔵するカウンタを1ずつ力ワントアツプし。
Each time the encoding circuit (33) derives the encoded output of each line, it increments the built-in counter by one.

Cのカウンタの計数結果(2進数〕がその各ライン1に
衷わ丁ライン番号コードとして出力される。
The counting result (binary number) of the counter C is outputted to each line 1 as a line number code.

このフィン番号コード(kl)は、第6図に示すように
、符号化回路(3)から導出される各ラインのライン同
期符号(罵OL)と符号化画信号(Dり一にシリアルに
挿入されてモデム回路′(5)に導入される。
As shown in FIG. 6, this fin number code (kl) is serially inserted into the line synchronization code (OL) of each line derived from the encoding circuit (3) and the encoded picture signal (DRI). and then introduced into the modem circuit' (5).

モデム囲路(5)はこれら6種の符ijK変調を施して
回ItIk続端子(8)を介して回線に出力する。これ
らの動作は1枚の原稿についての画信号送出が完Tする
までの間継続される。この結果、ファクシミリ画伯’?
伝送の段階では第!1図に示した如き符号列が回線に対
し出力されることとなる。そして。
The modem circuit (5) performs these six types of code ijK modulation and outputs it to the line via the line ItIk connection terminal (8). These operations are continued until the image signal transmission for one document is completed. As a result, the facsimile painter'?
At the transmission stage! A code string as shown in FIG. 1 will be output to the line. and.

1枚の原稿についての上述の慇理が完了Tると。When the above-mentioned principle for one manuscript is completed.

制卸回路(7)は読取〉回路(1)、符号化回路(3)
、ライン番号コードt#−成回路(4)の動作をそれぞ
れ停止させ、1枚の原稿の送出路Tt−示す制御信号な
作成し送出する。
The control circuit (7) is a reading circuit (1) and an encoding circuit (3).
, the line number code t#-forming circuit (4) is stopped, and a control signal indicating the sending path Tt- of one document is generated and sent.

一方、受偶側装置Cf152図)では、受g4偶号が回
Iil接続端干aυを介してモデム回路α署に導入され
て復調されたのち復号化回路al及びライン番号検出回
路σnに入力される。復号化回路lは第5図の受信符号
列の中から先ずライン同期符号(MOL)を検出し、該
検出出力をライン番号検出回路任りに出力する。ライン
番号検出回路αりは上記検出出力によりてライン同期符
号に引きつづいて到来するライン番号コード(LM)を
抽出して配憶する。次きつづき到来する符号化画信号(
Dりを復号して元の@信号を再現し、第1)七g回路1
4に記憶させる・その際、制御回路■は記録回路−に対
し何の指示も与えず、従9で、記録回路−が動作するこ
とはない、復号北回muが1ラインにクーでの両信号の
復48を終了すると、1IIbライン検出回路叫はその
復号されたラインの1111g!!号のビット数を計数
し、轟該ラインの誤如の有無をtニックする。
On the other hand, in the receiver side device Cf152), the receiver g4 even code is introduced into the modem circuit α station via the circuit Iil connection terminal aυ, demodulated, and then input to the decoding circuit al and line number detection circuit σn. Ru. The decoding circuit 1 first detects a line synchronization code (MOL) from the received code string shown in FIG. 5, and outputs the detection output to the line number detection circuit. The line number detection circuit α extracts and stores the line number code (LM) that arrives following the line synchronization code based on the detection output. Encoded image signals that arrive one after another (
Decoding the D signal and reproducing the original @ signal, 1st) 7g circuit 1
At this time, the control circuit (■) does not give any instructions to the recording circuit (9), and the recording circuit (9) does not operate. Upon completing the decoding of the signal, the 1IIb line detection circuit detects the 1111g! of that decoded line. ! The number of bits in the line is counted, and the line is ticked to see if there is an error.

誤〉のな−場合は第2ノモヲ回路舖は何の動作もしない
が、誤〕が検出され九場合は、誤)ライン検出回路−の
出力によシライン番号検出回路17)に記憶されている
ライン番号コードカ誤)ライン番号として第2、メモヲ
回路alK記憶される。これらの動作は送信a装置よ〉
到来する1枚の原稿にクーてIDmlIIi号終Tを示
TIIII信号が到来するまでの閏継続される。この制
御信号が検出されると。
If there is no error, the second number circuit does not operate, but if an error is detected, the line number detection circuit 17) stores the output from the line detection circuit (error). (Incorrect line number code) The line number is stored in the second memory circuit alk. These operations are performed by the sending device
The process continues until the TIII signal indicating the end of the IDmlIIi number T arrives for each incoming manuscript. Once this control signal is detected.

制御回路部は直ちに復号北回II(13の動作を停止せ
しめ、同時に第2)そり回路−の状態をチェックする。
The control circuit unit immediately stops the operation of the decoding north circuit II (13) and at the same time checks the state of the second sled circuit.

このチェックによ)第2メモリ回MQIK誤シラインの
コードが記憶されていると、制御回路部は誤シラインの
再送を要求する旨を示す制御信号を作成して送信側装置
に送出する。続−て制御回路Iは第2ノそり回路部に対
し指示し、これによりて順次記憶されている誤〉ライン
番号p−Fがモデム囲路lに導入されて送信側装置に伝
送される。
As a result of this check, if the code for the second memory MQIK incorrect line is stored, the control circuit creates a control signal indicating a request for retransmission of the incorrect line and sends it to the transmitting device. Subsequently, the control circuit I instructs the second warping circuit section, whereby the sequentially stored incorrect line numbers p-F are introduced into the modem circuit I and transmitted to the transmitting device.

次に、送信側装置に於いて、受信Il装置からのIi!
夛ラインの再送を要求する制御信号が制御回路(7)で
検出されると、制御回路(7)は該制御信号に続いて到
来Tる娯)ライン番号(Ipも、再送ツイン番号ンコー
ドの検出をライン番号検出i8路(6)に指示する。ラ
イン番号検出回路(6)は前記誤シラインの再送を要求
する制御l!!号に続−て到来Tる再送ライン番号コー
ドを順次記憶する。再送ライン番号コードが終了すると
、制御回i1173はメモjl!!l1l(2)及びラ
イン番号検出回路(6)K対して再送ライン番号に対応
するラインの再送を指示する。この指示によ)メモ5回
路(2)はライン番号検出回路16)に配憶されている
再送ライン番号に相当するラインのwl!号’kR号化
1路(3)に導出し、モデム1路(5)を介して受信m
装置に送出する。これらの動作はラインa1:8検出回
路(6)に記憶されている全ての再送ラインにり一での
送出が、完了するまでの間継続される・その際智送信l
I装置から出、力される信号形式は前述の第6図のよう
になりておシ1通常の原稿を読み取)つりI1g!!号
を送出する場合と全く同様である。そして、全ての再送
ラインの退出が完Tすると、制御回路(7)は再送ツイ
ンの退出完了を示す制御信号を送出して受信IIIN!
置からの応答を持つ。
Next, at the transmitting side device, Ii! from the receiving Il device!
When a control signal requesting the retransmission of a duplicate line is detected by the control circuit (7), the control circuit (7) detects the retransmission twin number code of the incoming T line number (Ip) following the control signal. The line number detection circuit (6) instructs the line number detection circuit (6) to sequentially store the retransmission line number codes that arrive following the control l!! signal requesting retransmission of the erroneous line. When the retransmission line number code ends, the control circuit i1173 instructs the memo jl!!l1l (2) and line number detection circuit (6) K to retransmit the line corresponding to the retransmission line number. 5 circuit (2) is the wl! of the line corresponding to the retransmission line number stored in the line number detection circuit 16). The code 'kR is derived from the code 1 (3) and received via the modem 1 (5).
Send to device. These operations continue until transmission on all retransmission lines stored in the line a1:8 detection circuit (6) is completed.
The signal format output from the I device is as shown in Figure 6 above. ! This is exactly the same as when sending out a number. When the exit of all retransmission lines is completed, the control circuit (7) sends a control signal indicating completion of exit of the retransmission twin, and receives III IN!
with a response from the location.

一方、 901gl装置では、誤りライン番号コードの
退出が完了すると、再送ラインmig!i号の受信状態
とな夛、送信側5kmからの画信号を待つ。送信11*
1からの再送画信号が到来すると、前述と全く同様にし
て復号化回路l″eまずライン同期符号(罵OL)  
が検出され、続いて到来するライン番号コード(X−肩
)がライン番号検出回路t7)fcよりて検出される。
On the other hand, in the 901GL device, when the exit of the erroneous line number code is completed, the retransmission line mig! Once the I signal is in reception status, we wait for an image signal from the transmitting side 5 km away. Send 11*
When the retransmission image signal from 1 arrives, the decoding circuit 1''e first converts the line synchronization code (OL) in exactly the same way as described above.
is detected, and the subsequently arriving line number code (X-shoulder) is detected by the line number detection circuit t7)fc.

復号化回路a3で復号化された両信号は。Both signals are decoded by the decoding circuit a3.

ライン番号検出回路(17)で検出されたライン番号に
従い第1ノそり回路(IIJK既に記憶されている誤)
ラインの画信号と置換されてと憶される。この結果、第
1ノそり回路Iには全く誤りのないigI信号が記憶さ
れたことになる・この動作は送g!I側装置からの再送
ラインの送出を完Tするit−指示する制御(21号が
到来Tるまでの間継続される。仁の制御g!Iljが到
来すると、制御回路a9は再送ラインのll1Rjj受
41!確認を示T制御信号を作成し、送信側装置に対し
て出力する。そして、Cの制御信号の送出を完了Tると
、制御回frfiL、”#gm第1メモリ回路I及び記
憶回路a9に対して記録關始の指示をし。
According to the line number detected by the line number detection circuit (17), the first warping circuit (IIJK already stored error)
It is stored as being replaced with a line image signal. As a result, the igI signal with no errors is stored in the first warp circuit I. This operation is performed by sending g! It-instructing control to complete the transmission of the retransmission line from the I-side device (continues until No. 21 arrives).When the control g!Ilj arrives, the control circuit a9 controls the retransmission line ll1Rjj. Receiving 41! Indicates a confirmation T control signal is created and output to the transmitting side device. Then, when the transmission of the control signal C is completed T, the control circuit frfiL, "#gm first memory circuit I and storage Instruct circuit a9 to start recording.

これによ)て記録回路ajはメモリag!1tt*よシ
順次画信号を導出してli!、録画を再現する。その際
、第1ノモリー路Iに記憶されているW!At!i@に
は全くanがなく、従フで、完全なε録画が再現される
のは当然のことである。このようにして記@1w4aS
によシ全ての記録が完了すると、受@1lil装置が一
連のファクシt9受信動作を完了Tる。
As a result, the recording circuit aj is transferred to the memory ag! 1tt*Yoshi sequential image signal is derived and li! , replay the recording. At that time, the W! stored in the first Nomory path I! At! It is natural that i@ has no an, and a complete ε recording is reproduced in the subordinate f. Written like this @1w4aS
When all facsimile recording is completed, the receiving@1lil device completes a series of facsimile t9 receiving operations.

また、送信側装置は、受信側装置からの再送ラインのi
li@!号の受信確認を示す上記制御a号を接作な終T
Tる。
Also, the transmitting side device receives the retransmission line i from the receiving side device.
li@! The above-mentioned control number a indicating confirmation of receipt of the number is
Tru.

以上の説明は、受信側装置に於いて、第2ノそり回路Q
8に娯)ライン番号コードが記憶されて−た場合である
が、第2ノモy回路餞に上記コードが全く記憶されてい
ない場合は、このメモツ回路のチェック後に正常に受信
したことを示す制ag1号を作成して送ll側装置に送
出Tる。そして、この制卸信号の検出によりて送信lI
M装置は送信動作を終了し、受信115kIiK於いて
は電気に第1メモ2 以上説明した如く1本発明の誤シ
制御方式は。
The above explanation is based on the second warp circuit Q in the receiving side device.
If the line number code is stored in step 8, but if the above code is not stored at all in the second note circuit, then after checking this note circuit, a control will be sent to indicate that the line number code was received normally. Create ag1 number and send it to the sending device. Then, upon detection of this control signal, the transmission lI
The M device finishes the transmitting operation, and at the reception level of 115kIiK, the electricity is turned off.As explained above, the error control system of the present invention is as follows.

1枚の原稿についての伝送終了後に、その原稿のSりた
ラインの画信号を再送し、ξの再送された正しいl1l
ii侶りを誤)ラインの[Il信号と置換して記録する
ようにしているので、常に原稿に忠実なε録画を得るこ
とができ、しかも、誤如訂正のために装する時間も比較
的短時間で済むと云う利点がある。
After the transmission of one document is completed, the image signal of the S line of that document is retransmitted, and the retransmitted correct l1l of ξ is
Since the recording is performed by replacing the [Il signal of the ii error) line with the [Il signal], it is possible to always obtain an ε recording that is faithful to the original, and the time required to correct the error is relatively short. The advantage is that it takes only a short time.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明のWAシ制御方式を実施したファクシ霞
ヲの送信1111装置の概略構成を示し、東え第2図は
[受信側装置の概略構成を示し、第6図はその伝送II
i号を模式的に示T図である。 (1)・−読取〉回路、(2)α4餞・・・メモ51路
、(3)・−符号化回路、 (4)−・・ライン番号コ
ーF4″¥成回路、 (5)1121・−ソデム回W6
−161(171= ラ(ン番号検m回路、 (73i
s1・・・制a[DJ路、 (131−・・復号化回路
、 as−e録回m、 am−i!!14シライン検出
回路〇
FIG. 1 shows a schematic configuration of a facsimile transmission 1111 device implementing the WA control method of the present invention, FIG. 2 shows a schematic configuration of a receiving device, and FIG.
It is a T diagram schematically showing No. i. (1) - Reading> circuit, (2) α4... Memo 51 circuit, (3) - Encoding circuit, (4) - Line number code F4'' circuit, (5) 1121. -Sodem episode W6
-161 (171 = line number detection m circuit, (73i
s1... control a [DJ path, (131-... decoding circuit, as-e recording m, am-i!!14 line detection circuit)

Claims (1)

【特許請求の範囲】[Claims] (1)  送信側では、原稿から得九画偏りを少なくと
も原稿1枚分相当の容量を持つメモリ手鐘に格納すると
共に、このメモ9手段から順次続出される各ラインの画
atにその各ラインな示すコード偏号を付加して受信聞
に送出Tると共に1面して1枚の原稿についての送信終
了後に受信側からの再送要求にようて指定されるライン
のtga号を前記メモリ手段から再度続出してそのツイ
ンな示すボード偏りと共に受信側に再送し。 !!!g1111では、到来した各ラインの四信号を原
稿1枚分相歯e容緻を持つ第1のメモリ手段に格納する
と角に、その各ラインのllii個号の誤〕を1ライン
ずつ検出し、誤)ラインのコード4m48t’182ノ
メモ夏手段lIc1[次格納し、而し?1枚の原稿につ
いての受信終了後に上ε第2)そり手段に格納されたコ
ード伽すを続出し送信側への再送要求として送出し、こ
の再送要求によシ送信側から再送された各m@号を上記
第1メモリ手段に再度書込むようにし九ファクvIヲの
Ii&シ制御方式。
(1) On the sending side, the nine-stroke bias obtained from the original is stored in a memory with a capacity equivalent to at least one original, and each line is stored in the image of each line sequentially output from the nine memo means. At the same time, after the transmission of one sheet of original is completed, the TGA code of the line specified in response to a retransmission request from the receiving side is sent from the memory means. Again, it is retransmitted to the receiver with its twin showing board bias. ! ! ! In g1111, when the four signals of each line that have arrived are stored in the first memory means having phase separation teeth for one original document, llii errors in each line are detected line by line at the corners, False) Line code 4m48t'182 note Summer means lIc1 [Next storage, then? After the reception of one document is completed, the code stored in the upper epsilon (second) sledding means is sent one after another as a retransmission request to the sending side, and in response to this retransmission request, each m The @ number is rewritten into the first memory means, and the Ii & shi control method of the 9th Faku vIwo.
JP56158936A 1981-10-05 1981-10-05 Error control system of facsimile Pending JPS5859669A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56158936A JPS5859669A (en) 1981-10-05 1981-10-05 Error control system of facsimile

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56158936A JPS5859669A (en) 1981-10-05 1981-10-05 Error control system of facsimile

Publications (1)

Publication Number Publication Date
JPS5859669A true JPS5859669A (en) 1983-04-08

Family

ID=15682572

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56158936A Pending JPS5859669A (en) 1981-10-05 1981-10-05 Error control system of facsimile

Country Status (1)

Country Link
JP (1) JPS5859669A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5309507A (en) * 1991-01-24 1994-05-03 Fuji Xerox Co., Ltd. Data communication apparatus for maintaining data integrity during an interruption request

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS529312A (en) * 1975-07-11 1977-01-24 Nippon Telegr & Teleph Corp <Ntt> Facsimile control method
JPS56116362A (en) * 1980-02-20 1981-09-12 Ricoh Co Ltd Error retransmission system in facsimile data transmission

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS529312A (en) * 1975-07-11 1977-01-24 Nippon Telegr & Teleph Corp <Ntt> Facsimile control method
JPS56116362A (en) * 1980-02-20 1981-09-12 Ricoh Co Ltd Error retransmission system in facsimile data transmission

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5309507A (en) * 1991-01-24 1994-05-03 Fuji Xerox Co., Ltd. Data communication apparatus for maintaining data integrity during an interruption request

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