JPS5859286U - Data compensation circuit for time division multiplex transmission system during power outage - Google Patents
Data compensation circuit for time division multiplex transmission system during power outageInfo
- Publication number
- JPS5859286U JPS5859286U JP15347281U JP15347281U JPS5859286U JP S5859286 U JPS5859286 U JP S5859286U JP 15347281 U JP15347281 U JP 15347281U JP 15347281 U JP15347281 U JP 15347281U JP S5859286 U JPS5859286 U JP S5859286U
- Authority
- JP
- Japan
- Prior art keywords
- power outage
- terminal device
- data compensation
- transmission system
- division multiplex
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Time-Division Multiplex Systems (AREA)
- Small-Scale Networks (AREA)
- Selective Calling Equipment (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の時分割多重伝送システムのブロック回路
図、第2図a ” cは同上の伝送信号波形図、第3図
は同上の端末器のブロック回路図、第4図は同上の端末
器の電源回路図、第5図は同上の中央制御監視装置のブ
ロック回路図、第6図は本考案の一実施例のブロック回
路図、第7図は同上のモニタ一端末器のブロック回路図
、第8図は同上の信号電圧ダウン検知回路の動作説明図
である。
1・・・中央制御監視装置、2・・・端末器、2a・・
・停電時データ補償の必要がない端末器、2b・・・停
電時データ補償の必要がある端末器、3,3a・・・信
号線、4・・・モニタ一端末器。Fig. 1 is a block circuit diagram of a conventional time division multiplex transmission system, Fig. 2 a `` c is a transmission signal waveform diagram of the above, Fig. 3 is a block circuit diagram of the same terminal, and Fig. 4 is a block circuit diagram of the same terminal. 5 is a block circuit diagram of the central control and monitoring device of the same device, FIG. 6 is a block circuit diagram of an embodiment of the present invention, and FIG. 7 is a block circuit diagram of the monitor-terminal device of the same device. , FIG. 8 is an explanatory diagram of the operation of the signal voltage down detection circuit as described above. 1... Central control monitoring device, 2... Terminal device, 2a...
・Terminal device that does not require data compensation during power outage, 2b...Terminal device that requires data compensation during power outage, 3, 3a... Signal line, 4... Monitor-terminal device.
Claims (1)
中央制御監視装置より任意の端末器をサイクリックに呼
出しデータの送受信を行なうとともに各端末器の電源を
中央監視制御装置より供給する如くして成る時分割多重
伝送システムにおいて、モニタ一端末器を設けて停電時
データ補償の必要がない端末器を前記モニタ一端末器の
後段に接続するとともに停電時データ補償の必要がある
端末器を前記モニタ一端末器の前段に接続し、電源電圧
が低下したとき停電時データ補償の必要がない端末器を
接続する信号線を遮断するとともに停電時データ補償の
必要がある端末器のデータ補償をする如くして成る時分
割多重伝送システムの停電時データ補償回路。Connect the central control monitoring device and multiple terminal devices with signal lines,
In a time-division multiplex transmission system in which a central control monitoring device cyclically calls any terminal device and transmits and receives data, and the power supply to each terminal device is supplied from the central monitoring control device, one monitor and one terminal device are provided. A terminal device that does not require data compensation in the event of a power outage is connected to the rear stage of the monitor-terminal device, and a terminal device that requires data compensation in the event of a power outage is connected to the front stage of the monitor-terminal device, so that the power supply voltage drops. A power outage data compensation circuit for a time division multiplex transmission system which disconnects signal lines connecting terminal devices that do not require data compensation in the event of a power outage and also compensates for data in terminal devices that require data compensation in the event of a power outage. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15347281U JPS5859286U (en) | 1981-10-15 | 1981-10-15 | Data compensation circuit for time division multiplex transmission system during power outage |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15347281U JPS5859286U (en) | 1981-10-15 | 1981-10-15 | Data compensation circuit for time division multiplex transmission system during power outage |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5859286U true JPS5859286U (en) | 1983-04-21 |
Family
ID=29946085
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15347281U Pending JPS5859286U (en) | 1981-10-15 | 1981-10-15 | Data compensation circuit for time division multiplex transmission system during power outage |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5859286U (en) |
-
1981
- 1981-10-15 JP JP15347281U patent/JPS5859286U/en active Pending
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