JPS5859236U - Analog to digital converter - Google Patents
Analog to digital converterInfo
- Publication number
- JPS5859236U JPS5859236U JP15319981U JP15319981U JPS5859236U JP S5859236 U JPS5859236 U JP S5859236U JP 15319981 U JP15319981 U JP 15319981U JP 15319981 U JP15319981 U JP 15319981U JP S5859236 U JPS5859236 U JP S5859236U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- capacitor
- analog
- digital converter
- time constant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案になるアナログ・デジタル変換器の1実
施例の回路図、第2図A−Gは第1図示の回路の各部の
信号波形図、第3図は第1図示のコンデンサC2の放電
時間と入力レベルとの関係を示す図である。
1.5・・・・・・入力端子、2. 3. 4・・・・
・・演算増幅器、6・・・・・・コンピュータ、7・・
・・・・出力端子、C1゜C2・・・・・・コンデンサ
、D□〜D4・・・・・・ダイオード、Q1〜Q、・・
・・・・FET、 R□〜R□2・・・・・・抵抗。Fig. 1 is a circuit diagram of one embodiment of the analog-to-digital converter according to the present invention, Fig. 2 A to G are signal waveform diagrams of various parts of the circuit shown in Fig. 1, and Fig. 3 is a capacitor C2 shown in Fig. 1. FIG. 3 is a diagram showing the relationship between discharge time and input level. 1.5...Input terminal, 2. 3. 4...
...Operation amplifier, 6...Computer, 7...
...output terminal, C1゜C2...capacitor, D□~D4...diode, Q1~Q,...
...FET, R□~R□2...Resistance.
Claims (1)
ンサを該整流した信号のピーク電圧まで充電し、該コン
デンサの両端電圧を第1及び第2の基準電圧と比較しつ
つ該両端電圧の絶対値が該第2の基準電圧未満のとき該
コンデンサを第1の時定数で放電し、該第2の基準電圧
以上のとき該コンデンサを該第2の基準電圧まで第2の
時定数で放電した後該第1の時定数で放電し、該放電の
開始時より該両端電圧が該第1の基準電圧となるまでの
時間を計数して該被測定交流信号のピーク電圧の対数の
デジ汐ル値を得るよう構成したアナログ・デジタル変換
器。Rectify the AC signal to be measured, charge a capacitor with the rectified signal to the peak voltage of the rectified signal, and compare the voltage across the capacitor with first and second reference voltages, while calculating the absolute value of the voltage across the capacitor. is less than the second reference voltage, the capacitor is discharged with a first time constant, and when the voltage is greater than or equal to the second reference voltage, the capacitor is discharged with a second time constant to the second reference voltage. Discharge with the first time constant, count the time from the start of the discharge until the voltage at both ends reaches the first reference voltage, and calculate the digital tide value of the logarithm of the peak voltage of the AC signal under measurement. An analog-to-digital converter configured to obtain
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15319981U JPS5859236U (en) | 1981-10-15 | 1981-10-15 | Analog to digital converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15319981U JPS5859236U (en) | 1981-10-15 | 1981-10-15 | Analog to digital converter |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5859236U true JPS5859236U (en) | 1983-04-21 |
Family
ID=29945823
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15319981U Pending JPS5859236U (en) | 1981-10-15 | 1981-10-15 | Analog to digital converter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5859236U (en) |
-
1981
- 1981-10-15 JP JP15319981U patent/JPS5859236U/en active Pending
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