JPS5856275A - n次元配列デ−タのアクセス制御方式 - Google Patents

n次元配列デ−タのアクセス制御方式

Info

Publication number
JPS5856275A
JPS5856275A JP56153282A JP15328281A JPS5856275A JP S5856275 A JPS5856275 A JP S5856275A JP 56153282 A JP56153282 A JP 56153282A JP 15328281 A JP15328281 A JP 15328281A JP S5856275 A JPS5856275 A JP S5856275A
Authority
JP
Japan
Prior art keywords
address
bits
logical
line
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56153282A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6333183B2 (cg-RX-API-DMAC7.html
Inventor
Takeshi Nakayama
毅 中山
Tatsuo Kimura
辰雄 木村
Koyo Nakagawa
幸洋 中川
Takeshi Murata
雄志 村田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56153282A priority Critical patent/JPS5856275A/ja
Publication of JPS5856275A publication Critical patent/JPS5856275A/ja
Publication of JPS6333183B2 publication Critical patent/JPS6333183B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP56153282A 1981-09-28 1981-09-28 n次元配列デ−タのアクセス制御方式 Granted JPS5856275A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56153282A JPS5856275A (ja) 1981-09-28 1981-09-28 n次元配列デ−タのアクセス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56153282A JPS5856275A (ja) 1981-09-28 1981-09-28 n次元配列デ−タのアクセス制御方式

Publications (2)

Publication Number Publication Date
JPS5856275A true JPS5856275A (ja) 1983-04-02
JPS6333183B2 JPS6333183B2 (cg-RX-API-DMAC7.html) 1988-07-04

Family

ID=15559057

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56153282A Granted JPS5856275A (ja) 1981-09-28 1981-09-28 n次元配列デ−タのアクセス制御方式

Country Status (1)

Country Link
JP (1) JPS5856275A (cg-RX-API-DMAC7.html)

Also Published As

Publication number Publication date
JPS6333183B2 (cg-RX-API-DMAC7.html) 1988-07-04

Similar Documents

Publication Publication Date Title
US5410727A (en) Input/output system for a massively parallel, single instruction, multiple data (SIMD) computer providing for the simultaneous transfer of data between a host computer input/output system and all SIMD memory devices
US3979726A (en) Apparatus for selectively clearing a cache store in a processor having segmentation and paging
US4654781A (en) Byte addressable memory for variable length instructions and data
US3786427A (en) Dynamic address translation reversed
US5010516A (en) Content addressable memory
US5594919A (en) Method and system for reordering bytes in a data stream
EP0007001B1 (en) Constrained paging data processing apparatus
US4285040A (en) Dual mode virtual-to-real address translation mechanism
US3537074A (en) Parallel operating array computer
KR100319768B1 (ko) 영상화및그래픽처리시스템내에서의다차원주소발생방법
US4799149A (en) Hybrid associative memory composed of a non-associative basic storage and an associative surface, as well as method for searching and sorting data stored in such a hybrid associative memory
US4434502A (en) Memory system handling a plurality of bits as a unit to be processed
US5187783A (en) Controller for direct memory access
JPH06103161A (ja) データを組合せるためのデータ・フィールド合成器
JPH04315373A (ja) 圧縮画像データ復号装置
JPS6325672B2 (cg-RX-API-DMAC7.html)
US4254476A (en) Associative processor
US5659755A (en) Method and system in a data processing system for efficiently compressing data using a sorting network
JPS648383B2 (cg-RX-API-DMAC7.html)
US4376974A (en) Associative memory system
US4327407A (en) Data driven processor
US4852059A (en) Content addressable memory
JPS5856275A (ja) n次元配列デ−タのアクセス制御方式
EP0321493A4 (en) A content-addressable memory system
US3631401A (en) Direct function data processor