JPS5854460A - Electronic computer system for control - Google Patents

Electronic computer system for control

Info

Publication number
JPS5854460A
JPS5854460A JP15137081A JP15137081A JPS5854460A JP S5854460 A JPS5854460 A JP S5854460A JP 15137081 A JP15137081 A JP 15137081A JP 15137081 A JP15137081 A JP 15137081A JP S5854460 A JPS5854460 A JP S5854460A
Authority
JP
Japan
Prior art keywords
storage device
auxiliary storage
bus
control
static
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15137081A
Other languages
Japanese (ja)
Inventor
Toshikatsu Konda
根田 利勝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15137081A priority Critical patent/JPS5854460A/en
Publication of JPS5854460A publication Critical patent/JPS5854460A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/445Program loading or initiating

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Control By Computers (AREA)

Abstract

PURPOSE:To provide the titled system with a static auxiliary storage device to transfer a program or data from an ordinary auxiliary storage device to the static auxiliary storage device at the initialization of the computer and access the statis auxiliary storage device at the execution of operation. CONSTITUTION:An arithmetic controller 1 and a main storage device 2 are connected each other through a high speed bus 11 and a static auxiliary storage device 21 consisting of a semiconductor bulk memory is connected to the bus 11 through an interface 20. In addition an ordinary auxiliary storage device 23 is also conneted to the bus 11 through an iterface 22. The auxiliary storage device 23 is constituted by a magnetic drum unit or a magnetic disc unit. On the ther hand, an I/O bus 10 is connected to the aritmetic controller 1. A peripheral device 9 and a process I/O unit 4 are connected to the I/O bus 10 through an I/O interface 8 and a process I/O interface 3 respectively and the process I/O unit 4 is connected to a power generation plant 7 through a detector 5 and an actuator 6.

Description

【発明の詳細な説明】 本@嘴は*mmブラントどのプラントプロセスの監視1
111制御に用いる制御用電子針鼻鎗システムに関する
[Detailed description of the invention] This @beak is *mm blunt which plant process monitoring 1
The present invention relates to a control electronic needle/syringe system used for 111 control.

エレクトロニクス技術の進歩にともなって電子計算機ハ
ードウェアの性能は向上し、その利用技術についても長
足の進歩がある。すなわち、制御用電子針JII磯7ス
テムにりいても、その性能の向上によって、プラント1
gセスの殖祝制岬の適用llsは拡大の一慮をたどって
いる。これら制御用電子針算慎の処虐社能向上は、主に
演算制御装置や主記憶装置におかれ、それらの性能向上
には目覚しいものがるる。
With advances in electronics technology, the performance of computer hardware has improved, and the technology for using it has also made rapid progress. In other words, even if the control electronic needle JII Iso 7 stem is used, the improved performance of the plant 1
The application of the cape to the breeding system of G.S. is being considered for expansion. Improvements in the performance of these electronic control systems have been made primarily in the arithmetic and control units and main storage devices, and the improvements in performance have been remarkable.

しかしながら、これらの演5iaIl麺置中主記憶装置
などの本体(%Aわゆるメインフレーム)に比して、補
助記l1mmの性能向上は大横に造れている。その生な
理由は補助記−t7&瞳では大容量の記憶容置が必要な
ことと、制御用電子計算機にあっては高速度かつ4II
鵬性のものが必要なためで6つ九〇 制御用鴫子針算慎システムでは、通常、補助記憶装置と
して磁気ドラムないしは磁気ドラムディスクを使用して
iるが、これらはいずれも回転機fIIKよるもので、
データの絖み出し書自込みのヘッドと回転数からアクセ
スの時間社定ま〕、現在通113000 rp・m〜3
6 G Orpmのもので、19mm〜70m5のアク
セス時間がかかつている。これを短−するには、回転数
を上げるか、ヘッドの数を増すなどの手段も考えられる
が、いずれもかな〕限界に近い。tたその他には効果的
な手段もなく。
However, compared to the main body (%A so-called main frame) such as the main storage device of these machines, the performance of the auxiliary memory has been greatly improved. The main reason for this is that the t7 & pupil requires a large storage capacity, and the control computer requires high speed and 4II
This is because the control system usually uses a magnetic drum or magnetic drum disk as an auxiliary storage device, but both of these are based on the rotating machine fIIK. Something,
The access time is determined by the self-loading head and rotation speed of the data, currently 113,000 rp・m ~ 3
6G Orpm, the access time is 19mm to 70m5. In order to shorten this time, it is possible to consider increasing the number of rotations or increasing the number of heads, but both are close to their limits. There are no other effective means.

−御用電子計算徐システムの性能向上を図る上て大きな
問題となシつつある。
- This is becoming a major problem in improving the performance of commercial electronic computing systems.

したがって1本発明の目的社高速度でかつ大容量の静止
形補助記憶装置を設け、計算機の初期化時に通常の補助
記憶装置からこの静止形補助記憶装置にプログラムおよ
びデータを転送し、演算実行時には静止形補助記憶装置
をアクセスするようにした制御用電子計算機システムを
得るにある。
Therefore, one purpose of the present invention is to provide a high-speed and large-capacity static auxiliary storage device, to transfer programs and data from a normal auxiliary storage device to this static auxiliary storage device when initializing a computer, and to transfer programs and data to this static auxiliary storage device when an operation is executed. An object of the present invention is to obtain a control electronic computer system which accesses a static auxiliary storage device.

以下、図面に基づく一実焉例を参照して本発明を説明す
る。纂1図は本発明の一一用゛鑞子針算機システムのブ
ロック構成図である。演算−一装置1と主記憶装置2と
は高速バス11で互いに接続され、高速バス11KFi
靜止形補助記憶懺置21がインタ7エイス20を介して
接続される。この静止形補助記憶装置21は牛尋体パル
タメモリ装置で構成される。iた高速パス11には通常
の補助記憶装置23がインタ7エイス22を介して接続
される。この補助紐IJi装置23扛磁気ドンム装置あ
るいは一気ディスク4&置で4成される。
Hereinafter, the present invention will be explained with reference to a practical example based on the drawings. FIG. 1 is a block diagram of the 11-use chisel needle counter system of the present invention. The arithmetic device 1 and the main memory device 2 are connected to each other by a high-speed bus 11, and the high-speed bus 11KFi
A static auxiliary storage cabinet 21 is connected via an interface 20. This static auxiliary storage device 21 is constituted by a gypsum body parta memory device. A normal auxiliary storage device 23 is connected to the high-speed path 11 via an interface 22. This auxiliary string IJi device 23 is made up of 4 magnetic domme devices or a disk 4 & placed at once.

一方、演算制御装置lには入出力バス1Gが接続され、
この入出力バス1oには入出力インク7エイス8を介し
て周辺装置9が、またプロセス入出力インタフェイスを
介してプロセス入出力装置4が接続され、検出a5およ
びアクチェエータ6を介して発−プラント7に接続され
ている。
On the other hand, an input/output bus 1G is connected to the arithmetic control unit l,
A peripheral device 9 is connected to this input/output bus 1o via an input/output ink 7/8, and a process input/output device 4 is connected via a process input/output interface. 7 is connected.

こζで、制御用鑞子計算機システムで実行すべ11機能
を2.実温するためのソフトウェア(プログラム、デー
タ等)は膨大なもので、常時線補助記憶装置23に記憶
されてiるのが晋通でるる。本発@においても計3I嶺
始動前には針゛算機ソフトウェブは補助記憶装置23に
装荷されていて、計算儀始曽とともに静止形補助記憶装
置1121に転送されるようになっている。以下縞2図
に従って1本発明の計算機システムの動作をM明する。
With this ζ, the 11 functions to be executed by the control forceps computer system are summarized in 2. The software (programs, data, etc.) for measuring the actual temperature is enormous, and is always stored in the line auxiliary storage device 23. Also in the present invention, the needle computer software web is loaded in the auxiliary storage device 23 before the start of the total 3 I-reduction, and is transferred to the static auxiliary storage device 1121 along with the calculation software web. The operation of the computer system of the present invention will be explained below according to the two striped diagrams.

計算機が始動すると0)、補助釦tm装置23から靜止
形補助記ai装置21にソフトウェア(グログラム、デ
ータ等)が転送される(→。一方、必賛な−のについて
は、補助記憶装置23から主記憶装置2へ転送され(ハ
)、これは主記憶装置2に予め常駐するソフトウェアと
する。次にプログラム手続部分の初期化、データのプリ
セットなどの初期化を行なうに)。
When the computer starts (0), software (programs, data, etc.) is transferred from the auxiliary button TM device 23 to the static auxiliary memory AI device 21 (→.On the other hand, the essential - is transferred from the auxiliary storage device 23 It is transferred to the main storage device 2 (c), and this is software that resides in the main storage device 2 in advance.Next, initialization of the program procedure part, data presetting, etc. is performed).

これ以降は計算機システムの基本プログラムであるオペ
レーテイングシスデムが実行の必I!あるグーグラムを
サーチし、順次実行に移る(ホ)。実行要求のめったプ
ログ2ム紘主記憶装置2上に転送されてきているか否か
がチェックされ(へ)、主記憶装置2上にあればプログ
ラムの実行關始となp(阻プロゲラ^の実行終了まで行
なう■。その螢、再びステップ@にもどシ、次のプログ
ラムの要求をチェックし、以下同様の動作を〈夛返す。
From this point on, the operating system, which is the basic program of the computer system, must be executed! Search for a certain Googlegram and start executing it one by one (E). It is checked whether the program 2 that has been requested to be executed has been transferred to the main storage device 2, and if it is on the main storage device 2, the execution of the program starts. Continue until the end■.The firefly then returns to step @, checks the request of the next program, and repeats the same operation.

とζろで、ステップ(へ)でプ鑓グラ^が主記憶装置2
上にな一場脅には、主記憶装置2ヘグログクム、データ
の転送要求をする(V)。このときの転送K11Iする
時間関係を第3図を基に説明する。図中11.1mは、
演算制御装置lからの起動信号を受けて補助記憶装置2
3.静止形補助記憶装置21が動作−始する時間でるる
。またbs、baはアクセスタイムで69、補助記tj
1装置23ではドラムやディスクの回転遮板てほぼ定ま
るのて* bl u i Orn s〜7Gm@程度で
るる。これに対し、静止形補助記憶装置24では回転待
ちがないので、baは10〜20j11と約1000倍
Sm高速である。CI、C2はデータの転送に要する時
間でるる。以上は1つのアクセスについて示したが、制
御用電子計算機システムでは、このアクセスが頻繁に行
なわれることになる。
and ζro, in step (to) the programmer is main memory 2
As a threat, the main storage device 2 is requested to transfer data (V). The time relationship for transfer K11I at this time will be explained based on FIG. 3. In the figure, 11.1m is
The auxiliary storage device 2 receives the activation signal from the arithmetic and control unit l.
3. The time has come for the static auxiliary storage device 21 to start operating. Also, bs, ba are 69 in access time, supplementary note tj
1 device 23, it is approximately determined by the rotating shield of the drum or disk. On the other hand, since there is no rotation wait in the static auxiliary storage device 24, ba is 10 to 20j11, which is about 1000 times Sm faster. CI and C2 take the time required to transfer data. Although one access has been described above, in a control computer system, this access is frequently performed.

以上述べたように、画素に補助記憶装置をアクセスす°
るような制御用′鴫子計算磯システムに6って、アクセ
ス時間が非常に短かい静止形補助記憶装置を採用するこ
とによシ、大幅な性能向上を図ることかで龜る。
As mentioned above, accessing the auxiliary storage device for pixels
By adopting a static auxiliary storage device with a very short access time for such a control system, it is possible to significantly improve performance.

【図面の簡単な説明】[Brief explanation of the drawing]

41図は本発明の制御用鴫子計算機システムの一成図、
第2111は本発明の電子計算機システムの動作を示す
フローチャート、第311aその性能を示すタイムチャ
ートである。 1・・・演算制御装置  2・・・主記憶装置3.8・
・・インタフェイス 4・・・プIセヌ入出力装置  5・・・検出器6・・
・アクチェエータ    7・・・プラント9・・・周
辺装置    10・・・入出力I(ス11・・・高遍
バス    21・・・補助記憶装置23・・・静止形
補助記憶装置 (7317)代理人弁理士 則 近 慮 佑(#1か1
名)第1図 第2図 第3図
Figure 41 is a diagram of the control Shizuko computer system of the present invention.
No. 2111 is a flowchart showing the operation of the computer system of the present invention, and No. 311a is a time chart showing its performance. 1... Arithmetic control unit 2... Main storage device 3.8.
...Interface 4...PuI Senu input/output device 5...Detector 6...
・Actuator 7... Plant 9... Peripheral device 10... Input/output I (S11... High-speed bus 21... Auxiliary storage device 23... Stationary auxiliary storage device (7317) agent Patent Attorney Noriyuki Chika (#1 or 1
Figure 1 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】 プラントプロセス、セ2t、プ四セスの出力値置、演算
制御装置、主記憶装置、補助記tgt績筐。 周辺装置とから成る制御用電子計AflAシステムに2
いて、静止層補助記憶装置を設け、電子計算機初期化時
に前記補助記憶装置よ少、前記靜止履纏助記u1装置に
ブーグラムおよびデータを転送し。 以、後プログラム実行時に前記靜止血補助記憶装置をア
クセスすることによ)、高速度の制御用ブーグラムの実
行を可能とした制御用電子針算嶺システム。
[Claims] Plant process, output value position of plant process, arithmetic and control unit, main memory, auxiliary record. A control electronic meter AflA system consisting of peripheral devices and 2
A static layer auxiliary storage device is provided, and when the electronic computer is initialized, a program and data are transferred to the static layer auxiliary storage device U1. Hereinafter, by accessing the silent hemostasis auxiliary storage device during subsequent program execution), the control electronic needle system has made it possible to execute high-speed control boograms.
JP15137081A 1981-09-26 1981-09-26 Electronic computer system for control Pending JPS5854460A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15137081A JPS5854460A (en) 1981-09-26 1981-09-26 Electronic computer system for control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15137081A JPS5854460A (en) 1981-09-26 1981-09-26 Electronic computer system for control

Publications (1)

Publication Number Publication Date
JPS5854460A true JPS5854460A (en) 1983-03-31

Family

ID=15517064

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15137081A Pending JPS5854460A (en) 1981-09-26 1981-09-26 Electronic computer system for control

Country Status (1)

Country Link
JP (1) JPS5854460A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229111A (en) * 1984-04-26 1985-11-14 Fanuc Ltd Numerical control system
JPS62254208A (en) * 1986-04-28 1987-11-06 Fuatsuku Kk Initialization system for pmc parameter

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4830168A (en) * 1971-08-23 1973-04-20
JPS4952935A (en) * 1972-07-03 1974-05-23

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4830168A (en) * 1971-08-23 1973-04-20
JPS4952935A (en) * 1972-07-03 1974-05-23

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229111A (en) * 1984-04-26 1985-11-14 Fanuc Ltd Numerical control system
JPS62254208A (en) * 1986-04-28 1987-11-06 Fuatsuku Kk Initialization system for pmc parameter

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