JPS5853803B2 - frequency synthesizer - Google Patents
frequency synthesizerInfo
- Publication number
- JPS5853803B2 JPS5853803B2 JP53156911A JP15691178A JPS5853803B2 JP S5853803 B2 JPS5853803 B2 JP S5853803B2 JP 53156911 A JP53156911 A JP 53156911A JP 15691178 A JP15691178 A JP 15691178A JP S5853803 B2 JPS5853803 B2 JP S5853803B2
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- output
- oscillator
- variable frequency
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000010586 diagram Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
【発明の詳細な説明】
所望の周波数の信号を得るために、可変周波数発振器の
出力を分周してその分周された出力と基準発振器の出力
とを位相または周波数比較器に加え、この比較器の出力
で前記可変周波数発振器の周波数制御を行うと共に必要
に応じて上記発振器の出力に局部発振器の出力を混合し
て周波数変換を行う装置が用いられる。DETAILED DESCRIPTION OF THE INVENTION In order to obtain a signal of a desired frequency, the output of a variable frequency oscillator is divided and the divided output and the output of a reference oscillator are applied to a phase or frequency comparator and the comparison is performed. A device is used that controls the frequency of the variable frequency oscillator using the output of the oscillator and, if necessary, mixes the output of the oscillator with the output of a local oscillator to perform frequency conversion.
このような装置は、分周率の変換によって容易に所望の
周波数を得ることができると共にその周波数のデジタル
表示も容易である。In such a device, a desired frequency can be easily obtained by converting the frequency division ratio, and the frequency can also be easily displayed digitally.
しかじ分周率をＮとすると、前記可変周波数発振器の出
力周波数が基準発振器の周波数ｆｒのＮ倍となるために
単側帯波雑音が増大する。If the frequency division ratio is N, the output frequency of the variable frequency oscillator will be N times the frequency fr of the reference oscillator, so that single sideband noise will increase.
すなわち基準発振器の単側帯波雑音をΦｒ、分周器のジ
ッタ、位相または周波数比較器、増幅器等の雑音をΦｎ
とすると可変周波数発振器の出力に含まれる単側帯波雑
音は（Φｒ＋２０１ｏｇＮ＋Φｎ）となるもので、分周
率Ｎの増大に伴って雑音も増大する欠点がある。In other words, the single sideband noise of the reference oscillator is Φr, and the noise of the frequency divider jitter, phase or frequency comparator, amplifier, etc. is Φn.
Then, the single sideband noise included in the output of the variable frequency oscillator is (Φr+201ogN+Φn), which has the disadvantage that the noise increases as the frequency division ratio N increases.
従って本発明はこの欠点を軽減しようとするものである
。The present invention therefore seeks to alleviate this drawback.
図面は本発明実施例のブロック構成図で、電圧制御可変
周波数発振器Ｏｖおよび可変周波数局部発振器０１の出
力を混合器Ｍに加えて、それらの差の周波数の出力を取
出すようにしである。The figure is a block diagram of an embodiment of the present invention, in which the outputs of a voltage-controlled variable frequency oscillator Ov and a variable frequency local oscillator 01 are applied to a mixer M, and an output of the difference frequency between them is taken out.
この電圧制御可変周波数発振器Ｏｖの出力を、例えばフ
リップフロップ回路を縦続した分周器Ｎに加えてＮ分の
１の周波数となし、該分周器の出力と基準発振器Ｏｓの
出力とを位相または周波数比較器Ｐに加えである。For example, the output of this voltage-controlled variable frequency oscillator Ov is added to a frequency divider N in which flip-flop circuits are connected in series to obtain a frequency of 1/N, and the output of the frequency divider and the output of the reference oscillator Os are set to have a phase difference or In addition to the frequency comparator P.
その比較器Ｐの出力を低域ろ波回路を具備した増幅器Ａ
１で増幅して、前記電圧制御可変周波数発振器Ｏｖに周
波数制御入力として加える帰還回路を設けである。The output of the comparator P is sent to an amplifier A equipped with a low-pass filter circuit.
A feedback circuit is provided which amplifies the frequency by 1 and applies it as a frequency control input to the voltage controlled variable frequency oscillator Ov.
すなわち増幅器Ａ１は高周波成分を遮断し低周波成分を
増幅して発振器Ｏｖに加えるもので、基準発振器Ｏｒの
出力周波数をｆｒとすると上記発振器Ｏｖの出力周波数
はＮｆｒ となり、局部発振器０１の出力周波数を１
１とすると混合器Ｍから取出される出力信号の周波数ｆ
ｍは（Ｎｆｒ−１１）で与えられる。That is, the amplifier A1 blocks high frequency components, amplifies low frequency components, and applies them to the oscillator Ov.If the output frequency of the reference oscillator Or is fr, the output frequency of the oscillator Ov is Nfr, and the output frequency of the local oscillator 01 is 1
1, the frequency f of the output signal taken out from the mixer M
m is given by (Nfr-11).
従って分周率Ｎの調整によって出力信号の周波数を任意
に設定し得ると共に分局器Ｎの各段の出力信号を用いて
その周波数のデジタル表示を容易に行うことができる。Therefore, by adjusting the frequency division ratio N, the frequency of the output signal can be arbitrarily set, and the output signal of each stage of the divider N can be used to easily display the frequency digitally.
このような周波数合成装置において、本発明は更に前記
増幅器Ａ１の出力を微分回路りで微分すると共に増幅器
Ａ２で増幅して局部発振器ＯＨＣその周波数制御入力と
して加える制御回路を設けたものである。In such a frequency synthesizer, the present invention further includes a control circuit that differentiates the output of the amplifier A1 using a differentiating circuit, amplifies the output using an amplifier A2, and applies the result as a frequency control input to the local oscillator OHC.
従って、増幅器Ａ１の出力電圧に周波数の高い雑音成分
が含まれていると、この雑音成分によって発振器Ｏｖの
出力周波数に変動を生ずる。Therefore, if the output voltage of the amplifier A1 contains a high frequency noise component, this noise component causes a fluctuation in the output frequency of the oscillator Ov.
しかし増幅器Ａ１の出力は、同時に微分回路りおよび増
幅器Ａ２を介して局部発振器０１に周波数制御入力とし
て加わるから、増幅器Ａ１の出力に含まれる高周波数の
雑音成分が微分回路りで抽出され、更に増幅器Ａ２で適
当な振幅に調整されて局部発振器０１に加わり、局部発
振周波数を変化させる。However, since the output of amplifier A1 is simultaneously applied as a frequency control input to local oscillator 01 via the differentiating circuit and amplifier A2, the high frequency noise component contained in the output of amplifier A1 is extracted by the differentiating circuit, and It is adjusted to an appropriate amplitude at A2 and applied to the local oscillator 01, changing the local oscillation frequency.
すなわち発振器Ｏｕの出力周波数Ｎｆｔ が制御入力の
雑音成分によって例えば十Ｎだけ変動したものとすると
、同時に局部発振器０１の周波数ｆ１も＋Ａｆだけ変化
するように増幅器Ａ２の利得および出力極性を調整して
おくことにより、混合器Ｍから得られる出力信号の周波
数ｆｍはｆｍ＝（Ｎｆｒ＋Ａｆ）−（ｆ１＋Ａｆ）＝Ｎ
ｆ「−ｆＩとなる。In other words, if the output frequency Nft of the oscillator Ou changes by, for example, 10N due to the noise component of the control input, the gain and output polarity of the amplifier A2 are adjusted so that the frequency f1 of the local oscillator 01 changes by +Af at the same time. Therefore, the frequency fm of the output signal obtained from the mixer M is fm=(Nfr+Af)−(f1+Af)=N
f “-fI.
すなわち増幅器Ａ１の出力に含まれる雑音成分によって
出力信号の周波数ｆｍが変動することを防止し得る。That is, it is possible to prevent the frequency fm of the output signal from varying due to noise components included in the output of the amplifier A1.
このように本発明の装置は、分周器を含んだ位相または
周波数固定帰還回路を具備する周波数合成装置において
、位相または周波数比較器の出力に含まれる雑音成分に
よって出力信号の周波数が変動することを有効に防止し
得るもので、−実験例によると出力信号の単側帯波雑音
を１０ｄｂ以上軽減することができた。As described above, the device of the present invention is a frequency synthesizer equipped with a fixed phase or frequency feedback circuit including a frequency divider, in which the frequency of the output signal fluctuates due to the noise component included in the output of the phase or frequency comparator. -According to experimental examples, the single sideband noise of the output signal could be reduced by 10 db or more.
この値は分局器Ｎの分周率を小さくして、出力信号の周
波数を約３分の１にした場合と同程度の雑音であって、
本発明が極めて有効であることを実証している。This value is the same level of noise as when the frequency division ratio of the divider N is reduced and the frequency of the output signal is reduced to about one-third.
This demonstrates that the present invention is extremely effective.
しかも局部発振器を用いるから、広帯域性を有する。Furthermore, since a local oscillator is used, it has wideband performance.
かつ単側帯波雑音を軽減されて増幅器Ａ１の帯域幅を充
分広くすることができるから、分周率の変換による周波
数切換を高速度で行い得る。Furthermore, since the single sideband noise is reduced and the bandwidth of the amplifier A1 can be made sufficiently wide, frequency switching by converting the frequency division factor can be performed at high speed.
図面は本発明実施例のブロック構成図である。
なお図において、Ｏｖは可変周波数発振器、Ｍは混合器
、０１は可変周波数局部発振器、Ｎは分周器、Ｐは位相
または周波数比較器、Ｏは基準発振器、ＡＩ、Ａ２は増
幅器、Ｄは微分器である。The drawing is a block diagram of an embodiment of the present invention. In the figure, Ov is a variable frequency oscillator, M is a mixer, 01 is a variable frequency local oscillator, N is a frequency divider, P is a phase or frequency comparator, O is a reference oscillator, AI and A2 are amplifiers, and D is a differential. It is a vessel.
Claims (1)
器の出力を加えられてそれらの出力周波数の和または差
の周波数の出力を送出する混合器と、前記可変周波数発
振器の出力を分周して基準発振器の出力と位相または周
波数を比較しその比較器の出力信号を該可変周波数発振
器の周波数制御入力とする帰還回路とよりなり、かつ微
分回路並びに増幅器を介して上記制御入力を前記可変周
波数局部発振器に周波数制御人力として加える制御回路
を設けたことを特徴とする周波数合成装置。1. A mixer that adds the output of a variable frequency oscillator and the output of a variable frequency local oscillator and sends out an output at the sum or difference of their output frequencies, and a mixer that divides the output of the variable frequency oscillator and outputs the output of the reference oscillator. a feedback circuit that compares the output with the phase or frequency and uses the output signal of the comparator as a frequency control input of the variable frequency oscillator; A frequency synthesizer characterized by being provided with a control circuit for adding human control power.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53156911A JPS5853803B2 (en) | 1978-12-21 | 1978-12-21 | frequency synthesizer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53156911A JPS5853803B2 (en) | 1978-12-21 | 1978-12-21 | frequency synthesizer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5585147A JPS5585147A (en) | 1980-06-26 |
| JPS5853803B2 true JPS5853803B2 (en) | 1983-12-01 |
Family
ID=15638069
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP53156911A Expired JPS5853803B2 (en) | 1978-12-21 | 1978-12-21 | frequency synthesizer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5853803B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5994104U (en) * | 1982-12-15 | 1984-06-26 | スズキ株式会社 | engine oil pan |
-
1978
- 1978-12-21 JP JP53156911A patent/JPS5853803B2/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5994104U (en) * | 1982-12-15 | 1984-06-26 | スズキ株式会社 | engine oil pan |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5585147A (en) | 1980-06-26 |
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