JPS5852865A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS5852865A JPS5852865A JP15105881A JP15105881A JPS5852865A JP S5852865 A JPS5852865 A JP S5852865A JP 15105881 A JP15105881 A JP 15105881A JP 15105881 A JP15105881 A JP 15105881A JP S5852865 A JPS5852865 A JP S5852865A
- Authority
- JP
- Japan
- Prior art keywords
- temperature
- resistor
- resistance
- circuit
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05D—SYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES
- G05D23/00—Control of temperature
- G05D23/19—Control of temperature characterised by the use of electric means
- G05D23/20—Control of temperature characterised by the use of electric means with sensing elements having variation of electric or magnetic properties with change of temperature
- G05D23/24—Control of temperature characterised by the use of electric means with sensing elements having variation of electric or magnetic properties with change of temperature the sensing element having a resistance varying with temperature, e.g. a thermistor
- G05D23/2401—Control of temperature characterised by the use of electric means with sensing elements having variation of electric or magnetic properties with change of temperature the sensing element having a resistance varying with temperature, e.g. a thermistor using a heating element as a sensing element
Abstract
Description
【発明の詳細な説明】
本発明は、抵抗温度特性の影響を受ける回路を含む半導
体集積回路装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor integrated circuit device including a circuit affected by resistance temperature characteristics.
一般の半導体集積回路装置においては、ベース拡散領域
を用いた拡散抵抗で抵抗素子を構成しており、その抵抗
温度特性は概略1000〜2000p p m /’I
Gであるので、その抵抗値の温tL、による変化の影響
が出ないような回路設計をするのが普通である。しかし
、抵抗値自体を利用する回路では。In a general semiconductor integrated circuit device, a resistance element is constructed of a diffused resistor using a base diffusion region, and its resistance temperature characteristic is approximately 1000 to 2000 p p m /'I
G, it is common to design a circuit such that the resistance value is not affected by changes due to temperature tL. However, in a circuit that uses the resistance value itself.
どうしてもff1度特性に基〈抵抗値の変化を打ち消す
ようなe計はできない。例えば、#!延待時間抵抗と静
電容重の値で定する遅延回路などがそうである。第1及
び第2図は、従来の遅延回路の例を示す回路図である。It is impossible to create an e-meter that cancels out changes in resistance based on the ff1 degree characteristic. for example,#! An example is a delay circuit whose delay time is determined by the values of resistance and capacitance. 1 and 2 are circuit diagrams showing examples of conventional delay circuits.
図において、(1)は入力端子、(2)は出力端子、R
,R’は抵抗、Cは静電容量を示す。これらの遅延回路
においては、遅延時間が2CRで定まることが知られて
いる。したがって、抵抗凡の値が温&によって変化すれ
に遅延時間が変化し、抵抗温度特性の影響を直嫉受ける
ことになる。In the figure, (1) is an input terminal, (2) is an output terminal, and R
, R' represent resistance, and C represents capacitance. It is known that in these delay circuits, the delay time is determined by 2CR. Therefore, as the resistance value changes with temperature, the delay time changes and is directly affected by the resistance temperature characteristics.
本発明は、かかる抵抗温度特性の影愉を受ける回路を含
む半導体集積回路装置において、チップ内の温度を一定
に維持することによ)上記回路の抵抗温度変化を実質的
になくすことを主目的とするものである。以下1図面に
より本斃明を具体的に説明する。The main object of the present invention is to substantially eliminate the resistance temperature change of the circuit (by maintaining the temperature inside the chip constant) in a semiconductor integrated circuit device including a circuit affected by such resistance temperature characteristics. That is. This invention will be specifically explained below with reference to one drawing.
第3図は、本発明の実施例を示す回路図である。FIG. 3 is a circuit diagram showing an embodiment of the present invention.
図K>いて、点線で囲んだ部分は同一チップ(又はベレ
ット)を示し、W41及び第2図と対応する部分には同
一の符号を付しである。Rfは、チップの外側に付加し
た外部抵抗で温度制御の基準となるものである。外部抵
抗R1には、金属酸化皮膜抵抗など抵抗温度変化の少な
いものを選ぶ。(4)は比I2回路、(5)は温度制御
回路、(6)は遅延回路である。In Fig. K, the part surrounded by a dotted line indicates the same tip (or bullet), and parts corresponding to W41 and Fig. 2 are given the same reference numerals. Rf is an external resistance added to the outside of the chip and serves as a reference for temperature control. For the external resistor R1, choose a resistor with little resistance temperature change, such as a metal oxide film resistor. (4) is a ratio I2 circuit, (5) is a temperature control circuit, and (6) is a delay circuit.
比較回路(4)は、外部抵抗Rfと内部拡散抵抗Wの両
抵抗値を比較する回路である。いま、外部抵抗R4と内
部拡散抵抗「の抵抗値が等しいとすると、トランジスタ
Q1.Q2のコレクタ電流は等しく、トランジスタQa
、Q4のコレクタ電流もほぼ等しい。The comparison circuit (4) is a circuit that compares the resistance values of the external resistance Rf and the internal diffusion resistance W. Now, assuming that the resistance values of the external resistor R4 and the internal diffused resistor are equal, the collector currents of transistors Q1 and Q2 are equal, and the transistor Qa
, Q4's collector currents are also approximately equal.
このとき、比較回路(4)の出力端(3)K現われる電
圧は低く、温度制御回路(5)のトランジスタのベース
には殆ど電流が流れず、コレクタ電流も流れない。At this time, the voltage appearing at the output terminal (3)K of the comparison circuit (4) is low, and almost no current flows through the base of the transistor of the temperature control circuit (5), and no collector current flows either.
したがって、温度制御回路(5)は、チップ内の温度を
上昇させることはない。Therefore, the temperature control circuit (5) does not increase the temperature inside the chip.
ところが、内部拡散抵抗Wの抵抗値が外部抵抗Rfより
小さくなったとすると、トランジスタQ2のコレクタ電
流は増加し、トランジスタ屯のコレクタ電流は減少する
。ゆえに、出力端(3)の電圧は上昇し、温度制御回路
(5)のトランジスタのベースに電流が流れ、したがっ
てコレクタ電流が流れ始め、チップ内の温度を上昇させ
る。この温度上昇は、内部拡散抵抗Wの抵抗値が次第に
増加して外部抵抗Rfと等しくなる壕で続き、等しくな
り九時点で止む。この状態から内部拡散抵抗「の抵抗値
が外部抵抗R【より大きくなったとすると、トランジス
タQ2のコレクタ電流は減少し、トランジスタQ4のコ
レクタ電流は増加するので、出力端(3)の電圧は更に
低くなり、温度制御回路(5)は動作せず、チップ内の
温度は上昇することなく自然冷却によって低下する。However, if the resistance value of the internally diffused resistor W becomes smaller than the external resistor Rf, the collector current of the transistor Q2 increases and the collector current of the transistor Q2 decreases. Therefore, the voltage at the output terminal (3) increases, current flows into the base of the transistor of the temperature control circuit (5), and thus a collector current begins to flow, increasing the temperature within the chip. This temperature increase continues until the resistance value of the internal diffusion resistance W gradually increases and becomes equal to the external resistance Rf, and stops at the 9th point in time when the resistance value becomes equal. From this state, if the resistance value of the internal diffused resistor becomes larger than the external resistor R, the collector current of transistor Q2 will decrease and the collector current of transistor Q4 will increase, so the voltage at the output terminal (3) will further decrease. Therefore, the temperature control circuit (5) does not operate, and the temperature inside the chip does not rise but falls due to natural cooling.
すなわら、比較回路(4)は外部抵抗fLrと内部拡散
抵抗「の両抵抗値を比較して抵抗値の差に和尚する出力
を生じるが、温度制御回路(5)は比較回路(4)の出
力により両抵抗値が常に等しくなるようにチップ内の温
度を制御するので、チップ内の温度は両抵抗値が等しく
なるときの温度に一定に維持されるととになる。ただし
、温度制御回路(5)はチップ内の温ft−強制的に低
下させることができないので、上記の一定温度は、外気
温度及びチップ内の発熱量等を考慮して充分に高い温度
に設定する。In other words, the comparison circuit (4) compares the resistance values of the external resistance fLr and the internal diffusion resistance and generates an output that compensates for the difference in resistance value, but the temperature control circuit (5) compares the resistance values of the external resistance fLr and the internal diffusion resistance. Since the temperature inside the chip is controlled so that both resistance values are always equal, the temperature inside the chip is maintained constant at the temperature when both resistance values are equal. Since the circuit (5) cannot forcibly lower the temperature inside the chip, the above-mentioned constant temperature is set to a sufficiently high temperature in consideration of the outside air temperature, the amount of heat generated inside the chip, and the like.
この設定温度は、内部拡散抵抗「の抵抗値に対し外部抵
抗Rfの抵抗値を大きくし、その値を変えることによっ
て自由に選定することができる。This set temperature can be freely selected by increasing the resistance value of the external resistor Rf relative to the resistance value of the internal diffusion resistor and changing that value.
このようにチップ内の温度が一定に維持されると、遅延
回路(6)の遅延時間20Rはその抵抗温度特性に関係
なく一定に維持される。すなわち、チップ内の回路は、
遅延回路に限らず実質的に抵抗温度変化のない状態とな
る。When the temperature inside the chip is maintained constant in this manner, the delay time 20R of the delay circuit (6) is maintained constant regardless of its resistance temperature characteristics. In other words, the circuit inside the chip is
This results in a state where there is virtually no change in resistance temperature, not only in delay circuits.
ところで、チップ内の拡散抵抗「の抵抗値が製造上ばら
つくことは免れないので、上記の設定温度はこのばらつ
きによりチップ毎に多少変動する。Incidentally, since it is inevitable that the resistance value of the diffused resistor within a chip will vary due to manufacturing, the above-mentioned set temperature will vary somewhat from chip to chip due to this variation.
#I4図はこの場合の動作状況を示す4ので、縦軸に抵
抗値、横軸にチップ内温度を取っている・図において、
A、B、Cは製造上のばらつきを表わす3種類の内部拡
散抵抗「の抵抗温度特性曲線、Tは外気温度、rA、I
Brcは外気温*TK*−ける各内部拡散抵抗「の抵抗
値、「fは外部抵抗R/の抵抗値を示す。上述のように
、内部拡散抵抗Wの抵抗値が外部抵抗R7と等しくなる
壇で温度が上昇するから、外気温j[TK訃いて抵抗値
がrAのものでは温度はrA壇で、同じ(rBのもので
は温度はTBまで、同じ<tcのものでは温[TCまで
上昇して一定に繍持切れる。このように設定温度が製造
上のばらつきによって変動しても、遅I11回路(6)
の抵抗孔も抵抗Wと同様の温度特性を有するから、抵抗
孔の抵抗値は所定値に保たれる。#I4 Diagram 4 shows the operating situation in this case, so the vertical axis shows the resistance value and the horizontal axis shows the internal temperature of the chip.In the diagram,
A, B, and C are resistance-temperature characteristic curves of three types of internally diffused resistors representing manufacturing variations, T is outside temperature, rA, I
Brc is the resistance value of each internally diffused resistor at outside temperature *TK*-, and f is the resistance value of external resistor R/.As mentioned above, the resistance value of internally diffused resistor W is equal to external resistor R7. Since the temperature rises at the stage, the outside temperature j [TK and the resistance value is rA, the temperature is at rA stage, and is the same (for rB, the temperature rises to TB, and for the same < tc, the temperature rises to [TC]). Even if the set temperature fluctuates due to manufacturing variations, the slow I11 circuit (6)
Since the resistance hole also has the same temperature characteristics as the resistance W, the resistance value of the resistance hole is maintained at a predetermined value.
また、上記の実施例では、チップ内の温度を一定にして
遅延回路(6)の遅延時間2CRを一定にする場合につ
いてのみ説明したが、この場合、遅延時間20Rを所望
の値にするためには、抵抗札が設定され九一定の温度に
おいて所定の抵抗fiL′1にもつようにしなければな
らない。このようにして定められた遅延時間は、チップ
内の温度を変化しない限シ変わることはない。ところが
、本発明においては、外部抵抗Vを可変とすることによ
シ簡単にテップ内の温[を変化させることができるので
、集積回路内にある遅延回路(6)の遅延時間を県積回
路外よシ番易に変えることが可能となる。Further, in the above embodiment, only the case where the temperature inside the chip is constant and the delay time 2CR of the delay circuit (6) is constant is explained, but in this case, in order to set the delay time 20R to a desired value, The resistance tag must be set so that it has a predetermined resistance fiL'1 at a constant temperature. The delay time determined in this way does not change unless the temperature inside the chip changes. However, in the present invention, the temperature inside the step can be easily changed by making the external resistance V variable, so the delay time of the delay circuit (6) in the integrated circuit is It becomes possible to change the outside easily.
以上説明したとおシ1本発明によれば、抵抗温度特性の
影畳を受ける回路を含む半導体集積回路装置において、
チップ内の温度を一定に維持することにより上記回路の
抵抗温度変化を実質的になくすことができると共に、チ
ップ内の一定温度を変化することによシ上記回路の回路
定数(例えば遅延時間2CRなど)を変化させることが
できる。As explained above, 1. According to the present invention, in a semiconductor integrated circuit device including a circuit that is affected by resistance temperature characteristics,
By keeping the temperature inside the chip constant, it is possible to substantially eliminate the resistance temperature change of the above circuit, and by changing the constant temperature inside the chip, the circuit constants of the above circuit (for example, delay time 2CR, etc.) can be reduced. ) can be changed.
なお、本発明は、特許請求の範囲に記載した要旨を逸脱
しない範囲内において、上記の実施例に限らず種々の変
形、変更が可能であることはいうまでもない。It goes without saying that the present invention is not limited to the embodiments described above, and that various modifications and changes can be made without departing from the gist of the claims.
第1及び$2図は遅延回路の従来例を示す回路図、菖3
図は本発明の実施例を示す回路図、第4図はその動作説
明図である。
Rf・・・・・・外部抵抗、W・・・チップ内拡散抵抗
、(4)・・・比較回路、(5)・・・温度制御回路。Figures 1 and 2 are circuit diagrams showing conventional examples of delay circuits.
The figure is a circuit diagram showing an embodiment of the present invention, and FIG. 4 is an explanatory diagram of its operation. Rf...external resistance, W...chip diffused resistance, (4)...comparison circuit, (5)...temperature control circuit.
Claims (1)
路と、この比較回路の出力でチップ内の一駄t−II呻
する温度制御回路とを具え九半導体集積回路装置。9. A semiconductor integrated circuit device comprising: a circuit for comparing the resistance values of an external resistor and a diffused resistor within the chip; and a temperature control circuit for controlling the internal temperature of the chip using the output of the comparison circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15105881A JPS5852865A (en) | 1981-09-24 | 1981-09-24 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15105881A JPS5852865A (en) | 1981-09-24 | 1981-09-24 | Semiconductor integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5852865A true JPS5852865A (en) | 1983-03-29 |
Family
ID=15510371
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15105881A Pending JPS5852865A (en) | 1981-09-24 | 1981-09-24 | Semiconductor integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5852865A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01114067A (en) * | 1987-10-07 | 1989-05-02 | Tektronix Inc | Signal propagation delay control circuit |
-
1981
- 1981-09-24 JP JP15105881A patent/JPS5852865A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01114067A (en) * | 1987-10-07 | 1989-05-02 | Tektronix Inc | Signal propagation delay control circuit |
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