JPS5852573A - Power-factor transducer - Google Patents

Abstract

PURPOSE:To realize a transducer having high stability and high accuracy, by executing addition and subtraction of each DC voltage being proportional to a power of a phase difference of 2 AC inputs, and reference voltage, so that DC voltage being proportional to a power-factor can be outputted. CONSTITUTION:Each AC input of a phase difference (phi) of a terminal 1 and 2 becomes sqaure wave voltage by a comparator 11 and 12, exclusive OR is taken by a gate 13, and it becomes voltage 53 of a duty ratio being proportional to the phase difference (phi). The voltage 53 is applied to a control terminal of switches S1, S2, and S1 outputs a peak value Ez by making reference voltage Ez pass through when the voltage 53 is high, and by making it pass through a filter A1, DC voltage E21 being proportional to the phase difference (phi) is obtained. The voltage E21 is supplied to S2 and A2, and in the same way, as to the phase difference (phi), voltage E22 being proportional to phi<2> is obtained. Voltage E21, E22 and Ez is subjected to addition and subtraction in the decided ratio by an adding and subtracting circuit AD, and DC voltage E25 being proportional to a power-factor of an input is outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power factor transnuducer that outputs a full DC voltage proportional to the power factor of a circuit to be measured.

Conventionally, a power factor transnuducer consisted of a phase discrimination circuit that outputs a DC voltage proportional to the phase difference φ between two AC inputs, and a φ part φ degree conversion circuit that approximates a broken line using all diodes, etc. .

However, a 110O9φ conversion circuit using a diode or the like using a broken line approximation has poor conversion accuracy and is affected by changes in ambient temperature and temporal drift, so it is not suitable for high-precision power factor measurement.

This invention was made in view of the above points,
By using a power factor circuit for the phase difference φ using a switch circuit and a filter circuit, an attempt is made to provide a highly accurate power factor transducer that performs all φ-to-φ conversions.

Here, the power factor φ is expressed in terms of the power of the phase difference φ.

When the total φ is subjected to Taylor expansion, it can be expressed as the following equation (1).

Transducer φ-1-A-q Left-1... (1) (However, the unit of φ is rad) In general, power factor trannuducers are practically
Since the power factor range of 0.5-1 is suitable for measurement, it is also possible to express the possible φ in terms of φ as shown in the following equation (2) by setting the power factor range to α5 to 1.

Part φki l-0, (14φ-042φ9...(2) Substitute specific numerical values into the above equation (2) to find φ-σ, Sφ conversion accuracy, and calculate the fish φ value according to equation (2). True Table 1 of Possible φ As shown in Table 1, the φ value obtained by equation (2) has a small error with respect to the true φ value.

Therefore, the circuit of the present invention is configured to fully calculate equation (2).

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

That is, in FIG. 1, (1) and (2) are input terminals to which AC inputs (41) and (42) of the circuit under test are applied, respectively, and (11) and (121 are input terminals (]) and (, respectively). 2) A comparator that shapes the full waveform of the AC input applied to G31, which is the comparator (II).
and gates that output the exclusive OR of the outputs of (12), Sl and G2 are the control terminals G1 and G2, respectively.
A1 is a switch that turns on only when the voltage becomes high.
and A2 is a filter that smoothes the input signal, Ez is a reference DC voltage, QI) and (A) are terminals from which DC voltages proportional to φ and φ2, respectively, can be obtained with respect to the phase difference φ,
AD is an adding/subtracting circuit that adds and subtracts the DC voltage output to the reference voltage Ez and the terminal 62]) and (A), respectively, at a ratio based on the formula (2) above. It is output from the output terminal.

In the power factor neutralizer circuit configured as described above, the input terminals (1) and (2) are connected to AC power 4 with a phase difference φ as shown in FIG. 2 (1) and (2), respectively.
1 and 42 are applied. These inputs are input by comparators (11) and (121), respectively, as shown in FIG.
3) and (4) V? : The waveforms are shaped into rectangular wave voltages 51 and 52 shown in FIG. These square wave voltages 51 and 52
is exclusive ORed at the gate (portion), and is a rectangular wave voltage 53 with a duty ratio proportional to the phase difference φ shown in FIG. 2 (5).
is obtained. The square wave voltage b3 is applied to the switches S1 and G
2 control terminals G1 and G2.

First, the switch S1 is turned on when the rectangular wave voltage 5B is high, allowing the reference voltage KZi to pass, and an output 61 having a wave height Ez as shown in FIG. 2 (6) is obtained. This output 61
is smoothed by filter A1 and converted into a DC voltage Ez+ proportional to the input phase difference φ as shown in the following equation +3).

EZ 1= , -Ez -G3) This voltage E21 is supplied to the switch S2 and the switch S1
Similarly, an output 62 having a peak value Ez+ as shown in FIG. 2 [7] is obtained. This output 62 is smoothed by a filter A2 and converted into a DC voltage E22 proportional to the input phase difference φ as shown in the following equation [4].

φ EZ2 = -・'B 2 + Substituting the (+3) formula) π = (j')'', Bz ... (4) π Obtained as above!'L ftc Lm current voltage Il
l and EZ2 and group B1! , the voltage H2 is the addition/subtraction circuit A
D allows addition and subtraction of +, 2, and 1 to the addition/subtraction ratios, respectively, and an output E25 shown by the following equation (5) is obtained.

E2s=Kz- to +Kz+-2E22 (+31 equation (4) substituted)φ =α42 to π
If π2 is selected, the output E25 shown in equation (5) will be added or subtracted at the same ratio as in equation (2), and will be proportional to the power factor of the input.

Here, in the circuit of FIG. 1, as shown in FIG. 2 (5) to (7), the negative side output is not considered, but the switch S1
and G2 are configured so that when the respective control terminals G+ and G2 are low, the input fully inverted voltages are output to the filters A1 and A2, respectively.
7], a negative output is generated in the interval (π-φ).

In such a case, the outputs of filters A1 and A2, respectively, are
Type 041! ')become.

EZ, = JL two crawls), EZ π = (2--L-1) EZ...
A13) φ-(π-φ) B22=--1~-K E21 π: (also 'l' l)2・BZ π-(4 colors--'l'+1) EZ -Hπ9
π Next, in the addition/subtraction circuit AD, B21. Addition/subtraction ratio M1, B2 and B3 for B22 and reference voltage Fliz, respectively.
By adding and subtracting with , an output E25 shown by the following Qiij formula is obtained.

E 25 ==M3Bz-Ml B21-B2 B22
(f131. Substitute formula (14)) Above (15)
In the formula, M50M+-M2=1・-M+--M
2 = 0. (14, -M2 = 0.421c
If you choose, the previous π π
By adding and subtracting at the same ratio as in Equation (2) in π2, an output proportional to the power factor can be obtained as in Equation (5) above.

In addition, in FIG. 1, the phase discrimination circuit consisting of the gate U mark and the switch S1 outputs a rectangular wave voltage with a duty ratio proportional only to the magnitude of the phase difference, regardless of phase delay or lead. However, as is commonly used, one of the inputs is shifted by π7/2.
Similarly, when the configuration is configured to output a rectangular wave voltage with a duty ratio that increases and decreases depending on the phase delay and advance by phase discrimination, ≠ can be calculated by calculating the phase difference φ and 4g. −cosφ conversion is possible and is also included in this invention.

In such a case, since the output voltage of filter A1 in Fig. 1 is inverted between positive and negative around zero phase difference, this can also be achieved by inserting an absolute value circuit etc. into the input section (72) of the adder/subtracter circuit AD. It is.

As described above, according to the present invention, a DC voltage proportional to the power factor of the circuit under test can be obtained with a simple circuit configuration, and because it does not use any elements that cause drift such as diodes, it is possible to obtain a DC voltage proportional to the power factor of the circuit under test. It is possible to provide a stable and highly accurate power factor transducer.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a power factor transducer according to the present invention, and FIG. 2 is a waveform diagram of each part in FIG. 1. In the figure, (1) and (2) are input terminals, (river (121
is a comparator, (13) is a gate 1~, (c) is an output terminal, s, s2 is a switch, AT, A2 is a filter, A
D is an addition/subtraction circuit, Flzi! :Reference voltage. Agent Makoto Kuzuno - Figure 1

Claims (1)

[Claims] A phase discrimination circuit that outputs a rectangular wave voltage with a duty ratio proportional to the phase difference φ between two AC inputs of the circuit under test, and a filter that smoothes the output of this phase discrimination circuit and outputs a DC voltage proportional to the phase difference φ. a first switch circuit configured to intermittent the output of the filter circuit with the output of the phase discrimination circuit, a first filter circuit configured to completely smooth the output of the first switch circuit, and a reference voltage and the The output voltage of the filter circuit and the output voltage f of the first filter circuit are provided with an adding/subtracting circuit that adds and subtracts at a predetermined ratio, and a DC voltage proportional to the power factor of the circuit under test is extracted from the output terminal of the adding/subtracting circuit. A power factor transducer characterized by: