JPS5851588A - Printed circuit board - Google Patents
Printed circuit boardInfo
- Publication number
- JPS5851588A JPS5851588A JP14944881A JP14944881A JPS5851588A JP S5851588 A JPS5851588 A JP S5851588A JP 14944881 A JP14944881 A JP 14944881A JP 14944881 A JP14944881 A JP 14944881A JP S5851588 A JPS5851588 A JP S5851588A
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- flat pack
- present
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Structure Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明はフラットパックＩＣの実装を容易にしたプリン
ト配線［Ｋ関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to printed wiring [K] that facilitates the mounting of flat pack ICs.
従来、端子数の多いフラットパックＩＣをプリント配線
板上の配線用導体パターンへ接続する作業は、比較的生
産数が少なく手作業に主として依存する場合、位置決め
などが困難で大きな工数を必要としていた。Conventionally, the work of connecting flat pack ICs with a large number of terminals to wiring conductor patterns on printed wiring boards required a large amount of man-hours due to difficult positioning when the production volume was relatively small and relied mainly on manual labor. .
本発明の目的は、上記問題を解決し、フラットバックＩ
ＣＯ実装な手作業でも容易に行なえるよ５にしたプリン
ト配線板を提供することＫある。The purpose of the present invention is to solve the above problems and to
It is an object of the present invention to provide a printed wiring board in which CO mounting can be easily carried out by hand.
上記目的を達成するために本発明においては、フラット
パックＩＣを搭載して接続する個所に、そのフラットパ
ックＩＣの接続状態における外部端子端部までを含めた
平面包絡輪郭に合わせて。In order to achieve the above object, in the present invention, a flat pack IC is mounted and connected at a location in accordance with a planar envelope contour including the external terminal ends of the flat pack IC in a connected state.
少なくとも外部端子の板厚以上の深さを有する凹みを設
けることとした。It was decided to provide a recess having a depth at least equal to the board thickness of the external terminal.
第１図は本発明配線板に実装するフラットパックＩＣの
一例の平面図、第２図は本発明実施例のＩＣ取付は個所
近傍の斜視図、第３図は同個所近傍の断面図である。図
中１はフラットパックＩＣ。Fig. 1 is a plan view of an example of a flat pack IC mounted on a wiring board of the present invention, Fig. 2 is a perspective view of the IC mounting area of the embodiment of the present invention, and Fig. 3 is a sectional view of the vicinity of the same area. . 1 in the figure is a flat pack IC.
２はＩＣの外部端子（以後リードビンとよぶ）、３はプ
リント配線板上の銅はく配線、４は本発明プリント配線
板である。このよう和すれば従来手作業でＩＣ接続を行
う際非常に多くの工数を要していたのが極めて容易に位
置決め可能となるため大幅な工数低減ができることは自
明であろう。また従来はＩＣのリードビンは、平らなプ
リント配線板上で自由に動けるため、かなりていねいに
位置決めしても、１７１０５ｍ桁の位置ずれが生じてい
ることが多かったが１本発明によれば位置ずれもはとん
と生じなくなる。又従来位置決めを行う―、全く手作業
だけに依存することは極めて困難なので、多くの場合に
少なくとも簡単なＩＣ位置決め治具を作って用いていた
が、かかる治具も不要になる。更に極め【大きい効果は
、従来の如く、プリント配線板上が平らな場合には、接
続したＩＣｋプリント配線板面に平行な分力をもつ外力
が作用すると、リードピン２と配１１３とのりフローは
んだなどによる接続部分にせん断力として作用し、接続
部分がせん断破壊してしまうことがあったが、本発明実
施例にＩＣを接続した場合には、配線版画に平行な外力
に関するかぎり、この力はＩＣリードビン端部と配線板
に設けた凹みの側壁面との接触部に生ずる応力によって
対抗され、半田接続部のせん断破壊は生じない。2 is an external terminal of the IC (hereinafter referred to as a lead bin); 3 is a copper foil wiring on a printed wiring board; and 4 is a printed wiring board of the present invention. It is self-evident that by combining these methods, it is possible to greatly reduce the number of man-hours since positioning, which conventionally required a large number of man-hours when manually connected, can now be performed extremely easily. Furthermore, in the past, IC lead bins could move freely on a flat printed wiring board, so even if they were carefully positioned, there was often a misalignment of 17,105m, but according to the present invention, the positional shift is It no longer occurs. Furthermore, since it is extremely difficult to rely solely on manual positioning in the past, in many cases at least a simple IC positioning jig has been made and used, but such a jig is no longer necessary. [A major effect is that when the printed wiring board is flat as in the conventional case, when an external force with a component parallel to the surface of the connected ICk printed wiring board is applied, the adhesive flow soldering between the lead pin 2 and the wiring 113 is reduced. However, when an IC is connected to the embodiment of the present invention, as far as external forces parallel to the wiring pattern are concerned, this force is This is counteracted by the stress generated at the contact portion between the end of the IC lead bin and the side wall surface of the recess provided in the wiring board, and no shear failure of the solder connection portion occurs.
本発明によるプリント配線板は、例えば紙エポキシ基板
のＩＣ実装個所に本発ｆ！ＡＫ係る深さ０．１５−の凹
みをプレス作業により設け、以後アディティブ法で配線
用鋼はくパターンを形成すればよい。The printed wiring board according to the present invention can be applied to the IC mounting area of a paper epoxy board, for example. A concavity with a depth of 0.15 mm according to AK may be provided by a pressing operation, and thereafter a wiring steel foil pattern may be formed by an additive method.
凹み周辺部に対しては作業上多少の、考慮は要するが問
題となるはとのことはない。The area around the dent requires some consideration during work, but it is not expected to be a problem.
以上説明したように本発明によれば、プリント配線板へ
の７ラツト、バックＩＣの実装作業が極めて容易となり
、しかもＩＣリードピンと配線パターン間の牛田付は部
のせん断破壊も生じなくなる。As explained above, according to the present invention, the work of mounting a back IC on a printed wiring board becomes extremely easy, and furthermore, shear failure of the contact area between the IC lead pin and the wiring pattern does not occur.
第１図はフラットバックＩＣの平面図、嬉２図は本発明
実施例のＩＣ取付は個所近傍の斜視図、第３図は同個所
近傍の断面図である。
１・・・フラッ゛ドパツクＩＣ，２・・・リードビン、
３・・・銅はく配線、４・・・本発明によるプリント配
線板。
代理人 弁理士 “ ＥＢ “Ｕ ｇ、、、７．
，１、・庁ツFIG. 1 is a plan view of a flat back IC, FIG. 2 is a perspective view of the IC mounting area in an embodiment of the present invention, and FIG. 3 is a sectional view of the vicinity of the same area. 1... Flood pack IC, 2... Lead bin,
3...Copper foil wiring, 4...Printed wiring board according to the present invention. Agent Patent Attorney "EB" Ug...7.
,1,・Agency
Claims (1)
、取付けるべきフラットパックＩＣの接続状態における
外部端子端部までを含めた平面包絡輪郭に合せて、少な
（とも外部端子の板厚以上の深さを有する凹みを、該フ
ラットパックＩＣを搭載接続すべき個所に設けたことを
特徴とするプリント配線板。In the printed wiring board on which the flat pack IC is to be mounted, a small recess (with a depth equal to or greater than the board thickness of the external terminal) should be made to match the planar envelope contour including the external terminal end in the connected state of the flat pack IC to be mounted. , A printed wiring board characterized in that the flat pack IC is provided at a location where the flat pack IC is to be mounted and connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14944881A JPS5851588A (en) | 1981-09-24 | 1981-09-24 | Printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14944881A JPS5851588A (en) | 1981-09-24 | 1981-09-24 | Printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5851588A true JPS5851588A (en) | 1983-03-26 |
Family
ID=15475337
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14944881A Pending JPS5851588A (en) | 1981-09-24 | 1981-09-24 | Printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5851588A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01101688A (en) * | 1987-10-15 | 1989-04-19 | Matsushita Electric Works Ltd | Printed wiring board for mounting electronic component |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5518080A (en) * | 1978-07-27 | 1980-02-07 | Fujitsu Ltd | Printed circuit board |
-
1981
- 1981-09-24 JP JP14944881A patent/JPS5851588A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5518080A (en) * | 1978-07-27 | 1980-02-07 | Fujitsu Ltd | Printed circuit board |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01101688A (en) * | 1987-10-15 | 1989-04-19 | Matsushita Electric Works Ltd | Printed wiring board for mounting electronic component |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6052084A (en) | Printed circuit board | |
| JPS5851588A (en) | Printed circuit board | |
| JPS58220493A (en) | Circuit substrate | |
| JPS60245298A (en) | Printed board containing device | |
| JPH05206603A (en) | Flexible printed wiring board | |
| JPH0617225U (en) | Electronic component terminals | |
| JPS6352795B2 (en) | ||
| JPH02201993A (en) | Connection structure of printed board | |
| JPS5846694A (en) | Circuit pattern connecting structure for printed circuit board | |
| JPS5851589A (en) | Printed circuit board | |
| JPS6017915Y2 (en) | Mounting jig for multi-terminal electrical elements | |
| JPS616890A (en) | Chip carrier mounting structure | |
| JPS5856471U (en) | Chip parts mounting device | |
| JPS6168871A (en) | Flexible printed circuit board | |
| JPH051098Y2 (en) | ||
| JPS626711Y2 (en) | ||
| JPH0353516Y2 (en) | ||
| JPS61131495A (en) | Printed circuit board | |
| JPS58220490A (en) | Method of connecting printed board | |
| JPH0210790A (en) | Flexible printed wiring board and parts mounting method | |
| JPS6132450A (en) | Structure of flat package ic and mounting method thereof | |
| JPH0686370U (en) | Connector replaceable wiring board | |
| JPS6144878U (en) | Soldering plate for mounting parts | |
| JPS62262490A (en) | Method of mounting semiconductor package | |
| JPS5827390A (en) | Method of plating printed board |