JPS5851376A - Multiple integral calculation system - Google Patents

Abstract

PURPOSE:To execute the multiple integral of a two-dimensional pattern at a high speed, by providing a rewritable high-speed control storage and combining a picture storage device, where rows and columns of a picture can be substituted, and a high-speed product sum operator. CONSTITUTION:Three items a(1,j), a(2,j), and a(3,j) of the j-th row of a coefficient matrix are held in coefficient registers 33A, 33B, and 33C, respectively. Original picture elements are first stored in a picture element register 34C and are shifted to picture element registers 34B and 34A successively. Products between data of coefficient registers 33A, 33B, and 33C and data of picture element registers 34A, 34B, and 34C are operated in multipliers 35A, 35B, and 35C, and the sum of three products is calculated in an adder 36. Intermediate resultant picture elements are stored in an intermediate resultant register 37 successively. Contents of this register 37 and the output result of the adder 36 are added in an adder 38 to obtain new intermediate resultant picture elements.

Description

[Detailed description of the invention] This emission @l-1 is related to the convolution integral calculation method.

Convolution integral calculation is one of the most basic calculations for two-dimensional pattern features such as art trenches, and speeding up of the calculation is essential. In the past, various dedicated processing devices have been developed that can perform this type of calculation at high speed. However, Jur et al.
It was highly specialized and lacked flexibility, it was not easy to program even though it was versatile, and it lacked compatibility with other document processing devices. In addition, the equipment was complicated and had some problems.

The present invention has completely addressed this point, and has five functions: a rounding memory function for drawing input, a memory function for image display, and a ninth memory function for image calculation. a device;
This provides a convolution integral calculation method that combines one-dimensional product-sum calculation units.

The details of the invention will be described below. First, the first structure
! I will talk about mnemonic & as an element.

Let two images gII consisting of Fxf pixels be I, , I
.

shall be. When I, ;I, are two-dimensional matrices, their column numbers and row numbers are 14, mj :lj, respectively.

Mj (1≦i≦ff, 1≦j≦q) every seven, create the following two permutations.

Then, the read/write method for the storage device for the above-mentioned image display, ll1i input method, ii image calculation operation KIjbI11 is given by equation (1)! l! can be expressed. 92 For example, in the case of a double zoom display, the following will occur.

(2) Let I be the image of Ili stored in the storage device, and I be the image displayed on the display device. Necessary replacement company, at! !
can be expressed. However, it is easy to use large numbers, p, ra, and circles.

In the case of transposition, it can be expressed in the following form by exchanging the column numbers and row numbers in equation (1).

For simplicity, use pxq and circle. Other operations can be similarly expressed in substitution form.

In the present invention, in order to realize the above-mentioned replacement operation as this image storage device, at least the address is preferably write/read control, and the peripheral 1 circuit - JIl is also controlled at high speed with rewritable control 11111+: storage section. We decided to introduce the circle. Generally, for rounding to scan an image, 5111
m signals are required.

That is, a pulse signal Fφ indicates the start of one screen, a pulse signal Lφ indicates the start of one scan series, and a pulse Mφ indicates the position of a pixel. The book storage device is also driven by these five pulses. Figure 1 shows a schematic configuration of an example of the stripe. ! The entire configuration is designated by the symbol λ0.

Count-/, J counts pulse signals. Counter/UMφ
is counted and reset at Lφ. The counter counts and is reset by Fφ.

The control memory J, 4A is read out using the count value of the count al as an address, and the control memory J, Ai! The count value of the counter is read out as an address. If the X coordinate and X coordinate of the image are defined as shown in Fig. 2, the control information of the X coordinate of the rounding for reading is obtained from the control memory J, and the control information of the X coordinate of the rounding for writing is obtained from the control memory L. Control memory! The control information of the X coordinate of the rounding of the line gun is stored in the control memory 4.
The control information of the X coordinate for writing is read out from the .

The read information of the control 1 storages j and j is combined and used for read control of the storage s/l. register? , 1.
゛riFi? . . . , which hold control information, are respectively j, the address register 11 read storage control register, and the bag 77 control register I. The start-up information in the control memory 101 is used to control the write in the memory @/I, and the data is stored in the write address register 101 to control the memory allocation when writing to the register //, and to control the input puffer and hold it in the register /. be done.

The control information of the storage section control register 1 at the time of reading and the storage section control register 11 at the time of writing is held in combination in the storage section control register 13. For example, these information lines:
This is an instruction to read/write to the memory sll, and an instruction to enable/disable the storage unit control information itself.

Depending on the read/write instruction from the storage unit control register /J, one of the read address and 1118 write address is selected by the address selection unit i and held in the address register /j, and the address for the storage unit ll is selected. becomes.

Storage@it consists of memory integrated circuits.

#Reading of J image storage device 11! The speed of filling is treated as 1
iii.I will judge my quality, so the faster the better.

On the other hand, the reading and writing speeds of large-capacity memory integrated circuits are not necessarily sufficient. Therefore, output buffers t4. Place Inka Puffer/7. The output buffer till_1 register controls the input buffer of the output buffer t4, and the register holds input buffer 170 control information t-.

FIG. 5 shows an example of the word structure of the control memory of the storage device for images of a maximum of 512 x 512 drawings. output buffer,
Let it be the CymeFi8IIIi element of the input buffer. The meaning of each bit is as follows.

臘, R/W, : Storage device read/write specification.

RXO,,'WXO,,RYO,,WYOt: 'f
:Resort Indicates whether the %allj word is valid or invalid.

RXO,, RYO,: Indicates whether to replace the output pixel from the storage unit with 0.

WXO,, WYOo: O input 1 to Ik2tliftB
Indicates whether to replace fii element t O't'.

RXA, , RBF, ~. : Readout [7 o'clock X coordinate designation RBF, -4 removal cover sofa address, RX
A.

are the lower 6 bits of the address of the storage unit.

RYA, ~. : The Y coordinate at the time of starting corresponds to the top 9 pits of the address in the storage unit.

wxAll~. , MP, , : Specify the X coordinate when writing.

WBF, Fi person Kapaffa's address, ripe.

are the lower 6 pins of the address of the storage unit.

WYAs, , ): Yi mark at the time of writing. Corresponds to the upper 9 bits of the address of the storage section.

RXO0 near address RYA, ~. , to demonstrate that the information in the memory needle specified by enemy ~9 is written to the data pack. Near address payment. , instructs to write the contents of the input buffer to the storage section specified by WXA@4.

Let τ be the period of the leg. Regarding the control of the output buffer and input buffer, for example, when reading data, set the memory read time and specify the memory address between 1-LYA, . . . Then, after 8τ irradiation, the read information for 8 pixels is written to the output buffer, and then RBF, . . . Accordingly, one pixel at a time is output at a period τ. Do the same thing when writing down. Further, since the reading/writing operation of the storage section can be changed every 8 times by means of le mK, it is possible to perform reading and convolution at the same time, although it looks good. 9, so in this case the continuation/writing speed will be halved.

Each term in each line of permutation (1) corresponds to one word. The addressing part in the word represents the column number or row number.

Each row of the replacement equation (1) can be easily converted into a sequence of control words (-Dan's microprogram). Connect a minicomputer or microcomputer to the main memory device to generate word strings and load them into the control memory.KXF
), all operations expressed in the form of substitution (1) can be executed.

Note that if each control memory J, lI, j, and block shown in FIG. 1 is sufficiently deep, a shift operation can be performed by changing the load address of a word string.

In addition, the transposition operation is control 41 memory 3 and da, control memory! The contents of and B are exchanged, and counter l counts - and F
It is sufficient that the counter is reset at φ, the counter counts M-, and the counter is reset at Lφ.

This section deepens our understanding of the storage device fl11λθ itself.
Application examples in combination with the JI# device are shown in Figure 4 and
It is shown in Figure 5 and Figure 6.

In FIG. 4, the signals 1, Lφ and F1$ necessary for the operation of the image storage device KO are supplied from the television camera control KI&6-/. The output Wk of the TV camera λ is AD
It is digitized by a converter λJ and input to the image storage device 11O. It is assumed that the image taken by TV camera 2-2 is taken using interlaced scanning, and the size of the input image is set to 512.
x 480 drawing slips. Captured image - 11.1 Storage device - Image stored in 〇 1. Then, according to equation (1), the input image can be stored in the image storage device fIII-O by converting interlaced scanning into sequential scanning by using the replacement pipe material. The first row of both permutations in equation (4) represents one cumulative series of input images. The second line can be realized by the control storage of the image storage device Q as described above. It is sufficient to load the control word string corresponding to the column replacement line w42 into the control memory 41 in FIG.

In FIG. 5, signals Ml&, Lφ, Fφ necessary for the operation of the image storage device @20 are supplied from the public television monitor control Sco reference. The output 1lii element from the image storage device 0 is DA
The iHIL device 2jK converts the information into video and displays it on the TV monitor. If the image stored in the image memory storage box O is I1% and the displayed image is 11, then the image*1 size is 512 x 512, and the following replacement can be considered. For this purpose, the control memory 3 in Figure 1 contains the M1 row of column permutation, and the control memory j contains the control iIl corresponding to the 181 row of row permutation.
Load the missing column.

In the application example shown in Figure 6, two picture storage devices gt-〇 (Oa, Koh) shown in Figure 1 are used, and the signals Mφ, Lφ, Fφ butterfly necessary for operation, and image calculation control sλ7 are used. Supplied. The image calculation control l maintains calculations on the output pixels from the first image storage device fi11 Oa, and the result is
The image is stored in the image storage device 06. As an example, if we consider an operation such as adding an increment value of 1 to the image I in the first image storage device *λOa and storing the resulting image *Iv in the second image storage device Ob, the result is The replacement is equation (5). Of the control memories of the first image storage device, 2O(,
, jc) is loaded with one control word string corresponding to the first row of both permutations in equation (5), and of the control memory of the second image storage device 〇6, the one shown in Fig. 1 is loaded. Part K(5) of 44.4
Load the control columns corresponding to the second row of both permutations of the expression.

Note that depending on the tIi type of calculation, the image storage device Oa
.

Each of the six children stutters more than one. Also, one 1iii storage device &λO is used for both imaging devices.
9.20b may also function.

Input, display, and performance shown in Figures 4 and 5, and 6 examples: jI
It is also possible to construct an image storage device that integrates fjk functions, and an example of such an application is shown in Figure 7. Here, seven main image storage devices are used (each is indicated by 20-1-oh...λO-!).

Image input 5JOFi, TV camera in Figure 84-,
The television camera control section is configured as a converter. This -I input 1lIJQ and each image storage device -〇-1~ko θ first explain the island 4 diagram and are combined in 9 ways, so the image input @JO and the image storage device such as V -〇 ,~ko0-. Idiig11 input is possible.

The tii my calculation sJl is the Idi image calculation unit, 2t, and the image calculation system @ ! in figure #46. 11.27 I! ! It is structured as a vote. Then, the l1ii image storage device -〇-r~, 20-. correspond to the 61st output image storage device Oα and the input side image storage device O06, respectively. Since the image calculation control 31 in FIG. 7 and each image storage device Fi are connected in the manner described in FIG. 6, the desired performance 'J! Output each image storage device according to
Calculation becomes possible by using it as the l## image storage device 1 or the input @IIJ1jl storage device.

The image display B3 is a duck that is configured with the DA converter 1, the TV monitor 1, and the TV monitor in Figure 5. K7 figure's picture enshin! 117/, the image display 1i1j, and the signals Mφ, Lφ, )φ necessary for the operation of the picture storage devices λ0-1 to 0-ma. Since the image display @J is connected to the data line that inputs the 1j17 image calculation section J10 output signal to each image storage device, it displays the calculation result of the 1Iiii image calculation I83/. If the operation of converting an input pixel directly into an output pixel is regarded as one operation, the contents of each image storage device will be displayed.

Next, the product-sum operator X, which is another mg element necessary in the present invention, will be described.

For the convolution integral operation of (2N+1) 9).A schematic diagram of the calculation process leading to equation (9) is shown in Fig. 8, taking 5×5 convolution integral as an example.

Coefficient register 3J input, JJB, JJOFi coefficient matrix 1
Row 5XJa (1, j), G (2, /), a
(Lj) are held respectively. Pixel register j$A, J
The entirety of 4'B and 74IO is one shift register. Let Cφ be a pulse signal that moves the arithmetic unit, and let t be its period. The original picture ticket is first stored in the pixel register J$Q, and is shifted to registers JIIB and J+A with one vote every τ. The data in the coefficient registers JJA, JJB, 370 and the face I 144, JB, 34IO are multiplied by the multiplier 1131 and JOB, 310, respectively, and the sum of the five products is calculated by the adder J4. . This result Fi
Equation (7) is calculated and becomes 9. Intermediate result pixel 8? '
(4, j) The results are stored one after another in the intermediate result register J7 at the pass cycle t. The contents of this register and the output result of addition 71 are added in adder 31, and n1 new intermediate result #ill
! shall be. This is t! This means that formula M (9) has been calculated.

The present convolution integral calculation method executes the above calculation by combining the above-mentioned storage device KO and the sum-of-products calculator (the whole is designated as ``po'' in Figure 8) as shown in Figure 9. be.

FIG. 9 shows a practical example of the principle, and the image storage device λ shown in FIG.
Using a pair of image storage devices -o1゜ and 2QB equivalent to O, the pulse signal leg required for 1st class is the product-sum operation 1jL @'
lOK 6b It has twice the frequency of the required pulse signal 0φ, and the five devices operate synchronously. The first image storage device 920 supplies the original image to the sum-of-products calculator 419 . Sabani's image storage device OB supplies the intermediate result image side and also stores l#intermediate result JIN, - which is the output of the product-sum calculator 4tO.

Here, we denote column permutation ξ and row permutation from the image stored in the picture storage device gIL and 2OA to the input image of the product-sum calculator, and (1≦j≦3). . Xie Er's Memory Device G1
Intermediate knot stored in Ko0BVC! Let τ be the column permutation and σ be the row permutation from the I1.1Iili image to the new Nakaseki result image stored in this +l1ii storage device OB again.

It is assumed that the image is rounded, the image size is 512×512, and the first row is stored. ! Good, the symbol * means % with a value specified.

The 5×5 convolution integral calculation is executed as follows.

(1) Ginji's image storage device - oBo Set all image information to 0.

ω) 11i first in the first row of the coefficient matrix! The coefficient register JJK described above is set, and the permutations ζ+W1+τ and σ are set. Performs an open operation for one frame.

(1) Set the second row of the coefficient matrix in the coefficient register, and set permutation ξ+'71eτ, 4F.

Performs a function operation for one frame.

(jV) Set the 5th row of the coefficient matrix to the coefficient register, and perform [conversion ξ, w3. Set τ and g.

A one-frame opening JIE is performed.

The final result is obtained in the image storage device-OB.

The tfd inside is divided as follows.

Furthermore, the delay time of the calculation of the product-sum operation 419 is changed, and the load address of the control request to the control memory of the uniform storage device is adjusted.
This can be compensated for by adjusting the MiK hook.

The above-mentioned application example shown in FIG. 7 can also be applied to the KIA of the convolution integral calculation method of the present invention. A schematic diagram of the relevant parts is shown in FIG.

Image storage device -〇A, KoDB, -〇Q, 20DFi弗7
Uniform storage device 0-. ,20-, ,ko'-1e
Corresponds to ko o-, respectively. It is sufficient to consider the normalization circuit DA as a specific example of the m 1 operator J/ in FIG. 7. In this example, it is assumed that the convolution integral is calculated for a maximum of 15 x 15 coefficient matrix for an image of 512 x 512 pixels and 8 bits per pixel.

Therefore, since 24 bits are required for the final result image, 3 units - OB, CO0O1-〇D It is used in conjunction with the t i1 column.

Furthermore, a normal north time @lit is added which performs a normalization operation on 24-bit fixed-point data. The normalization calculation is performed using the alpha dust equation, the substitution τ, #, or τ in equation (6).
It is performed using σ.

As explained in detail above, the present invention is equipped with a high-speed control memory that can be rewritten for control ls, and performs image column replacement,
ljigI storage device capable of row permutation operations and high-speed product-sum operations: J! It is used to calculate the convolution integral of a two-dimensional pattern such as an image. Therefore, image input/
Rounding uses a common image storage device with the display, has good compatibility with the input device and display device, and allows the input image to be immediately processed and the calculation process to be displayed.
- It is highly flexible and relatively easy to perform togramming because all you need to do is to consider the replacement operation between sequences of great materials. It is simpler than a sum operator: In addition, differences in calculation speed, delay time, image size, etc. of the operator can all be absorbed by the method of loading the m-word string corresponding to the substitution: The present invention provides an effective method for executing unfired l1I11Fi convolution integrals at high speed.

[Brief explanation of drawings]

Fig. 1 is a schematic configuration diagram of an example of an image storage device suitable for use in the present invention, Fig. 2 is an explanatory diagram showing a uniform coordinate system, and Fig. 51 is an example of word structure of control storage. Figure 4 is a schematic configuration diagram of an example of my input device, Figure 5 is
FIG. 1N46 is a schematic configuration diagram of an example of an image display device, and FIG. 7 is a schematic configuration diagram of an example of an image processing device. FIG. 8 is a schematic diagram of a product-sum calculation unit used in the present invention, FIG. 9 is a schematic diagram of an embodiment of a convolution integral calculation device, and FIG. 10 is a schematic diagram of a second embodiment. In the figure, J, reference, j, 4Fi control storage section, /I are - health storage section, image storage device for KooFi as a whole, and #0 is product) operation unit. Figure 2 Figure 3 Kasumi No. 4 Fq Figure 5

Claims (1)

[Claims] It has an image storage area consisting of a multi-row, multi-column III search array, and selectively writes and reads pixels to each of the above 1# element storage areas corresponding to 9 addresses specified by the address estimation information. This is an image storage device that stores the addressing information in a rewritable storage unit and reads it out in synchronization with an image scanning signal.
It conversion, line substitution tII] Using at least one pair of functional image storage devices, the original image from the first image storage device and the Nakazeki Keizhu Gawei from the second image storage device on the side. product sum performance g
A superposition integral calculation method in which the sum of products is calculated at *, and the Wi vermilion is stored in the Kameji's image storage device as a new Nakaseki result image.