JPS5850100A - Measuring input excess signal transmission system - Google Patents

Measuring input excess signal transmission system

Info

Publication number
JPS5850100A
JPS5850100A JP14785881A JP14785881A JPS5850100A JP S5850100 A JPS5850100 A JP S5850100A JP 14785881 A JP14785881 A JP 14785881A JP 14785881 A JP14785881 A JP 14785881A JP S5850100 A JPS5850100 A JP S5850100A
Authority
JP
Japan
Prior art keywords
measurement
input
excessive
signal
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14785881A
Other languages
Japanese (ja)
Inventor
時任 清志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14785881A priority Critical patent/JPS5850100A/en
Publication of JPS5850100A publication Critical patent/JPS5850100A/en
Pending legal-status Critical Current

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  • Arrangements For Transmission Of Measured Signals (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は遠方監視制御装置および遠方監視装置に係わシ
、特に、アナログ計測入力をディジタル変換したのち計
測伝送するディジタル計測伝送方式に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a remote monitoring control device and a remote monitoring device, and more particularly to a digital measurement transmission method in which analog measurement input is converted into digital data and then measured and transmitted.

従来のディジタル計測における入力過大信号の伝送は、
第1図、第2図にその例を示すように計測入力の過大、
を検出した場合、精度不良との0ル条件により計測デー
タ出力書替禁止信号として計測ワード中のりラグ1ビツ
トにて伝送すると共に、A−D変換器異常として、Sv
情報中の1ピツトにて親局へ伝送し、計測異常として出
力している。
Transmission of input excessive signals in conventional digital measurement is
Excessive measurement input, examples of which are shown in Figures 1 and 2.
If detected, it is transmitted as a measurement data output rewriting prohibition signal with 1 bit of the lag in the measurement word due to the zero condition of poor accuracy, and the Sv
It is transmitted to the master station at 1 pit in the information and output as a measurement abnormality.

このため、親局で監視していた場合、計測異常の故障要
因究明が容易ではなかった。また、入力過大信号を個別
にSv情報にて伝送しようとする場合、計測入力数に対
応した87点数が必要とな987点数の増加等、整置を
生じて来る。
For this reason, when monitoring was performed at the master station, it was not easy to investigate the cause of a measurement abnormality. Furthermore, if excessive input signals are to be transmitted individually as Sv information, alignment will occur, such as an increase in the number of 987 points, which requires 87 points corresponding to the number of measurement inputs.

本発明の目的は、従来方式の問題点を解決し、伝送効率
の良い計測入力過大信号伝送方式を提供するにある。
SUMMARY OF THE INVENTION An object of the present invention is to solve the problems of conventional methods and provide a measurement input excessive signal transmission method with good transmission efficiency.

従来方式では、87点数の制約から計測入力過大信号を
も含めA−D変換器異常としてS■伝送していた次めに
前述のように整置が生じていた。
In the conventional system, due to the restriction of 87 points, the measurement input excessive signal was also transmitted as an error in the A-D converter, and then the above-mentioned alignment occurred.

本発明の特徴は、計測ワード中にアイドルビット(フラ
グ2ビツト)があることに着目し、A −D変換器にお
ける入力過大検出信号の出力をディジタル変換データの
出力と同期して行ない、前述のアイドルビットによシ計
測入力過大信号を計測データと共に伝送することにある
The feature of the present invention is to focus on the fact that there is an idle bit (2 flag bits) in the measurement word, and to output the excessive input detection signal in the A-D converter in synchronization with the output of the digital conversion data. The aim is to transmit the measurement input excessive signal along with the measurement data using the idle bit.

以下、本発明の一実施例を第3図、第4図により説明す
る。
An embodiment of the present invention will be described below with reference to FIGS. 3 and 4.

第3図においてアナログスキャナを介して取出されたA
−D入力信号6は、A−Dスタート信号8によ!1)A
−D変換回路19にてアナログ−ディジタル変換され、
A−D変換データ25として変換データ出力回路24へ
出力される。一方、計測入力をディジタル変換したのち
、人力過大が検出されると入力過大検出信号26として
、人力過大出力ゲート28へ入力される。ここで、計I
11データ走査信号22により走査され、送信データブ
ス11として出力されP−8変換器にて第4図に示す伝
送フォーマットに変換したのち、親局に向は送出される
A taken out via an analog scanner in Fig. 3
-D input signal 6 is based on A-D start signal 8! 1)A
- Analog-digital conversion is performed in the D conversion circuit 19,
The converted data is output as A-D converted data 25 to the converted data output circuit 24 . On the other hand, if excessive human power is detected after digitally converting the measurement input, it is input as an excessive input detection signal 26 to an excessive human power output gate 28 . Here, total I
11 data scanning signal 22, output as a transmission data bus 11, converted by a P-8 converter into the transmission format shown in FIG. 4, and then sent to the master station.

また、精度チェック回路23では、精度チェックタイミ
ング信号21により、基準電圧発生回路20よりの基準
電圧をA−Di換回路19にてディジタル変換したのち
A−D変換データ25として取出し精度チェックを行な
う。ここで、精度チェック不良が検出されると精度不良
検出信号27として出力され計測データ出力書替禁止信
号としてフラグ1ビツトにて親局に向は送出すると共に
、A−D変換器異常信号9として出力され、SV情報と
して親局に向は送出される。
In addition, in the accuracy check circuit 23, the reference voltage from the reference voltage generation circuit 20 is digitally converted by the A-Di conversion circuit 19 according to the accuracy check timing signal 21, and then taken out as A-D conversion data 25 and checked for accuracy. Here, when an accuracy check failure is detected, it is output as an accuracy failure detection signal 27, and is sent to the master station as a measurement data output rewriting prohibition signal with a flag of 1 bit, and as an A-D converter abnormality signal 9. The data is output and sent to the master station as SV information.

以上の様に、本実施例によればA−D精度不良のみをA
−D変換器異常としてSv情報にて伝送可能であり従来
方式の常置であった故障要因の究明も容易となる。
As described above, according to this embodiment, only A-D accuracy defects are
- It is possible to transmit Sv information as an abnormality in the D converter, and it becomes easy to investigate the cause of the failure, which was a permanent problem in the conventional system.

本発明によればSV黒点数増やすことなく、計測入力に
対応した入力過大信号の伝送が可能となり、伝送効率が
向上する。
According to the present invention, it is possible to transmit an excessive input signal corresponding to a measurement input without increasing the number of SV sunspots, and the transmission efficiency is improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、従来の装置のブロック図、第2図は、従来方
式によるA−D変換器内部ブロック図、第3図は、本発
明を適用したA−D変換器内部のブロック図、第4図は
、本発明を適用した計測データ伝送フォーマット図であ
る。 6・・・A−D入力信号、8・・・A−Dスタート信号
、9・・・A−D変換器異常信号、11・・・送信デー
タプス、19・・・A−D変換回路、20・・・基準電
圧発生回路、21・・・精度チェックタイミング信号、
22・・・計測データ走査信号、23・・・精度チェッ
ク回路、24・・・変換データ出力回路、25・・・A
−D変換データ、26・・・入力過大検出信号、27・
・・精度不良検出信号、28・・・入力過大出力ゲート
。 代理人 弁理士 高橋明禿、 第1図 ? 奈[ オ 矧 ( 第 2 図 第4 目 □才冑廣工う−人力蘇づ客贋号
FIG. 1 is a block diagram of a conventional device, FIG. 2 is an internal block diagram of a conventional A-D converter, and FIG. 3 is an internal block diagram of an A-D converter to which the present invention is applied. FIG. 4 is a diagram of a measurement data transmission format to which the present invention is applied. 6... A-D input signal, 8... A-D start signal, 9... A-D converter abnormality signal, 11... Transmission data base, 19... A-D conversion circuit, 20 ...Reference voltage generation circuit, 21...Accuracy check timing signal,
22... Measurement data scanning signal, 23... Accuracy check circuit, 24... Conversion data output circuit, 25... A
-D conversion data, 26...input excessive detection signal, 27.
...Inaccuracy detection signal, 28...Input excessive output gate. Agent: Patent attorney Akio Takahashi, Figure 1? (Figure 2, No. 4 □ Talented Hiroko - Manpower revived customer fake number)

Claims (1)

【特許請求の範囲】[Claims] 1、アナログ計測入力をディジタル変換し、計測を行な
うディジタル計測伝送方式において、計測入力をアナロ
グ−ディジタル変換したのち入力過大を検出し、A−D
変換器内に設けた入力過大信号出力回路によシ、ディジ
タル変換データの出力と同期して入力過大検出信号の出
力を行ない、伝送ワード中の任意のピットを用いて、計
測データと共に伝送することを特徴とする計測入力過大
信号伝送方式。
1. In the digital measurement transmission method that converts analog measurement input into digital and performs measurement, after converting the measurement input from analog to digital, excessive input is detected and A-D
The input excessive signal output circuit provided in the converter outputs the input excessive detection signal in synchronization with the output of the digital conversion data, and transmits it together with the measurement data using any pit in the transmission word. A measurement input excessive signal transmission method characterized by:
JP14785881A 1981-09-21 1981-09-21 Measuring input excess signal transmission system Pending JPS5850100A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14785881A JPS5850100A (en) 1981-09-21 1981-09-21 Measuring input excess signal transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14785881A JPS5850100A (en) 1981-09-21 1981-09-21 Measuring input excess signal transmission system

Publications (1)

Publication Number Publication Date
JPS5850100A true JPS5850100A (en) 1983-03-24

Family

ID=15439840

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14785881A Pending JPS5850100A (en) 1981-09-21 1981-09-21 Measuring input excess signal transmission system

Country Status (1)

Country Link
JP (1) JPS5850100A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63161864A (en) * 1986-12-24 1988-07-05 Toshiba Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63161864A (en) * 1986-12-24 1988-07-05 Toshiba Corp Semiconductor device

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