JPS584966A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To equalize the characteristics of a RAM having high capacitance by forming a charge storage region and an electrode for capacitance through a self alignment system. CONSTITUTION:A field oxide film 2 and a gate oxide film 3 are formed onto a p type Si substrate 1. n<+> Poly Si 7 is stacked through a CVD method, and coated with SiO2 14. A negative type resist mask 15 is executed and B ions are implanted and a p<+> shielding region 5 is shaped, and As ions are inplanted and the n<+> storage region 6 is formed. When the SiO2 14 is etched in the HF of five Torr at the normal temperature, only the SiO2 under the mask 15 is removed selectively through etching. The mask 15 is removed, the n<+> poly Si 7 is patterned while using the SiO2 14 as a mask, the mask 14 is taken off, and the RAM type one transistor-one capacitance memory having double electrode structure by the Poly Si is completed through a conventional method. According to this constitution, the characteristics slightly vary because positional displacement is not generated between the charge storage region and the capacitance electrode.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a method for manufacturing a semiconductor device including a memory cell having a double electrode structure made of polycrystalline silicon.

Conventionally, high capacity RAM (random access
m@mory ) In order to increase the capacitance of a 1-transistor, 1-capacitor memory cell, an impurity diffusion region is formed on the surface of the semiconductor substrate below the capacitor electrode, but this region and Since the capacitor electrodes are not formed with self-attainment, misalignment between them is likely to occur, resulting in significant variations in electrical characteristics.

1 to 8 are cross-sectional explanatory views of the main parts of the device at important points in the process to explain the conventional technology for manufacturing this type of semiconductor device.Next, please refer to these figures. I will explain.

Refer to FIG. 1. (1) A field silicon dioxide insulating film 8 is formed on the PM silicon semiconductor substrate 1 by a selective thermal oxidation method using, for example, a silicon nitride silicon disk.

(2) After removing the silicon nitride disk, etc.,
A gate insulating film 3 is formed by thermal oxidation.

Refer to FIG. 8 (3) A photoresist film 4 having a window is formed in the capacitor portion. Note that 4 shows a window.

(4) For example, by implanting boron ions, p+li! A shielding region 5 is formed.

(5) Continue to implant nu, for example, arsenic ions.
ll accumulation region 6 is formed.

Refer to Figure 3 (6) After removing the photoresist 11, chemical vapor deposition (CVD) is applied to form a 1m+ffi polycrystalline silicon film.In addition, impurities are introduced into the polycrystalline silicon. This may be done separately from the growth of polycrystalline silicon.

(7) Null polycrystalline polysilicon gold film 7 is coated to form a photoresist film 8 which will serve as a mask for forming capacitor electrodes using ordinary photolithography technology.

Refer to FIG. 6 (8) Polycrystalline electrode 7' is formed using photoresist film 8 as a mask.

Refer to FIG. 6 (9) A thermal oxidation method is applied to form an isolation insulating film 9 on the surface of the capacitor electrode 7'.

Refer to FIG. 7. (2) A 1+fi polycrystalline silicon film is grown by chemical vapor deposition and patterned by photolithography to form the gate electrode 10 of the transfer gate transistor.

Refer to FIG. 8 (b) For example, arsenic ions are implanted using an ion implantation method to form the n+ diffusion region 11 of the transfer gate transistor.

(b) A phosphosilicate glass insulating film ν is grown by chemical vapor deposition, and patterned by a conventional photo-ring-fi technique to form an electrode contact window. After this,
If necessary, heat treatment is performed to form a so-called glass 7o-2.
It's okay.

(2) Form an aluminum film using the vapor deposition method, pattern it using photolithography technology, and conduct electrode/wiring 1.
form 3.

As can be seen from the above process description, the alignment of the storage region 6 and the capacitor electrode 7' completely depends on the alignment accuracy of photolithography. Therefore, as described above, variations in characteristics are likely to occur.

The present invention enables the formation of a charge storage region of a capacitor and a capacitor electrode in a self-alignment manner by only making slight modifications to the manufacturing process. This will be described in detail below.

FIGS. 9 to 9 are explanatory cross-sectional views of main parts of a semiconductor device at key process points for explaining embodiments of the present invention, and the description will now be made with reference to these figures. Note that the present invention is characterized by the first half of the process, and the latter part is the same as the prior art described above.

Refer to FIG. 9. (1) A field silicon dioxide insulating film 2 and a silicon dioxide gate insulating film 3 are formed on a pffi silicon semiconductor substrate 1 by applying a conventional technique.

Refer to FIG. 10 (2) Grow the i-child polycrystalline silicon film 7 by chemical vapor deposition.

(3) For example, the thickness is 500 (X
) Forms s* of cricon dioxide @ 14 i.

See Figure 11 (4) Cano (7) using normal photo-phosphorography technology
A photoresist film is formed to form a photoresist region forming window tV. Incidentally, this photoresist is a negative one.

(5) Applying an ion implantation method, for example, implanting boron ions to form a p-moderate shielding region S.

(6) Subsequently, for example, arsenic ions are implanted to form an accumulation region 6 (see Figure U).
The silicon dioxide film 14 is etched in gas.

Depending on this, only the silicon dioxide film under the negative photoresist film is etched.

Although the reason why such a phenomenon occurs has not been elucidated, it is easy to illuminate it experimentally.

(8) After this, the photoresist film 15 is removed,
By using the patterned silicon dioxide film 14 as a mask, the n-decade polycrystalline silicon film 7 is patterned, and the silicon dioxide film 14 is removed to obtain the structure shown in FIG. 185. Therefore, it is difficult to obtain the finished product shown in the lia diagram by applying the prior art.

As can be seen from the above explanation, according to the present invention, high capacity RA
MIII) When manufacturing transistors, l-capacitors, and memories, charge storage regions and capacitor electrodes are self-contained.
Since they can be formed using an alignment method, no misalignment will occur between them, and therefore variations in electrical characteristics will be reduced.

[Brief explanation of the drawing]

Figures 1 to 8 show the process according to the prior art 1! 1ml of work to clarify! A sectional explanatory diagram of the main part of the cow conductor device at the location,
FIGS. 9A and 9B are explanatory diagrams of the present invention-embodiments published by Shimazusha. In the figure, l is the substrate! ii is an insulating film, 3 is a gate insulating film, 5 is a shielding region, 6 is an accumulation region, 7 is a polycrystalline silicon film, 14 is a silicon dioxide film, t is a photoresist film, and 7' is a capacitor electrode. Patent Applicant: Fujitsu Limited Patent Attorney Hisashi Gobe Tamamushi (3 others) Figure 1 Figure 2 Figure 3 Figure 4 Figure 7 Figure 9 Figure 11 Figure 12

Claims (1)

[Claims] A thin insulating film is formed on a semiconductor substrate, a silicon film is formed on it, an insulating film is further formed on that, and the underarm insulating film is a negative FFI photoresist film having a window for forming a capacitor region. Then, using the negative photoresist film as a mask, ions are implanted into the semiconductor substrate to form a charge storage region, and then the insulating material directly under the negative photoresist film is removed in hydrofluoric acid gas. 1. A method of manufacturing a semiconductor device, comprising the steps of etching and then buttering the silicon film using the insulating film left in the window as a mask to form a capacitor electrode.