JPS5848822A - Photometric circuit provided with latch unlocking circuit - Google Patents

Abstract

PURPOSE:To simply release charge accumulation generated in a photodiode by making neutral current flow into a connecting point between the photodiode and a diode for logarithmic convertion for a prescribed period. CONSTITUTION:A photometric circuit is provided with a latch unlocking circuit. By closing an electric power switch SW1, for example, positive charge on the cathode side of a photodiode PD is discharged as the charging current for a capacitor C1 through a diode D3, a resistor R2 and a diode D1. Consequently the diode D3 is biased by the difference between the charging voltage of the capacitor C1 and the reference voltage of an operational amplifier A2. The charge of the photodiode PD is discharged by the diode D3. Thus, latch unlocking operation kept stably up to low illumination can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a photometric circuit having a latch release circuit for a camera or the like.

In the conventional measurement circuit, as shown in Figure 1, the light-receiving photodiode is used as a high-input impedance amplifier: All amplifiers are used, and both ends of the photodiode are imaginary shorted, and the current generated in the photodiode is converted logarithmically. It is used by converting it into a logarithmically compressed voltage by passing it through a diode. Compared to the method that uses an open circuit voltage that is logarithmically converted according to the light intensity generated at both ends of the photodiode under normal usage conditions, this method has a lower responsiveness of the output voltage to changes in light intensity. It is often used because it is good. However, due to problems such as noise generated when the circuit is powered on and stabilization time for the operational amplifier's power supply voltage to rise, a reverse charge is generated at the connection point between the photodiode and the logarithmic conversion diode, which has a very high input impedance. The accumulation of the voltage caused the latch to occur, and because it did not release for a long time, it took a long time to obtain a normal photometric voltage.

Such a latching phenomenon will be explained using the conventional photometric circuit shown in FIG. Turn on EB with the power supply and SWl with the power switch.
Then there were 11 operational amplifiers A! , and the exposure meter circuit 1. In the photodiode PD connected between the input terminals of the operational amplifier A, an original current IL is generated in the direction of the arrow in accordance with the illuminance on the photodiode surface. operational amplifier A,
is an operational amplifier with high input impedance, and the i current ■L
is connected to the pair P1. by the logarithmic conversion diode D1 connected between the negative input terminal and the output terminal of the operational amplifier A. The converted voltage is outputted to the output of the operational amplifier A1 with low impedance and transmitted to the exposure meter circuit 1. The reference bias power supply Eo, which is connected to the positive input terminal of the operational amplifier A2 and the negative line of the power supply, has its reference voltage amplified in phase by the operational amplifier A2 to set the reference potential of the output of the operational amplifier A1, and also serves as a reference bias power supply. E.

The voltage is transmitted to the exposure meter circuit 1 as a reference bias voltage in order to perform necessary arithmetic processing. This reference bias voltage is determined by the resistance values of resistors R6 and R11' connected to the output side of operational amplifier A2. Operational amplifier A
The reason why the potential at the connection point between the positive input side of the exposure meter circuit 1 and the anode side of the photodiode PD is set higher than the negative line voltage of the power supply EB by the operational amplifier A2 is due to the necessity of calculation processing of the exposure meter circuit 1. This is not only for the purpose of canceling the latch to some extent as mentioned above, but also for diode 1' D connected in parallel to the logarithmic conversion diode D1.

When the power switch SWI is turned ON, the operational amplifier A1 does not operate normally at time zero, but always has a transient unstable period of finite time. During this unstable period, the photodiode PD cannot be imaginal shorted, so the output of operational amplifier A is uncertain, and the normal output error of operational amplifier A, which is the specific output, becomes high transiently. . Therefore, the logarithmic conversion diode Dak
A current flows through the photodiode PD, and charge is accumulated in the junction capacitance of the photodiode PD, which causes positive charge to be accumulated on the cathode side of the photodiode PD. Such charges are also accumulated in the chattering noise of the power switch SW through the stray capacitance of the ERI circuit.

When the unstable period of operational amplifier A ends, operational amplifier A
, tries to control the photodiode PD by imaginal short circuit, but when the light-receiving surface illuminance becomes sufficiently large, the accumulated charge mentioned above is immediately neutralized by the source current, so a normal output is immediately output to the operational amplifier A1 output. can get.

When the light receiving surface becomes very low, the photocurrent decreases to several tens of PA.
~ several PI, and in such a state, it takes a long time to return to the normal state by neutralizing the photocurrent IL itself. In that case, diode D serves to quickly return to a certain point. That is, as positive charges accumulate on the cathode side of the photodiode PD, the negative input side of the operational amplifier A1 becomes a more positive potential than the positive input side, and therefore the operational amplifier A1
The output of D falls to the negative line side of the power supply, and the diode D is forward biased to discharge the accumulated IHr load mentioned above. The reason for applying a positive potential to the positive input terminal of operational amplifier A1 from the negative line side of the power supply by operational amplifier A2 is that when the operating power supply of operational amplifier A1 is a single power supply system as shown in Fig. 1, operational amplifier A, output The lowest potential of the diode D2 does not fall below the negative line of the power supply EB, and when the potential of the operational amplifier A1 output becomes approximately equal to the voltage of the negative line, at least the diode D2 k is sufficiently forward biased and accumulated. This is to enable electric charge to be discharged. As above, diode D
.

The accumulated charge is discharged, but when the charge is neutralized to a certain extent by the diode D, the output of the operational amplifier A1 gradually rises, and the output of the diodes D and Fi increases.
Since it has logarithmic characteristics, the forward voltage decreases and the resistance is isometrically very high. Therefore, in such a state, no further neutralizing operation can be expected, and it will take a long time for complete neutralization to return to the normal state. If it is long, it ranges from several 100 m5ec to several maximum.

In order to avoid such a situation, there is a method of shorting both ends of the photodiode with a transistor during the unstable period of operational amplifier A1, but rapid potential fluctuations during switching of the transistor are transmitted as noise via stray capacitance. It may cause re-latching, which is not only ineffective but also harmful. There is also a method of releasing the latch by generating a neutralizing current using an LED or the like during the unstable period, but this method is large-scale and costly, and causes undesirable situations such as an increase in power consumption.

SUMMARY OF THE INVENTION An object of the present invention is to more effectively solve the problem of charge accumulation occurring in a photodiode due to the above-mentioned transient unstable state of an operational amplifier in a photometric circuit with a simple circuit.

Embodiments of the present invention will be described below with reference to FIGS. 2 to 5.

FIG. 2 shows a photometric device including a latch release circuit according to a first embodiment of the present invention. Circuit elements having the same operation as in FIG. 1 are given the same symbols. What is different from Fig. 1 is the diode D3.
A series circuit of resistors R1 and R1 is connected in parallel to the photodiode PD, and a capacitor C1 is connected from the connection point of resistors R1 and R6 to the negative line. Its operation is as follows.

When the power switch SW1 is open, the charge in the capacitor C0 is discharged through the resistor R3 and the resistors R6 and R8' between the output of the operational amplifier A2 and the negative line of the power supply Es, and when the power switch SW1 is turned on, the charge in the capacitor C2 is discharged. It is assumed that there is no such thing.

When power switch SW1 is closed, operational amplifiers A, , A
, its operation is generally several tens of microns (6) to several hundred
After a period of transient instability of μDai, it becomes normal. However, the output of operational amplifier A is still not normal. It is the charging current of the capacitor CI added in this embodiment and i
- diode D11, resistor R8 and diode D,
This is because a current flows in the direction of drawing out the positive charge on the cathode side of the photodiode PD through the photodiode PD, and the voltage on the input side of the operational amplifier A1 changes, and therefore the output voltage changes. The capacitor C8 is also charged through the resistor R1f, but the voltage of the capacitor C1 is connected to the resistors R2 and R
As charging progresses and rises through diode Dsk, the current flowing through diode Dsk decreases smoothly, and capacitor C
When the rising charge twwL voltage of I reaches a voltage approximately 0.2 V lower than the operational amplifier A2 output voltage, the diode D,
The voltage applied in the forward direction of R is insufficient as a forward bias, and the equivalent resistance suddenly becomes very high.However, in comparison, the resistance value of resistor R does not change, so its resistance value suddenly changes. Since the resistance of the diode D is relatively small compared to the resistance of the diode D, which has become high, the charging of the capacitor C3 by the resistance R1 (11) becomes dominant.

Therefore, it becomes stable at the same potential as the output of operational amplifier A.

The voltage of capacitor C, is operational amplifier A! When the potential becomes the same as the output voltage of the operational amplifier A, at this time, the operational amplifier A is operating normally, so there is an immanent short between the positive and negative inputs, and the potential difference is the number m of the offset voltage of the operational amplifier A.
In that region, the same voltage is applied across the diode D8, but the current flowing at that time is the photocurrent It.
The diode D is small enough to be considered as substantially zero compared to the diode D.

The influence of photometry due to the connection of the photocurrent is several PA.
Even if it gets to a certain extent, it's not a problem.

The shortest recovery value can be obtained by appropriately selecting the capacitor C1, resistor R+, and R@k. The resistor R1 is provided to prevent excessive current from flowing, and the same effect can be obtained even without it. In this case, diode D may be omitted. In the circuit of this example,
A diode (1) that discharges the charge of the photodiode PD
2) D is the optical mWL pressure of capacitor C1 and operational amplifier A2
It is biased by the difference from the reference voltage which is the output of operational amplifier A, that is, the output potential of photodiode PD
Since it is not related to the discharge state of the photodiode PD
Unnecessary accumulated charges can be reliably removed.

FIG. M3 shows a second embodiment, and this second embodiment 91 is applied to an electronic shutter camera and is a Mu example. The same circuit elements as in FIG. The transistor Q1 inserted in the switch is turned ON to supply power to the circuit of this embodiment.On the other hand, the transistor Q1 remains ON for a predetermined time when the charging current of the capacitor C is not generated even when the switch SW is 1OFF. 8 W+' is generally linked to the camera's shutter button, and is turned on at a position shallower than the camera release stroke.

By turning on transistor Q1, operational amplifiers A, , A
, will be in a normal operating state after several tens of microns to several hundred microns (6). A resistor R connected in series between the positive and negative lines of the power supply,
and Zener diode ZD, and the junction voltage of and operational amplifier A.

The voltage of the capacitor C1 is such that the voltage on the capacitor C1 is charged so that the resistor R6 side is positive and the resistor R side is negative. At this time, the transistor Q is set so that the voltage charged to the capacitor C8 via the resistor R1 is low and is still OFF. After several m5ec, the charging tm pressure of capacitor C8 via resistor R4k becomes transistor Q.

1ONl, the connection point on the resistor R3 side of the capacitor C4 is clamped to the potential of the negative line of the power supply. Therefore, at that moment, the potential on the connection point side of the resistors R, , R, of the capacitor C4 falls further to the negative side than the potential on the negative line side of the power supply. This negative voltage causes the diode D to be forward-biased via the resistor R2 as described above, ensuring that all the positive charges accumulated in the operational amplifier A on the cathode side of the photodiode PD during the unstable state are discharged. Thereafter, the potential of capacitor C1 changes smoothly as described above, and the resistors R1 and R of capacitor C1
The connection side of No. 2 is operational amplifier A, and stops when the specific output is at the same potential. Therefore, operational amplifier A.

The output immediately becomes a voltage according to the photocurrent IL.

Switch 8W2 is the release and is turned on with the final stroke of the camera's shutter button. The shirt button is pressed rapidly and switch 8 W l', SW! Even if they turn on almost simultaneously, transistors Q and
is transistor Q.

is ONL, and is OFF immediately after the power supply voltage is applied to the circuit.
After a predetermined time by the resistor R6 and the capacitor CI, that is, after the operational amplifier A1 is unlatched, the transistor Q is turned on, and the ON state of the switch 8W is transmitted to the exposure control circuit 2 and the release M g + is turned on. When the current is applied, a known camera mechanical operation 'f knee exposure control sequence is started, and the shutter control M g t becomes (1
5) Operate to control the shutter. The transistor Q2 is controlled by the control circuit 2 to be in an ON state from the time the camera is released until the shutter closes and the exposure operation ends, and remains a transistor even if the switches sw and ' are turned off during exposure. When 1 is OFF, the shutter closes and the housing does not open.

In the embodiment shown in Fig. 3, the difference between this embodiment and Fig. 2 is 1.
In the case of figure g2, it is operational amplifier A that forward biases diode D3 at the initial stage of energization.

Since the output voltage of operational amplifier A2 must be higher than the forward voltage of diode D3, in the case of Figure 3, the connection point between capacitor C4 and resistors t and l is further away from the negative line of the power supply. Operational amplifier A because it goes negative.

It is possible to forward bias the diode D3 even if the output voltage of the diode D is lower than the forward voltage of the diode D, and the output voltage of the operational amplifier A2 can be set to zero, that is, the positive input side of the operational amplifier A and the 7 of the photodiode PD. Even if the connection point (16) between the node and the resistor R1 is grounded, the diode D3Fi can be forward biased and the latched state of the operational amplifier A can be rapidly released. The purpose of the Zener diode ZD is to keep the charging voltage constant at the initial stage of energization and to always maintain the same state even if the power supply voltage fluctuates.

FIG. 4 shows a third embodiment. Circuit elements that are the same as those in the second embodiment of FIG. 3 are given the same symbols. In the second embodiment, the capacitor C4 is charged once at the beginning of energization, and the diode D is not forward biased at that time, but is forward biased after a predetermined time determined by the resistor R1 and the capacitor C3. In the third real M example, transistor Q1 is OFF
Capacitor C6 is connected to resistors R8, R1, and operational amplifier A! to provide forward bias to diode D when The resistance between the output of and the negative line of the power supply Ro% R
6'. switch s w,'
is turned on and transistor Q+ is turned on, and synchronously, transistor Q is turned on by bias through resistor R7, and the terminal of resistor R8 of capacitor C6 becomes a negative line potential, which is the connection point of capacitor C0 and resistors R, RR. becomes a more negative potential than the negative line side of the power supply, and the diode D is forward biased and performs the same operation as described above.

Diode D4 remains a diode D even if the voltage of the power supply En fluctuates.

This is to keep the degree of forward bias constant. That is, when the transistor Q is ONI, and the potential at the connection point between the resistors R1 and R1 of the capacitor C6 becomes more negative than the negative line, the magnitude of the negative potential is increased by the diode D4 to the forward voltage of the diode D. Since it is clamped to a constant value, a constant forward bias is applied to diode D regardless of fluctuations in the power supply voltage. Other operations are the same as in the second embodiment.

FIG. 5 shows a fourth embodiment. In this case, the method of logarithmic compression of the photocurrent is different. In the embodiment 1.2.3, the logarithmic conversion diode D, is connected between the negative input and the output side of the operational amplifier A1, but in the fourth embodiment, the logarithmic conversion diode D, is connected between the positive input side and the output side of the operational amplifier A1. A logarithmic conversion diode D11 is connected between the power supply and the negative line side. In this case, latching occurs because negative charge accumulates on the 7th note side of the photodiode PD during the unstable period of the operational amplifier A at the initial stage of energization, as described above. Turn on switch sw1
Then, immediately after energization, there is no charge in the capacitor c 1G, so a voltage determined by the Zener diode zD2 is generated at the connection point of the resistor R1 (1s RII, R12, and the voltage is in the order of the diodes D Ha , D , , The diode D1o is chosen higher than the directional voltage.
is forward biased to neutralize the negative charge on the 7th node side of diode D11. As time passes, capacitor C
IO is photovoltaic and therefore the resistance RIll, R11%
The potential at the connection point of R12 decreases, the forward current of diode Dlo decreases smoothly, and when capacitor 010 completes charging, the potential at the connection point of resistor R10% (19) of R11 and RH becomes the same potential as the negative line side of the power supply. become. At this time, diode D. is completely reverse biased and does not cast a shadow 41 on the Oki one-element circuit. The photocurrent I in the diode D,1
Since L flows in the forward direction, a logarithmically compressed voltage is generated across it, which is transmitted to other circuits at low impedance by amplifier A1. Transistor Q ro is connected to resistor R98 and capacitor CI after switch SW1 is turned on.
It is designed to turn on after a predetermined time by I, that is, when charging of capacitor 010 is almost completed, and resistor R
Even if the connection point of IO1R11 and Rtt is short-circuited and there is a voltage change during power supply operation due to a sudden load change to the power supply EB due to the energization control of the shutter control Mg, the resistor R
10% This is to reduce potential fluctuations at the connection point between R11 and Rtt.

As described above, according to the present invention, in the photometry circuit that logarithmically converts the photocurrent of the photodiode using a high impedance operational amplifier and a logarithmic conversion diode, logarithmic conversion (20) is performed at the initial stage of energization at the connection point between the diode and the photodiode. It is possible to quickly neutralize the latch caused by the charge accumulated at the high impedance point of the latching, and the rise characteristic of the logarithmically converted output can respond quickly even at low brightness #i. Furthermore, if the neutralizing current is made to decrease smoothly over time, no noise will be generated compared to a method in which the neutralizing current is switched, so that a stable latch release operation can be obtained even at very low brightness.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a conventional '6111 device. FIG. 2 is a circuit diagram of an exposure device including a first embodiment of a photometric circuit with a latch release circuit according to the present invention. FIG. 3 is a circuit diagram of an electronic shutter camera including a second embodiment of a photometric circuit with a latch release circuit according to the present invention. FIG. 4 is a circuit diagram of an electronic shutter camera including a third embodiment of a photometric circuit with a latch release circuit 12i according to the present invention. FIG. 5 is a photometric circuit diagram having a latch release circuit according to the present invention. [Explanation of symbols of main parts] Operational amplifier ・・・・・・・・・・・・・・・・・・
...A1 Photodiode for light reception...PD Logarithmic conversion diode...D1 Unidirectional element for discharge...D3 Bias point potential setting circuit...C ,,R, (Figure 2) C6, R1, R4, QB
(Figure 3) Ca s R1, R@, Q! (Figure 4) CIo 1i
t,, (Fig. 5)

Claims (1)

[Claims] 1. an operational amplifier, a photodiode connected in an immanent short state between the positive and negative input terminals of the operational amplifier, a logarithmic conversion diode connected to the photodiode, and a logarithmic conversion diode connected to the photodiode; From the start of energization from the power supply to the photometric circuit to the connection point of one input terminal, one electrode of the photodiode, and one electrode of the logarithmic conversion diode,
A photometric circuit comprising a latch release circuit that allows a neutralizing current to flow during a constant period of 7r. 2. In the photometric circuit according to claim 1, the latch release circuit includes a semiconductor unidirectional element for discharge, in which one electrode is connected to the connection point and the other electrode is connected to the bias point, and The unidirectional discharge element is biased in the forward direction, which decreases over time, for a predetermined period from the start of the process ↑, and after the end of the predetermined period, the unidirectional discharge element is biased to the connection point. and a bias point potential setting circuit that sets the potential of the bias point so as to apply a bias to the discharge unidirectional element to cut off the voltage between the bias point and the bias point. 3. In the 6111 element circuit according to claim 2, the bias point potential setting circuit sets the potential f of the other input terminal of the operational amplifier with respect to the potential of one terminal of the power supply:
A reference potential setting circuit that sets the reference potential high by a predetermined amount, and a capacitor that is connected between one terminal of the power source and the bias point and that is charged via the unidirectional element from the start of energization. Features a photometric circuit. 4. In the photometric circuit according to claim 2, the bias point potential setting circuit includes a capacitor connected between terminals of the power source to be charged before the start of energization; and a switching circuit that forms a discharge path through the bias point with a polarity that applies a direct bias to the unidirectional water droplet for discharging the capacitor when current is started. . 5.% Permissible In the photometric circuit according to claim 2, the front d bias point potential setting circuit includes the unidirectional element whose other electrode is connected to one terminal of the power source, and the other electrode of the power source. The terminal is connected between the terminal and the bias point MiJ, and is charged for the predetermined period from the start of the current supply to give a forward bias to the unidirectional water, and after the predetermined period has passed, the unidirectional water has completed 9m and the A photometric circuit characterized by including a capacitor that provides a reverse bias to a directional element.