JPS584859B2 - Digital Pulse - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a repeater that regenerates and repeats simple pulse width modulated signals in digital transmission using coaxial cables, optical fiber cables, or carrier waves.

Conventionally, pulse width modulation repeaters, which are required to transmit n-value (n≧3) information, require a pulse generator that generates (n-1) different pulse widths to correspond to the input signal of the repeater. A circuit was used to generate signals with different pulse widths.

Fluctuations in the width of the pulses generated by these pulse generators degrade transmission quality.

Therefore, in order to suppress the pulse width to a specified value, the pulse generator required many adjustments, a complex circuit configuration, and as many as (n-1) pulse generators.

As a result, the cost of the repeater was high, and its reliability was low.

In order to eliminate these drawbacks, the present invention simplifies the pulse generator by integrating the pulse width generation mechanism of the repeater into one.

That is, according to the present invention, an n-value digital multivalue signal is
Each of these is identified by one discriminator, at least n-2 of these discriminators delay their outputs by an appropriate time, and the logical sum of each output of these n-1 discriminators is calculated. , the bistable circuit is set by one of this output and the clock signal obtained from the timing extraction circuit, and the bistable circuit is reset by the other.

Embodiments of the pulse width modulation repeater according to the present invention will be described below with reference to the drawings.

To simplify the explanation, three-value transmission will be described.

Figure 1 shows the case where the present invention is applied to optical transmission, where the transmitted code "0" is no signal, and the code "1" is the pulse width τ1.
It is assumed that the signal "2" corresponds to a signal with a pulse width τ2.

Now assume that the output optical pulse 14 sent out from the light emitting element 13, such as a semiconductor laser or a light emitting diode, which is the output stage of the repeater, is an optical signal as shown in FIG. 2G.

The pulse repetition period T of this optical pulse 14 is given by the reciprocal of the clock frequency f, and is defined so that the falling points of the pulses are the same.

This optical signal 14 undergoes attenuation and waveform distortion while propagating through an optical fiber or space, and reaches the photodiode 2, which is the input stage of the next repeater, as an input optical signal 1.

One end of the photodiode 2 is connected to a bias power supply VB, and the other end is grounded through a load resistor 16.

The electrical signal photo-electrically converted by the photodiode 2 is given to the amplifier 3 through the load 16, and its amplified output is shaped by the waveform shaping circuit 4, and then divided into two discriminators 6a and 6b at the optimum threshold voltage. A pulse is identified.

The clock for determining the discrimination time points of the discriminators 6a and 6b is used because a stable extracted timing wave with less jitter can be obtained by branching the output of the amplifier 3 and passing it through the timing extraction circuit 5.

As the timing extraction circuit 5, a conventional single-tuned circuit, a phase-pull oscillator, or the like can be used.

Trigger pulse generators 7a and 7b are driven by the clock of circuit 5 in accordance with the outputs of these discriminators 6a and 6b, respectively.

The electrical signals applied to the discriminators 6a and 6b are band-limited by the amplifier 3 and the waveform shaping circuit 4, and have a waveform having an amplitude corresponding to the pulse width, for example, as shown in FIG. 2A, which has undergone amplitude modulation. become.

In the discriminator 6a, a threshold value is provided at an intermediate level l1 between the "0" level and the peak value of the level corresponding to the code "1".

Therefore, when the codes "1" and "2" are being sent, they are recognized by the identification regenerator 6a by the clock of the circuit 5, and the pulse generator 7a generates the pulse shown in FIG. 2B.

In the discriminator 6b, a threshold value is set at a level l2 intermediate between the peak value of the level corresponding to the code "1" and the peak value of the level corresponding to the code "2".

Therefore, only when the code "2" is sent, the pulse shown in FIG. 2C is generated from the pulse generator 7b by the clock of the circuit 5 and the output from the discriminator 6b.

The respective outputs of the discriminators 6a and 6b are logically summed with each other after being shifted by a fixed period of time, and a set/reset type flip-flop 11 is set by the output.

That is, the output pulses of the discriminators 6a and 6b are supplied to trigger pulse generators 7a and 7b, respectively.

These trigger pulse generators can be easily constructed using, for example, differentiating circuits or simple logic circuits.

The output of the trigger pulse generator 7a is sent to the delay circuit 8.
Pulse width τ1 with code “1” and pulse width τ with code “2”
It is delayed by the difference ΔT from 2, resulting in the pulse shown in FIG. 2D.

This pulse is logically summed with the output pulse of the trigger pulse generator 7b in the circuit 9, and the output pulse becomes as shown in FIG. 2E, thereby setting the flip-flop 11.

This flip-flop 11 is reset by the clock from the circuit 5 delayed by the delay circuit 10.

The amount of delay of the delay circuit 10 is selected so that the pulse width τ2 of code "2" is obtained between the rising edge of the trigger pulse generator 7b and the rising edge of the reset pulse immediately thereafter, as shown in FIG. 2F. .

Therefore, the output of flip-flop 11 becomes as shown in FIG. 2G.

This output electrical signal is amplified by an amplifier 12 and supplied to a light emitting element 13.

From this, the output light pulse 14 is emitted again.

Therefore, when an output pulse is obtained from the discriminator 6b, the flip-flop 11 is set by the rise of the trigger pulse (FIG. 2C), and the delay circuit 8 obtained immediately thereafter is set.
The flip-flop 11 does not operate depending on the output pulse (FIG. 2D), and the immediately following reset pulse (FIG. 2F)
) is reset by the rising edge of τ, and a pulse with a width τ2 corresponding to the code “2” is obtained.

When an output is not obtained from the discriminator 6b but an output is obtained from the discriminator 6a, the output pulse of the delay circuit 8 (FIG. 2D)
) rises, flip-flop 11 is set,
Immediately after that, the pulse is reset by a reset pulse (FIG. 2E), and a pulse having a width τ1 corresponding to the symbol "l" is obtained.

In this way, the pulse width modulation signal is identified and reproduced.

In the above explanation, the case where the output waveform of the waveform shaping circuit 4 has been subjected to amplitude modulation has been explained, but if the output waveform has been subjected to pulse width modulation, the discriminator 6
It is only necessary to set the threshold values of a and 6b to be almost the same and to select the respective optimal identification time points according to the difference between τ1 and τ2, and the other operations and effects are the same.

Furthermore, in the above explanation, a case has been described in which a pulse width modulated signal with the same pulse falling point in each clock cycle is relayed, but the case where a pulse width modulated signal with the pulse rising point the same in each clock period is relayed is also explained. It can be configured in a similar manner.

Furthermore, the present invention can also be applied to relaying multivalued pulse width modulation signals of three or more values.

In FIG. 1, the flip-flop 11 may be set by the output of the delay circuit 10, and the flip-flop 11 may be reset by the output of the OR circuit 9.

As explained above, in the present invention, the pulse width of the pulse that determines the rise of the signal pulse is not required to be suppressed to a particularly strict value, and only the time position thereof needs to be made highly accurate by the delay circuit 8. Does not require a high-grade pulse generator.

Furthermore, a stable clock is used as a pulse that determines the fall of a signal pulse, and the reference for the rise is also determined by the identification pulse obtained from the clock, resulting in an output with the correct pulse width.

Therefore, since the circuit configuration can be easily adjusted, there is an advantage that a simple pulse width modulation repeater can be constructed.

[Brief explanation of the drawing]

冫 FIG. 1 is a block diagram showing an embodiment of a pulse width modulation repeater according to the present invention, and FIG. 2 is a time chart for explaining its operation. 1: Optical input signal, 2: Photodiode, 4: Waveform shaping circuit, 5: Timing wave extraction circuit, 6a,; 6b: Discriminator, 7a+7b: Trigger pulse generator, 8, 10: Delay circuit, 9: OR Circuit, 11: Set/reset flip-flop, 13: Light emitting element, 14: Optical output signal.

Claims (1)

[Claims] 1 a timing extraction circuit which is supplied with an n-value (n is a positive integer of 3 or more) digital multi-value pulse width modulation input signal and extracts the timing thereof to obtain a clock signal; n-1 discriminators for identifying digital multilevel pulse width modulation input signals, and n-1 discriminators for obtaining trigger pulses when the outputs of the respective discriminators are present using the rising or falling edge of the clock signal.
one trigger pulse generator; means for sequentially and relatively shifting the outputs of these trigger pulses by a predetermined time; a circuit for calculating the logical sum of these relatively shifted trigger pulses; a bistable circuit set by one of said OR outputs and reset by the other.