JPS5845849B2 - electronic circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic circuit useful for use in a noise reduction system, and more particularly to an electronic circuit that controls gain and frequency characteristics using a control signal.

Noise reduction systems have complex circuit configurations, and simplification is desired.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an electronic circuit that is particularly effective in simplifying the characteristic switching structure and obtaining high-quality signals in noise reduction systems and the like.

Embodiments of the present invention will be described below with reference to FIGS. 1 to 17.

First, the noise reduction system will be explained in order starting from FIG.

In other words, transmission systems that handle high quality sound (including recording and playback systems)
When a noise reduction system is applied to a system, if the S/N improvement of the system is not very good, the modulation of the noise level is not so noticeable.

However, in a noise reduction system with good S/N improvement, modulation of the noise level cannot be ignored.

Particularly when applied to a transmission system with a poor S/N ratio, modulation of the noise level becomes noticeable and may cause practical problems depending on the sound source.

This will be explained with reference to FIG. 2, using the conventional noise reduction system with excellent S/N improvement shown in FIG. 1 as an example.

The system shown in Figure 1 is a recording medium 1 such as a tape recorder.
An encoder 2 used during recording is provided on the input side of the signal as a means for compressing the dynamic range of the signal, and a decoder 1 used during playback is provided on the output side as a means for expanding the compressed signal to the original dynamic range. This is a system that reduces noise.

The VCA (voltage control amplifier) 21 of the encoder 2 and the VCA 31 of the decoder 3 function as a kind of multiplier, and when a DC level E is applied to the input signal ei, an output signal e is generated.

is e = E±I X e・ I becomes.

Here, the exponent of E becomes a negative sign especially during encoding, and becomes a positive sign during decoding.

Furthermore, the level sensor 22 of the encoder 2 and the level sensor 32 of the decoder 3 detect signal levels, and send out a DC level E corresponding to the level of the input signal e.

Therefore, when the signal 6i1 is given to the encoder 2, the output signal (input to the recording medium 1) eol is eol:E0
1×eil.

Looking at the level of the signal expressed by this equation, we get: When decoding, the level change of the signal is expanded twice on a log scale.

FIG. 2 is an operational characteristic diagram of the noise reduction system.

The compression operation of encoder 2 that operates during recording follows straight line A.

Therefore, for example, an input signal of -1-20 dB is +10 dB.
The peak margin is improved because the signal is recorded while being held in place.

Also, for example, an input signal of -60 dB becomes -30 dB, so the dynamic range of the input signal as a whole is compressed in half and recorded.

The expansion operation of the decoder 3 that operates during playback follows straight line B.

Therefore, the signal recorded on the recording medium 1 at +10 dB is restored to +20 dB.

Also, the signal that was recorded at -30dB is now -60dB again.
However, at the same time, the noise is also reduced by 30 dB, so that for the -60 dB signal input to the encoder 2, the S/N is improved by 30 dB at the output of the encoder.

Therefore, the S/N of this noise reduction system is
The degree of improvement can generally be expressed as 1/2X (input signal level (dB)).

However, this system has an S/R of as much as 50 dB for an input signal of, for example, -100 dB.
N improvement was obtained and the noise was almost inaudible, whereas O
For an input signal of dB, the S/N improvement degree is OdB, so that the noise is modulated according to changes in the volume level of the sound source.

With many sound sources, the noise becomes inaudible due to the masking effect when the volume is high, so the noise modulation described above is not a practical problem. However, in the case of a sound source with a relatively simple harmonic structure, such as a piano solo, the noise is masked. I can barely hear it.

Moreover, in this case, the level of the noise changes with the rhythm of the sound source, so if the degree of change is large, the auditory sense is more sensitive than if the same level of noise is constantly heard. This appears as a drawback in that the extent to which it stimulates the conscious level of people is too large.

The configuration shown in FIG. 3 is known as one method for making this defect less noticeable.

This uses the de-emphasis circuit 33 having the characteristic shown in FIG. 4b to lower the gain of the band containing a lot of high-frequency noise on the recording medium 1, thereby making the noise itself difficult to hear.

Since the insertion of this de-emphasis circuit also attenuates the high frequency range of musical tones, it is necessary to insert a pre-emphasis circuit 23 having the characteristics shown in FIG. 4A, which is inversely functional to this during encoding.

If the high frequency range is increased during encoding in this way, the peak margin for the saturation level of the recording medium will become smaller, increasing the possibility that the high frequency range will be distorted. Weighting circuits 24 and 34 having the characteristics shown in FIG. 4C are used.

However, even with these measures, when used in a recording medium with a high noise level, low saturation level, and narrow band, such as a small cassette tape recorder, or a sound source with a simple spectral structure, the noise modulation may be affected. Not only is it noticeable, but if the level is high with a sound source that covers the entire spectrum, the high frequency will be saturated and the high frequency will not be reproduced, resulting in a poor clarity.
You can only obtain playback sound with little spread.

FIG. 5 shows an example of recording/playback frequency characteristics of a general cassette tape recorder.

It can be seen that the higher the level is, the worse the high frequency characteristics become.

That is, even if a musical tone is not encoded, if it is recorded at a high level, the high frequency range will not be reproduced, resulting in a deterioration in sound quality, but when an encoded signal with an emphasis on the high frequency range is recorded, this deterioration is even more significant.

FIG. 6 shows an example of the configuration of a noise reduction system that improves these.

Level sensor 22゜32, weighting circuit 24, 3
4. The intermediate transmission medium (or recording medium) 1 is the same as in FIG.

The output signals of the level sensors 22 and 32 are sent to the control amplifier 25.
．． 35, and simultaneously controls its amplification degree and frequency characteristics.

The control amplifier 25 used in the encoder has, for example, the characteristics shown in FIG.

That is, when the control voltage Ve is O, the gain is OdB and the frequency characteristic is flat.

When the control voltage is negative, the gain becomes smaller and the high range is further lowered, and when the control voltage is positive, the gain becomes larger and the high range is raised.

The control amplifier 35 used in the decoder has a transfer function that is approximately the inverse of the transfer function of the control amplifier 25 used in the encoder.

If the output of the level sensor is configured as shown in Fig. 6 so that it becomes a low potential as the input level increases and a high potential as the input level decreases, when the input signal ■i is given to the encoder 2, the level When is small, the level is amplified by the control amplifier and the high range is emphasized.

When this signal is added with noise by the transmission medium 1 and given to the decoder 3, which has a transmission function that is approximately the inverse of the encoder, the level is lowered by the control amplifier, and the high frequency is lowered, thereby lowering the noise level. This is the same operation as the conventional example, but by increasing the amount of high-frequency emphasis sufficiently, the degree of noise compression increases, and the modulation of the noise can be made less perceptible to the ears.

Furthermore, when the input level is high, the level is attenuated by the control amplifier to increase the peak margin, as in the conventional example, but by weakening the high frequency range, the peak margin in the high frequency range becomes even larger.

Needless to say, the weakening of the high frequencies is compensated for during decoding.

The control amplifier used in the encoder of FIG. 7 is Vc=O
When , the frequency characteristic becomes flat, and with this as the boundary,
We have described an example in which the high frequency range changes from being emphasized to being attenuated when Vc changes from positive to negative, but it is not necessarily limited to this characteristic, and when Vc changes and the degree of amplification changes, the amplification changes. Any method may be used as long as the amount of high-frequency emphasis is made smaller when the amplification degree is small compared to when the amplification degree is large.

A diagram explaining the principle of a control amplifier for realizing this is shown below.

FIG. 8 shows an example of the control amplifier 25 used in the encoder, which includes a voltage control amplifier (hereinafter referred to as VCA) 81, an inverting amplifier 82, a bypass filter 83, and a high frequency emphasis circuit 85.

The VCA 81 is an amplifier with flat frequency characteristics whose amplification degree A is controlled by a control signal Vc.

This output and the output of the inverting amplifier 82 are added to the signal passed through the bypass filter 41 by an adder 84, and this is added to an emphasis circuit 85.

If the transfer function between ■11 and ■o1 is He(- It becomes a relationship.

However, ω: Angular frequency C - Value of the capacitor of the bypass filter r Value of the resistor of the bypass filter The amplitude characteristics in the range A≧1 are illustrated in FIG. 9.

When the output of the adder 84 is applied to the high-frequency emphasis circuit 85, the characteristics shown in FIG. The amount of emphasis in the high range becomes smaller than when it is large.

The principle configuration diagram of the control amplifier 35 used for decoding is shown in the first diagram.
Shown in Figure 1.

The amplitude characteristic for A>1 is shown in FIG. 12.

The characteristics between the output and input of the high-frequency de-emphasis circuit 105, which have an inverse functional relationship with the high-frequency emphasis circuit 85, are as follows:
It will look like Figure 13.

Incidentally, the input/output signals of each block shown in FIGS. 8 and 11 are considered as voltages.

In other words, the input impedance of each block is ω, and the output impedance is 0. Also, if the VCA is of a type that controls the signal current using a control voltage, a part that converts the current to voltage is required, which is relatively complicated. It becomes the composition.

This improved noise reduction system cleverly utilizes a current-controlled VCA to provide a circuit with a simple structure exhibiting the characteristics shown in FIGS. 9 and 12.

FIG. 14a shows an example of a type of VCA that controls current.

That is, al is a differential amplifier. and current control transistor Q1. The emitters of Q2 are commonly connected, and the emitters of transistors Qa and IQ4 are commonly connected.

The control voltage is then applied to the bases of the transistors Q2-Qs, and the control voltages are applied to the bases of the transistors Q1-Q4
The base of is grounded.

In addition, a power supply E1 is connected between the emitters of transistors Q1 and Q3.
is connected.

The input terminal of the differential amplifier a1 is connected to the collectors of the transistors Ql-Q3, and the output terminal is connected to the collectors of the transistors Q1. Connected to the common emitter of Q2.

In the above circuit, when the four transistors Q1 to Q4 have the same characteristics, the following input/output relationship is established.

This circuit is shown below with the symbol of FIG.

Next, FIG. 15 shows an example in which the above-mentioned VCA is used to obtain the characteristics shown in FIG. 9, and FIG. 16 shows an example in which the characteristics shown in FIG. 12, which are complementary characteristics, are obtained.

In the circuit shown in FIG. 15, the input terminal is connected to the input terminal of VCAlool via a resistor 1005, and is connected to the output terminal of the VCA via an output circuit 1002 connected in series with a resistor R capacitor C. ing.

The output terminal of the VCA 1001 is connected to the input terminal of an operational amplifier 1003, and is also connected to the output terminal of the operational amplifier 1003 via a resistor 1004.

The circuit shown in FIG. 16 is complementary to the circuit shown in FIG. 15.

That is, the input terminal is connected to VC after passing through the resistor 1105.
It is connected to the input terminal of Allol and to the output terminal of the circuit via an output circuit 1102 in which a resistor R and a capacitor C are connected in series.

The output terminal of the VCA 1101 is connected to an operational amplifier 1103 and is also connected via a resistor 1104 to the output terminal of the operational amplifier 1103, that is, the output terminal of this circuit.

Next, the operation of the circuits shown in FIGS. 15 and 16 will be explained.

First, in FIG. 15, a resistor 1005 connected to the input terminal node n1 converts the current value into an input voltage, which is applied to VCAlool, which is the control voltage V.

Current amplifier controlled by e A current is applied to node n3.

In addition, a series circuit of a resistor and a capacitor 1 is connected to the node n3.
A current, which is an input voltage converted into a current by 002, flows into the current.

The operational amplifier 1003 transfers all this current to the resistor 10.
04, the following input/output relationship is obtained.

this is, If you set , it will be the same as the formula ■.

The substitution of the ■formula does not lose its generality, and the substitution of the ■formula multiplies the ■formula by a constant as well as the substitution of the ■formula. Therefore, the formula ■ can be seen as equivalent to the formula 0, and as shown in Figure 9. shows the characteristics of

Further, the operation will be similarly explained with reference to FIG.

The input voltage ■id is changed by the resistor 1105, and the output voltage ■
.

d is converted into a current by the resistor and capacitor output circuit 1102, and a current of * flows into the node n2.

amplified by This is VCA A current is applied to node n4.

This is converted into a voltage by an operational amplifier 1103 and a resistor 1104.

That is, if it is, it becomes an inverse function of the equation (2), and the same characteristics as in FIG. 12 are obtained.

As explained in detail above, by using the example shown in Figs. 15 and 16 in the method previously explained using Figs. 8 and 11, the degree of S/N improvement is large and the noise is reduced. A noise reduction system in which modulation is hardly perceptible to the ears can be obtained with a simple configuration.

In other words, by using the circuits shown in FIGS. 15 and 16 configured in the current mode, it is possible to construct a structure with a small number of elements and a small number of steps, and it is possible to obtain a high-performance noise reduction system at low cost. It can be understood.

Now, the electronic circuit according to the present invention is characterized in that the encoder and decoder of the noise reduction system shown in FIGS. 15 and 16 can be easily switched.

FIG. 17 shows an example of this, and the input terminal IN is
It is connected to the two-terminal circuit F172, and the resistor 174
and a resistor 175 in series to one electrode of a capacitor 176, and the other electrode of the capacitor 176 is connected to the output terminal of the VCA 180.

The output terminal of the two-terminal circuit F172 is connected to the VCA18.
0 input terminal, and the capacitor 177
is connected to one terminal of a resistor 178, and the other terminal of this resistor 178 forms a series circuit via a resistor 179, and is connected to the output terminal of an operational amplifier 181. It is connected to one terminal e.

The other terminal d of this switch device 171 is connected to the resistor 1
74 and 175, and the switch device 171
The common terminal of is grounded.

Further, the output terminal of the VCA 180 is connected to the input terminal of the operational amplifier 181, and the two-terminal circuit G
173 input terminal.

The output terminal of this two-terminal circuit G173 is connected to the output terminal section of the operational amplifier 181.

The operation of the above circuit at the time of encoding, that is, in correspondence with the circuit of FIG. 15, will be explained.

The two-terminal circuit F172 is R11 and the same <G173 is R
It is 11t.

Resistor R1002 is equal to the sum of resistors 174 and 175, and capacitor C1002 corresponds to capacitor 176.

Here, when the switch 171 is set to the encode side e, one side of the series circuit of the resistor 178 and the capacitor 177 is at ground potential, and the other is input to the VCA, but this node is at ground potential at some point. This resistance 178
This is the same as if the capacitor 177 were not present and can be ignored.

Further, the resistor 179 only acts as a load on the output of the operational amplifier 181, and if the resistor 179 has a value of several hundred ohms or more, it can generally be ignored.

That is, the resistors 179, 178 and capacitor 177 are the same as those that are not present in any song, resulting in the circuit shown in FIG.

Also, during decoding, if the terminal d side is set to ground potential via the common terminal of the switch device 171, the resistor 174.1
75 capacitor 176 is the same as not being present, and as expected,
F172 and G173 of the two-terminal circuit are R2□, respectively.
If R21 is selected, the circuit becomes equivalent to the circuit shown in FIG.

Here, further R2□, R, . If R22t R1□ is selected, encoding and decoding can be switched with only one switch device 171 for this part.

Note that the switch device may be replaced with a semiconductor switching element.

As explained above, according to the present invention, switching between encoding and decoding of the main parts of the noise reduction system of the above-mentioned method can be realized with a single switch, so the circuit operation is stable because the number of wires is reduced. , resulting in even lower costs.

[Brief explanation of drawings]

FIG. 1 is a basic explanatory diagram of the noise reduction system, FIG. 2 is an explanatory diagram of the operating characteristics of the system in FIG. 1, and FIG. 3 is a configuration explanatory diagram showing an improved example of the noise reduction system. Figure 4 a. b and c are characteristic diagrams of a pre-emphasis circuit, a de-emphasis circuit, and a waiting circuit, respectively; FIG. 5 is a recording/playback frequency characteristic diagram of a general cassette tape recorder; and FIG. 6 is a configuration of a noise reduction system used in the present invention. Explanatory diagram, FIG. 7 is a characteristic diagram of the control amplifier, FIG. 8 is a diagram showing a configuration example of the control amplifier, FIG. 9 is a characteristic diagram showing an example of the characteristics of the control amplifier, and FIG. 10 is the control amplifier of FIG. An example of a characteristic diagram of FIG. 11 is a diagram explaining the principle of the control amplifier during decoding, FIG. 12 is a characteristic diagram of the main part of the control amplifier of FIG. 11, and FIG. 13 is a diagram of the control amplifier of FIG. Figure 14a and b are an example of a VCA in which current is controlled by voltage; Figure 15 is an encoder circuit diagram;
FIG. 6 is a circuit diagram of a decoder composed of the same elements as in FIG. 15, and FIG. 17 is a circuit diagram including a switching system for the encode and decode control amplifier portions according to the present invention. 1...recording medium, 2...encoder,
3... Decoder, 22, 32... Level sensor, 24°34... Weighting circuit, 25.35... Control amplifier, 81...・
・VCA, 82... Inverting circuit, 83...
・Bypass filter, 84... Adder, 85.
...Emphasis circuit, 105...High frequency de-emphasis circuit, 106...Operation amplifier, 1001, 1101---VCA, 110
3. 1003...Operation amplifier, 1004, 1104
゜1005.1105・・・Resistance, 1002,1
102... Output circuit, 171... Switch, 172° 173... Two terminal circuit, 174
, 175, 178° 179...Resistance, 176.
177...Capacitor, 180...V
CA, 181... operational amplifier.

Claims (1)

[Claims] 1 A circuit having a first transfer function in which a signal input circuit is connected to a first node and an output signal circuit is connected to a second node, and a circuit connected between a second node and a third node. , a current amplifier that causes a current value obtained by multiplying the current value flowing from the second node by a current amplification degree controlled by the control signal to flow from the third node; and an input end is connected to the third node; an operational amplifier having an output signal circuit connected to a fourth node; a circuit having a second transfer function having an input terminal connected to the fourth node; and an output terminal connected to a third node; a first series circuit including a resistor and a capacitor connected between the second node and a third node; and a second series circuit including a resistor and a capacitor connected between the second node and a fourth node. It comprises a series circuit and a switch device that selectively sets the resistor branching portions of the first and second series circuits to ground potential, and the switch device provides two transfer characteristics that are inversely functional to each other. An electronic circuit characterized in that it can be obtained.