JPS5844813A - Automatic waveform equalizer - Google Patents

Abstract

PURPOSE:To recover the equalizing function earlier, by stopping the operation of an equalizer if automatic equalization is inoperative and operating the equalizer at each prescribed time. CONSTITUTION:If a waveform distortion impossible of equalization by an equalizer exist in an input signal, an equalization disable signal is generated and the equalizing function is stopped. A release circuit 11 for equalization disable signal consists of an oscillator such as a multivibrator and an AND circuit and the equalization disable state is released periodically. If the input signal reaches to a degree to be equalized at the release of equalization disable state, the equalization is immediately started. while the equalization disable state is kept, the equalization disable state is still continued and it is periodically released.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to providing a circuit for shortening the out-of-control time in a transversal automatic equalizer in addition to a circuit for preventing runaway control at the time of out-of-control (divergence). It is something.

When high-speed data transmission is performed using a quadrature amplitude modulation method, a phase modulation method, or the like, the transmission waveform is subjected to line waveform distortion, resulting in code amount interference.

For example, if waveform distortion is caused by selective fading in a wireless line, this waveform distortion changes from moment to moment, so this transversal type automatic system automatically monitors this distortion at all times and equalizes the waveform so as not to cause sign rule interference. It is useful to introduce a waveform equalization device such as an equalizer.

Here, zero forcing (Z
The basic + tli' configuration of the transversal automatic equalizer when using the ero Forcing ZF) method is explained first.
The block diagram is shown in the figure.

In the figure, ■ is a delay element having a delay time equal to the period of l code M1, 2 is a variable attenuator that is not directly related to the equalization effect and only changes the amplitude of the input signal (main signal), and 3.4 is the code amount. a variable attenuator that changes the amplitude and hardness of an echo signal (a signal weighted to lead or lag in time from the main signal) that equalizes interference; 5 is an adder; 6 is a discriminator; 7 is an error signal detector; 8 is a variable attenuator control circuit.

Briefly explain the operation. Generally, when there is a delay, when multiple 1T delay elements are connected in series and the signal is passed through, the signal obtained at the output point of the delay element is considered as the reference (referred to as the main signal). The output of the first #Nobuko is a signal that is T ahead of the main signal,
The second output advances by 2T, and the n-th output advances by nT. Conversely, each output signal toward the output side is T, 2T,
. , , each signal j\ by nT is obtained.

If the signal currently being output to attenuator 2 is the main signal, the signal (echo signal) output to attenuator 3 will be 1
'This is a signal that has advanced by a time corresponding to the $U cycle, and conversely, the signal that is output to the attenuator 4 (echo 1-1) is a signal that is delayed by a time that corresponds to one code cycle from the main signal. .

The main signal and these echo signals are each sent to an adder 5, where the waveforms are equalized. This equalized output is input to the sorter 6, and an identification signal is output from the identifier 6. The error signal detector 7 compares the equalized output and the identification signal, detects an error, and outputs it. Control circuit 8L”
1. In the case of the zII' method, the error signal from the error signal detector 7 and the identification signal from the discriminator 6 are input as the estimated transmission signal, and the variable attenuator 2.3.4 is controlled based on these. , so that predetermined waveform equalization is performed.

When the above-mentioned transversal automatic equalizer becomes uncontrollable due to wave distortion that cannot be equalized or an abnormality other than the equalizer, the output of the equalizer tends to be worse than the input signal. Since the converter is inserted into the main transmission line, it causes a serious problem. Therefore, in the past, for example, as shown in FIG. 2, an equalization failure detection circuit 9 and a variable attenuator initial value setting circuit 10 were further added, and when equalization was impossible, all the variable attenuators were set to their initial values to perform the equalization function. It was disabled and outputted the input signal as is. In this case, since the non-equalizable signal is obtained from the equalized output of the transversal automatic equalizer according to a certain standard, the input signal may have large waveform distortion while the transversal equalizer is equalizing. An unequalizable signal is not generated even if the

However, once the non-equalizable signal is generated, the equalizer does not equalize it, so the non-equalizable signal will not disappear unless the waveform distortion becomes considerably less than when the non-equalizable signal was generated. Therefore, even though the waveform distortion is such that it can be equalized, the initial value setting is not canceled, resulting in a long period of time during which equalization cannot be performed.

In order to eliminate this drawback, the present invention adds a circuit for periodically canceling the non-equalizable signal, and will be described in detail below with reference to the drawings.

FIG. 3 shows an embodiment of the present invention, in which an unequalizable signal canceling circuit n for periodically canceling the unequalizable signal is added to the unequalizable detecting circuit 9 in FIG. 2. When the unequalizable signal is periodically canceled by the unequalizable signal canceling circuit H, if the waveform distortion of the input signal to the equalizer is within the equalizable range, it is equalized. Since the waveform distortion becomes smaller in the equalized output of the adder 5, the non-equalizable signal disappears, and the equalization function continues thereafter.

On the other hand, if there is still waveform distortion in the human signal that cannot be equalized by the equalizer, a signal that cannot be equalized is generated again, and this process is repeated until the waveform distortion of the input signal reaches a waveform distortion that can be equalized. . The unequalizable signal canceling circuit is designed so that the unequalizable signal is
” (indicating that equalization is not possible), “0”
This is a circuit that takes the rlJO value and oscillates at a constant cycle, and one example is shown in FIG.

It can be easily configured with a simple HO oscillator like a multivibrator and an AND circuit.

The shorter the period of the oscillator, the better, and it is limited to its minimum by the time required for the equalization operation of the fixture.

In other words, the time for the oscillator output to take a value of 10 (sound emitting yN) must be longer than the draw-in time of the fixture.

Figure 5 shows a carrier regeneration circuit as an equalization failure detection circuit in a system that combines a demodulator that inputs a modulation signal and a transversal automatic equalizer] and the output frequency of 4 and the transversal automatic equalizer. This is an embodiment using a gear rear asynchronization detection circuit [5] which detects synchronization and asynchrony with the input carrier frequency to the device. In this case, since the control 4111 information of the carrier regeneration circuit is obtained from the equalization output, when equalization is not possible, the carrier regeneration yarn is out of synchronization, and the θ initial value setting circuit 1° is driven by the carrier asynchronous detection signal. Generally, in order to widen the pull-in range of a carrier regeneration circuit, the seven rerun output frequency of the carrier regeneration circuit is changed by a sweeper during non-synchronization. In such a case, in this configuration, the initial value setting is canceled when the free-run output frequency being changed by the sweeper becomes almost the same as the carrier wave, and if the waveform distortion can be equalized by the equalizer, the equalization is performed. At the same time, the reproduced carrier synchronization is established and the carrier asynchronous signal disappears.

Therefore, the frequency 11j of the oscillator of the non-equalizable signal cancellation circuit (
As for It is limited by the time required to pull in the fixtures.

As explained above, by adding a simple non-equalizable signal cancellation circuit according to the present invention, as long as the distortion of the input signal to the equipment is within the range that can be equalized, the equipment can always be kept in the operating state. Since it is possible to pull it back into a circle, it is possible to shorten the time it takes to turn the fixture into a temple, and the power to turn the fixture into a temple can be effectively demonstrated.

Although the figure shows an example of a baseband band transversal type automatic equalizer, it can be similarly applied to the case of an intermediate frequency band transversal type automatic equalizer.

[Brief explanation of the drawing]

Figure 1 shows an example of the basic configuration of a transversal type automatic equalizer, Figure 2 shows an example of a transversal type automatic equalizer to which a conventional initial value setting circuit is applied, and Figure 3 shows an implementation of the present invention. Example 1
1. FIG. 4 shows a specific example of an unequalizable signal cancellation circuit, and FIG. 5 shows a second embodiment of the present invention. 1. a delay element having a delay time equal to the l code period;
2.3.4°. variable attenuator, 5. . Adder X6...Discriminator 170. Error information detector, 80.
Variable attenuator control circuit, 99. Non-degradable detection circuit, added. ,
Variable attenuator initial value setting circuit, ■. Zero-equalization impossible signal canceling circuit, recognition. Oscillator, no. AND circuit, 14. , carrier regeneration circuit, fertilization. Carrier asynchronous detection circuit agent Patent attorney Takashi Honma

Claims (1)

[Claims] A plurality of delay elements connected in cascade and a plurality of variable attenuators capable of inverting the lucidity are respectively inputted with delayed signals from the output taps of the delay elements, and the outputs of the variable attenuators are combined. an adder that generates an equalized output, an identification circuit that identifies the equalized output and generates an identification signal, and an error detector that generates an error signal based on the difference between the 1rie separate signal and the equal output. , a variable attenuator control circuit that controls the variable attenuator based on the error signal and the estimated transmission signal, and an equalization impossible circuit that detects the output of the adder and issues an equalization impossible signal when equalization is impossible. Initial value setting for causing the variable attenuator control circuit to set initial values for all variable attenuators to prevent the equalization function from working based on the inability belief from the detection circuit and the inability detection circuit. 1. An automatic waveform equalization device comprising an automatic waveform equalization circuit comprising a non-equalizable signal canceling circuit that periodically cancels the non-equalizable signal while the non-equalizable signal is generated.