JPS5844714A - Changer for figure - Google Patents
Changer for figureInfo
- Publication number
- JPS5844714A JPS5844714A JP14222281A JP14222281A JPS5844714A JP S5844714 A JPS5844714 A JP S5844714A JP 14222281 A JP14222281 A JP 14222281A JP 14222281 A JP14222281 A JP 14222281A JP S5844714 A JPS5844714 A JP S5844714A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- coordinate
- data
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
- H01J37/302—Controlling tubes by external information, e.g. programme control
Landscapes
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Electron Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は電子線描画装置等の図形変換器に係り特に矩形
ビーム全使用し高速描画をするための図形変換器に関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a graphic converter for an electron beam lithography system, and more particularly to a graphic converter for high-speed lithography using all rectangular beams.
従来の電子線描画装置としては、スポットビームによる
方式、および、矩形ビームによる方式とがあるが、前者
は、スループットが低いという欠点を持ち、また、後者
は、斜め図形の描画に時間がかかり、図形の精度を上げ
るとますます時間が消費される欠点があり、又こnらの
描画方式により描画するための図形データ―t’sIや
超LSIとなると図形数が膨大な量となり電子計算機に
よる方法では、データの変換に長時間を要するためスル
ープ−ットthげる防げとなった。Conventional electron beam lithography systems include a spot beam system and a rectangular beam system, but the former has the disadvantage of low throughput, and the latter takes time to draw diagonal figures. Increasing the accuracy of graphics has the disadvantage that it consumes more and more time, and the graphics data required to draw using these drawing methods - when it comes to T'SI and VLSI, the number of graphics becomes enormous, and it is difficult to use electronic computers. In this method, it takes a long time to convert data, which prevents throughput from decreasing.
本発明の目的は、電子線の走査信号を利用して矩形ビー
ムの長さをなめらかに変化させることにより角度付図形
を高速・高精度で描画し得る電子線描画装置用の描画図
形を高速度で変換する図形変換器を提供するにある。An object of the present invention is to provide a high-speed drawing figure for an electron beam lithography system that can draw angled figures at high speed and with high precision by smoothly changing the length of a rectangular beam using an electron beam scanning signal. Provides a graphical converter to convert.
半導体デバイスの図形データは一般的に第1図の形式で
描画装置に与えられる。Graphical data of a semiconductor device is generally provided to a drawing apparatus in the format shown in FIG.
すなわち、(X、Y)が図形中心座標であり、Wが図形
の巾であり、I■が図形の高さであり、θが図形の傾き
である。That is, (X, Y) is the center coordinate of the figure, W is the width of the figure, I is the height of the figure, and θ is the inclination of the figure.
電子線描画装置はこのままのデータでは描画することが
困−なため、その装置に最、適なデータ形式に5R41
!IL、描1山1する。Since it is difficult for electron beam lithography equipment to write with data as it is, it is necessary to use 5R41 in the most suitable data format for the equipment.
! IL, draw 1 mountain.
第2図は、矩形ビームのビーム長を可変にし高速描画に
摘した図形変換の形式を示す。第2図中、左の長方形は
、そのまま、右の角度は長方形は、□図のように分割す
る。実際に描画するにはさらに第3図の如く分割する。FIG. 2 shows a form of figure conversion in which the beam length of a rectangular beam is made variable to achieve high-speed drawing. In Figure 2, the left rectangle is left as is, and the right angle rectangle is divided as shown in the □ figure. For actual drawing, it is further divided as shown in FIG.
分割さ扛た図形は、第4図に示すような5種類の基本図
形として表現することができる。この基本図形のデータ
形式は、座標平面の電子線走査方向における電子線0N
10FF座標データBON 、 BOFF%角度データ
AΦ。The divided figures can be expressed as five types of basic figures as shown in FIG. The data format of this basic figure is the electron beam 0N in the electron beam scanning direction of the coordinate plane.
10FF coordinate data BON, BOFF% angle data AΦ.
Aθ、Bの、Be、および電子線ビーム長データBtと
して表現する。It is expressed as Aθ, B, Be, and electron beam length data Bt.
こnらのデータ変換は、従来電子計算機により行わ扛て
いたが、LSI、超LSIと図形数が膨大になるにした
がい、電子計算機による方法では、図形数が多いため変
換に長時間を要し又、この変換データを描画する時には
、電子計算機又は、外部記憶装置より描画制御装置への
データ転送に長時間を要し全体としての描画時間を短縮
することが困難であった。Conventionally, these data conversions were performed using electronic computers, but as the number of graphics becomes enormous with LSI and VLSI, it takes a long time to convert using methods using electronic computers due to the large number of graphics. Furthermore, when drawing this converted data, it takes a long time to transfer the data from the electronic computer or external storage device to the drawing control device, making it difficult to shorten the overall drawing time.
本発明の図形変換器は、この欠点をカバーするために使
用さn1電子計算機にて第2図に示す基本図形に変換さ
れた図形データを、実際描画するのに必要な図形データ
第3図、第4図に高速度で変換する専用図形変換器であ
る。The figure converter of the present invention is used to overcome this drawback.The figure converter is used to cover this drawback. Figure 4 shows a dedicated graphic converter that converts at high speed.
第5図の図形によりデータ変換方式を説明する。The data conversion method will be explained using the diagram in FIG.
第7図において磁気テープ装置1より第1図の図形デー
タとして与えられた図形は、電算機2により第2図のよ
うに分割さnて磁気ディスク3に記憶される。電算機2
はオペレータの指示により描画シーケンスプログラムが
起動し、磁気ディスク3より描画順に描画データが電算
機2全通して描画データメモリー4に転送さ扛順次図形
変換器5に送ら扛、第3図、第4図のように変換さ扛、
描画メモリー6に格納され描画単位毎に、描画信号発生
器7に送ら扛電子光学系8に適合する信号に変換さnて
電子1i!’kON−OFF又は、偏向して試料21に
図形を描画する。電子光学系8は、周知のように一電子
銃11、照射レンズ12、ブランキング板13、ブラン
キング絞り14、整形偏向板15、矩形絞り16、縮小
レンズ17、X軸側向板18、Y軸側向板19、対物レ
ンズ20から構成さ扛ている。この時の図形変換器5の
変換速度は、電子光学系8の描画速度に合せて、100
n秒から遅くとも1μ秒と高速度が要求される。In FIG. 7, the graphic data provided by the magnetic tape device 1 as the graphic data in FIG. 1 is divided by the computer 2 as shown in FIG. 2 and stored on the magnetic disk 3. computer 2
The drawing sequence program is activated by the operator's instructions, and the drawing data is transferred from the magnetic disk 3 in the drawing order through the computer 2 to the drawing data memory 4, and sequentially sent to the figure converter 5, as shown in FIGS. 3 and 4. Converted 扛 as shown in the figure,
It is stored in the drawing memory 6 and sent to the drawing signal generator 7 for each drawing unit, where it is converted into a signal suitable for the electron optical system 8 and the electrons 1i! 'kON-OFF or deflect to draw a figure on the sample 21. As is well known, the electron optical system 8 includes an electron gun 11, an irradiation lens 12, a blanking plate 13, a blanking aperture 14, a shaping deflection plate 15, a rectangular aperture 16, a reduction lens 17, an X-axis side plate 18, and a Y-direction plate 18. It consists of an axial plate 19 and an objective lens 20. The conversion speed of the figure converter 5 at this time is 100% in accordance with the drawing speed of the electron optical system 8.
A high speed of n seconds to 1 microsecond at the latest is required.
本発明では、第8図のように、描画データ22はバッフ
ァレジスタ23にセットさ扛ると、X座標演算回路29
、X座標演算回路24により図形の座標を演算し、演算
結果を図形識別回路25に送りここで各座標値より図形
を識別し、その図形に合せた値?ROM26の値により
出力ゲート28より必要な値を出力することにより高速
化を実現している。In the present invention, as shown in FIG. 8, when the drawing data 22 is set in the buffer register 23, the X coordinate calculation circuit 29
, the coordinates of the figure are calculated by the X coordinate calculation circuit 24, the calculation results are sent to the figure identification circuit 25, where the figure is identified from each coordinate value, and the value ? Speeding up is realized by outputting the necessary value from the output gate 28 based on the value in the ROM 26.
第8図に本発明の一実施例を示すブロック線図を、第6
図に図形検出回路とROMよりの出力例を示す。FIG. 8 is a block diagram showing one embodiment of the present invention.
The figure shows an example of output from the figure detection circuit and ROM.
第7図の描画データメモリー4よりの描画データは、第
8図の描画データ22よりバッファレジスタ23にセッ
トさ扛る。第5図に示す図形を例にとって順に説明する
。データは、Xo * Yoと対応するバッファレジス
タ23にセットされ、座標演算回路37のY座標、演算
回路24、X座標演算回路29で1デ一タ変換制御回路
36の制御により算術計算が行わ3% XOe Y
Os x2 *y1 @ A@ Bg x6 、 xl
(7)値が求めら扛る。ここで〜 yo I y、
# y、 I Y8にかこま扛た図形の台形ノx。The drawing data from the drawing data memory 4 shown in FIG. 7 is set in the buffer register 23 from the drawing data 22 shown in FIG. The figure shown in FIG. 5 will be explained in order by taking as an example. The data is set in the buffer register 23 corresponding to Xo * Yo, and arithmetic calculation is performed by the Y coordinate of the coordinate calculation circuit 37, the calculation circuit 24, and the X coordinate calculation circuit 29 under the control of the 1-data conversion control circuit 36. %XOeY
Os x2 *y1 @A@Bg x6, xl
(7) The value is determined. Here ~ yo I y,
# y, I Trapezoid x, which is a squared figure in Y8.
は、x0=X、、−Δx、 x1=xatとなり(X、
は、X電磁偏向値30、ΔXは、描画幅31)、’10
e YO* y2 * Ysは1各々次式で計算され
る。becomes x0=X, , -Δx, x1=xat (X,
is the X electromagnetic deflection value 30, ΔX is the drawing width 31), '10
e YO * y2 * Ys are each calculated by the following formula.
Yo = Yo + ((X−Xo )−ΔX)jan
A’/l =Yt + ((X−X。)−ΔX)tan
13Yv = Yo + (>L−XO) jan A
y3=y、+ (x、−Xo)tanBこの台形を描画
す右場合には、さらに、台形を上下の三角形2個と、中
央の四角形の計3個に分割し第4図に示す。BON 、
BOFFI ビーム長BL%角変情報Aes Ae
e Bg、Aevi−出力スル必要があるが、こnらの
値は、最初の座標全計算した描画データ22により、四
角形、三角形9台形。Yo = Yo + ((X-Xo)-ΔX)jan
A'/l = Yt + ((X-X.)-ΔX)tan
13Yv = Yo + (>L-XO) jan A
y3=y, + (x, -Xo)tanB In the right case of drawing this trapezoid, the trapezoid is further divided into two upper and lower triangles and a square in the center, a total of three parts, as shown in FIG. BON,
BOFFI Beam length BL% angle variation information Aes Ae
e Bg, Aevi - It is necessary to output these values, but these values are a quadrilateral, a triangle, and a trapezoid, based on the drawing data 22 that all the initial coordinates were calculated.
平行四辺形と異り、各々の図形によりBON。Unlike parallelograms, each shape is a BON.
BOFF、角度情報、Y方向への分割数が異る。こRk
各図形毎に演算することは至難である。本発明では、計
算された各座標値より、図形の特徴を現す特徴パラメー
タを図形識別回路25により算出し、そのパラメータ?
ROM26のアドレス値とし図形識別回路よりのパラメ
ータ値によりRAM26にあらかじめ書込まれていた値
が出力さ扛これが出力制御回路27に伝わり、Y座標出
力32及びビーム幅信号33より、必要なデータを、出
力ゲート28を出力ゲート制御信号34により選択制御
することで、描画用出力35が、順次、第7図描画メモ
リー6に書込まれる。例を第5図のyo、y、e Y2
s Y3の図形にとると、この台形は、第6図のNo9
に相当し、この時のノ(ラメータ出力は、A〈0のみが
成立する。よってこの台形では、ROMアドレスは、4
0 ”となり、ROM26よりの出力は、Y方向分割は
、3個で、第1の図形は、BON値=Y2 、 BOF
F =’Jo−角度=θA、第2の図へは、B”ON=
’!0 、 Boyr =y8.角度二〇、第3の図
形は、BoN=ytsBOFF =)’3 、角度=O
Bの値が出力さ扛る。このように、単純な回路で全部の
図形をも社なく1図形変換することが可能となり、父、
変換時開も、角度なし図形では、100〜2000秒、
角度付図形の場合には、乗算演算時間により左右さnる
が、1μ秒以下と高速に、図形変換が可能となり、電子
線描画装置全体の描画速度を向上する効果がある。The BOFF, angle information, and number of divisions in the Y direction are different. This Rk
It is extremely difficult to perform calculations for each figure. In the present invention, the feature parameter representing the feature of the figure is calculated by the figure identification circuit 25 from each calculated coordinate value, and the parameter?
The address value of the ROM 26 is the value previously written in the RAM 26 based on the parameter value from the figure identification circuit. By selectively controlling the output gate 28 using the output gate control signal 34, the drawing output 35 is sequentially written into the drawing memory 6 in FIG. 7. An example is yo, y, e Y2 in Figure 5.
If we take the shape of s Y3, this trapezoid is No. 9 in Figure 6.
This corresponds to
0'', and the output from the ROM 26 is divided into three pieces in the Y direction, and the first figure is BON value = Y2, BOF
F='Jo-Angle=θA, to the second figure, B”ON=
'! 0, Boyr=y8. Angle 20, the third figure is BoN=ytsBOFF=)'3, angle=O
The value of B is output. In this way, it became possible to convert all shapes into one shape with a simple circuit, and my father,
The opening time during conversion is 100 to 2000 seconds for shapes without angles,
In the case of an angled figure, the figure can be converted as quickly as 1 μsec or less, although it depends on the multiplication calculation time, which has the effect of improving the drawing speed of the entire electron beam drawing apparatus.
第1図は、一般的図形データの説明図であり、第2図は
、図形分割法の説明図であり、第3図は、描画に必要な
図形分割法の説明図であり、第4図は、図形分割後の基
本図形の説明図であり、第5図は、Y座標計算法の説明
図であり、第6図は、図形検出−1路とROM出力の一
例図であり、第7図は、電子線描画制御装置のブロック
図であり、第8図は、本発明の一実施例の図形f換器の
ブ「1ツク図である。
24・・・X座標演算回路、25・・・図形識別回路1
.′28・・・出力ゲート、29・・・X座標演算回路
。
第 1 口
第20
第 3 図
第4−口
¥ys図
X%
第 6 日
案 7121Fig. 1 is an explanatory diagram of general figure data, Fig. 2 is an explanatory diagram of a figure division method, Fig. 3 is an explanatory diagram of a figure division method necessary for drawing, and Fig. 4 is an explanatory diagram of a figure division method necessary for drawing. is an explanatory diagram of the basic figure after figure division, FIG. 5 is an explanatory diagram of the Y coordinate calculation method, FIG. 6 is an example diagram of figure detection-1 path and ROM output, The figure is a block diagram of an electron beam lithography control device, and FIG. 8 is a block diagram of a figure f converter according to an embodiment of the present invention. 24...X coordinate calculation circuit, 25. ...Graphic identification circuit 1
.. '28...Output gate, 29...X coordinate calculation circuit. 1st mouth 20th 3rd figure 4-mouth ¥ys diagram X% 6th day plan 7121
Claims (1)
又はマスク上に、半導体集積回路等のパターンヲ描画す
る電子線描画装置等荷電粒子描画装置の図形変換器にお
いて、分割図形の座標演算回路と、前記座標演算回路よ
りの演算値により図形を識別する図形識別回路と、前記
図形識別回路よりの出力により必要なデータを選択出力
する出力ゲート回路とを備えたことを特徴とする図形変
換器。1. In a figure converter of a charged particle lithography apparatus such as an electron beam lithography apparatus that controls charged particles such as electron beams or ions to draw patterns such as semiconductor integrated circuits on a wafer or mask, a coordinate calculation circuit for divided figures. A figure converter comprising: a figure identification circuit that identifies figures based on the calculated value from the coordinate calculation circuit; and an output gate circuit that selects and outputs necessary data based on the output from the figure identification circuit. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14222281A JPS5844714A (en) | 1981-09-11 | 1981-09-11 | Changer for figure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14222281A JPS5844714A (en) | 1981-09-11 | 1981-09-11 | Changer for figure |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5844714A true JPS5844714A (en) | 1983-03-15 |
Family
ID=15310249
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14222281A Pending JPS5844714A (en) | 1981-09-11 | 1981-09-11 | Changer for figure |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5844714A (en) |
-
1981
- 1981-09-11 JP JP14222281A patent/JPS5844714A/en active Pending
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