JPS5843185A - Controller for voltage type pwm inverter - Google Patents

Controller for voltage type pwm inverter

Info

Publication number
JPS5843185A
JPS5843185A JP56139015A JP13901581A JPS5843185A JP S5843185 A JPS5843185 A JP S5843185A JP 56139015 A JP56139015 A JP 56139015A JP 13901581 A JP13901581 A JP 13901581A JP S5843185 A JPS5843185 A JP S5843185A
Authority
JP
Japan
Prior art keywords
current
signal
circuit
voltage
inverter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56139015A
Other languages
Japanese (ja)
Inventor
Hiroyuki Kitamura
北村 闊幸
Yorio Hosokawa
細川 倚男
Katsumi Fukazawa
深沢 勝美
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56139015A priority Critical patent/JPS5843185A/en
Publication of JPS5843185A publication Critical patent/JPS5843185A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

PURPOSE:To improve the stability of a voltage type PWM inverter by detecting the output current of the inverter, inputting the signal together with a current reference signal to a current control circuit provided in a minor loop of a control system and controlling the pulse width modulation with the deviation signal from the control circuit. CONSTITUTION:When an induction motor IM is driven by a voltage type PWM inverter INV, the output current of the inverter is detected by detectors CS1, CS2, thereby obtaining an output current average value signal corresponding to the fundamental wave effective value through an absolute value converter 44 and an average circuit 45. A current reference signal IR corresponding to the voltage deviation signal as the output of a voltage control circuit 21 is calculated and is inputted to a current control circuit 46, the deviation from the circuit 46 is applied to a PWM control circuit 22, and is logically synthesized by the signal of a ring counter 28, thereby controlling the control element of an inverter. Accordingly, the motor current can be always monitored and controlled, thereby preventing the vibration in the torque and performing the stable operation.

Description

【発明の詳細な説明】 本発明は、交流電動機を可変速制御する可変電圧可変周
波数制御装置vvvyを構成する電圧形インバータの制
御装置に関するものでろる。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control device for a voltage source inverter constituting a variable voltage variable frequency control device vvvy for variable speed control of an AC motor.

第1図に、4I願@54−140818号において既に
提案された従来のむの槽電圧形インバータの制御装置を
示す、同図において、インバータ主回路工NVは、パワ
ートランジスタ1〜6による三相ブリッジ構成と、ダイ
オード7N12による三相ブリッジ構成、及び入力端の
コンデンサ0を備えて電圧形インバータを形成してお〕
、入力端子ア。
Fig. 1 shows a control device for a conventional tank voltage type inverter already proposed in 4I Application No. 54-140818. A voltage source inverter is formed with a bridge configuration, a three-phase bridge configuration with a diode 7N12, and a capacitor 0 at the input end.]
, input terminal a.

;二=コ、二=二:二j°::ニニ::;;ニーは、訪
導電動WAxMの1次巻線u、 % W、が接続されて
いて、三相交流入B、?、 唱j”上記!1電流路Rデ
を介して入力し電圧及び周波数の制御された電力を上記
誘導電動機xMに供給するようになって―る。
;2=ko, 2=2:2j°::Nini::;;Knee is connected to the primary winding u, % W, of the visiting electric power WAxM, and the three-phase AC input B, ? The electric power input through the !1 current path Rde and whose voltage and frequency are controlled is supplied to the induction motor xM.

そして、上記インバー°)りxMvの各パワートラW! ンリスタのペースを制4−する制御装置としては次の構
成を備えている。オす、上記中力端子υ、V、Wにrテ
等を主として構成さ九た絶縁整形回路19が接続されて
出力電力の基本波実効値に相轟する出力電圧平均値信号
ufが検出され、この検出信号ufは、電圧基準信号v
Hがステップ状に入力された場合にも急峻な変化が緩和
された信号yaPを出力する入力制限回路器の出力v 
R/と備示極性によって演算され、その演算結果が電圧
制御回路21に入力されて電圧偏差信号U・が出力され
る。
And each power tiger W of the above invar°)ri x Mv! The control device for controlling the pace of the printer lister has the following configuration. On the other hand, an insulated shaping circuit 19 mainly composed of RTE and the like is connected to the neutral power terminals υ, V, and W, and an output voltage average value signal uf that resonates with the fundamental wave effective value of the output power is detected. , this detection signal uf is the voltage reference signal v
Output v of the input limiting circuit that outputs a signal yaP with less steep changes even when H is input in a stepwise manner.
A calculation is performed using R/ and the indicated polarity, and the calculation result is input to the voltage control circuit 21, which outputs a voltage deviation signal U.

上記電圧偏差信号U・は、基準波発生回路23゜搬送波
発生回路前、及び比較回路スで成るPWM制御回路22
の上記基準波発生回路おに入力され。
The voltage deviation signal U.
is input to the above reference wave generation circuit.

この基準波発生回路器から上記電圧偏差信号U0に比例
し九振幅値の基準矩形波または基準正弦波信号が得られ
るようになっている。
A reference rectangular wave or reference sine wave signal having nine amplitude values proportional to the voltage deviation signal U0 can be obtained from this reference wave generating circuit.

他方、上記入力制限回路器の出カフ uIは、−W、圧
−周波数変換回路25に入力されてクロックパルスに変
換され、そのクロックパルス紘分周回路がとカウント回
路25aに入力されるようになっておシ。
On the other hand, the output uI of the input limiting circuit is -W, which is input to the voltage-frequency conversion circuit 25 and converted into a clock pulse, and the clock pulse frequency divider circuit is inputted to the counting circuit 25a. Natteshi.

、1.:・、・ この時、カウント−路25aのカウント出力信号は上記
基本波発生回路ねと搬送波発生回路26にアドレス信号
として入力される。
, 1. At this time, the count output signal of the count path 25a is inputted to the fundamental wave generation circuit and the carrier wave generation circuit 26 as an address signal.

そして、上記分周回路dの出力信号はリングヵクンタ田
に入力され、このカクンタMJt)出力信号と上記PI
FM制御回路22O出力信号、りまシpwM制御信号ア
は論纏合成回路四によって合成され。
Then, the output signal of the frequency dividing circuit d is inputted to the ring kakunta field, and this kakunta MJt) output signal and the above PI
The output signal of the FM control circuit 22O and the remote pwM control signal A are synthesized by the logic synthesis circuit 4.

その合成信号線ホトカプラ回路菊を介してペースドライ
ブ回路31に転送され上記インバータINvの各トラン
ジスタ1−6のペースを制御することによってインバー
タエHvi駆動するようになって−る。
The signal is transferred to the pace drive circuit 31 via the composite signal line photocoupler circuit 31, and by controlling the pace of each transistor 1-6 of the inverter INv, the inverter Hvi is driven.

この制御方式はマ/f制御として知られ、マ/f制御は
藺導で、しかも交流電動機を効率良く可変駆動すること
ができ、従って電動機を駆動するvvvpを代浅するも
のにな9りl)6る・しかしながら、上記構成の制御装
置にTh−では。
This control method is known as ma/f control, and ma/f control is linear and can efficiently drive an AC motor in a variable manner, thus substituting the vvvp that drives the motor. )6・However, in Th- for the control device with the above configuration.

フライホイール効果enllの小さめ負荷を駆動する場
合、または電動機単体での無負荷運転時にはすべF)B
==00同期速度付近にお―て1wJ導電動機IMのス
リップが一見、プラスとマイナスに交互に変化する現象
が児受けられて電動機電流も脈動を発生しトルク振動が
起ることがah、所謂不安電現象が発生することがある
。これを解消する丸めには、特願昭55−1!4LI8
6号に開示され念ように、電動機電流を検出しその微分
信号を得て電流微分信号に応じてインバータ周波数を補
正するアンチハント方式を採用する必要があった。
When driving a small load with flywheel effect, or when operating the motor alone with no load, all F)B
==00 Near the synchronous speed, the slip of the 1wJ conductive motor IM appears to change alternately between positive and negative, which causes the motor current to pulsate and cause torque oscillations, so-called. Anxiety electric phenomena may occur. To solve this problem, the rounding method is as follows:
As disclosed in No. 6, it was necessary to adopt the anti-hunt method of detecting the motor current, obtaining its differential signal, and correcting the inverter frequency according to the current differential signal.

また1通常運転時においても負荷の急変に対拠して電動
機xMとインバータxNvのパワートランジスタ1〜6
を過熱及び破壊から保護する必要が69、そのためには
、インバータxMYの直流入力電流を検出する以外にイ
ンバータXHVの出力電流、即ち電動機電流を検出して
カレントリミットをかけることによって電動機XMとパ
ワートランジスタ1〜6を保護する必要”JHめった。
In addition, even during normal operation, the power transistors 1 to 6 of the motor xM and inverter xNv are
It is necessary to protect the motor XM and the power transistor from overheating and destruction69, and for this purpose, in addition to detecting the DC input current of the inverter xMY, it is also necessary to detect the output current of the inverter XHV, that is, the motor current, and apply a current limit to the motor It is necessary to protect 1-6” JH rarely.

以上のように従来のインバータの制御装装置におiでは
、アンチハント制御、過電流保護手段を設ける必要がめ
シ、これら構成は複雑で、かつ高価なものとなってvh
九、         ′本発明は上記のような従来の
ものの問題点を解消すゐためになされたものて、電動機
電流を比較釣部−に検出して電流を常時監視・制御し、
安定した運転を行うことができる電圧形インバータの制
御装置を提供するものである。
As mentioned above, it is necessary to provide anti-hunt control and overcurrent protection means in conventional inverter control equipment, and these configurations are complicated and expensive.
9. 'The present invention has been made to solve the problems of the conventional ones as described above, and it detects the motor current in a comparison section and constantly monitors and controls the current.
The present invention provides a control device for a voltage source inverter that can perform stable operation.

以下1本発明の一実施例を第1図と同一部分は同一符号
を附して示す第2図に基づ−て説明すると、第2図にお
−て第1図構成と異なるところは、比較的簡略な電流検
出手段とマイナーループに電流制御手段を設けて、イン
バータXN’Yの出力電流の平均値電流制御を行なって
いる点にある。即ち、電動機工Mへ入力される三相交流
を検出して整形し、電流フィードバック信号if、を比
較的容易に得る九めに第2図では次の手段を備えて匹る
Below, one embodiment of the present invention will be explained based on FIG. 2, in which the same parts as in FIG. 1 are denoted by the same reference numerals. The present invention is characterized in that relatively simple current detection means and current control means are provided in the minor loop to perform average value current control of the output current of inverter XN'Y. That is, in order to detect and shape the three-phase alternating current input to the electric motor M and relatively easily obtain the current feedback signal if, the following means is provided in FIG.

まず、インバータXNVの出力端子U%Wと電動fi1
M+2)1次巻線u、vとの間に電流検出器aS1とa
S、を設け、ζ、0電流検出器、としてはシャント抵抗
0テ ホール素子を応用し九ホールOT等を用−る、そ
して1.検出器OB、とos。
First, the output terminal U%W of inverter XNV and electric fi1
M+2) Current detectors aS1 and a are connected between the primary windings u and v.
1. A 9-hole OT or the like is applied by applying a shunt resistance 0-tehole element as a ζ, 0 current detector, and 1. Detector OB, and os.

に絶縁増幅回路41と鯰を各々接続してこの絶縁増幅回
路41と42で得られるp部電流検出信41uとW相電
流検出信号1Wを演算回路43に入力し、V相電流検出
器、号1v を得るようにする。
An insulated amplifier circuit 41 and a catfish are respectively connected to the insulated amplifier circuits 41 and 42, and the p-section current detection signal 41u and the W-phase current detection signal 1W obtained by the isolation amplifier circuits 41 and 42 are inputted to the arithmetic circuit 43, and the V-phase current detector, signal Try to get 1v.

次に、上記各電流検出器1号1u、 *マ、iv  を
絶対値変換回路44に入力しその絶対値信号l iv 
l。
Next, each current detector No. 1 1u, *ma, iv is inputted to the absolute value conversion circuit 44, and its absolute value signal l iv
l.

11マ1.11w1を得て、さらに平均値回路45に入
力し千の出力として、インバータXNVの出力電流の基
本波実効値に相当する出力電流平均値信号1fを得、こ
れを従来の電圧制御回路21の出力で6る電圧偏差信号
に対応する電流基準信号IRと図示極性にしたがって演
算し、その結果を電流制御回路46に入力して誤差増幅
信号、りまり電流偏差信号1Δt%るよう(Cし、この
電流偏差信号1Δ′tPWM制御回路nの基本波発生回
路路に入力して基本波発生回路おから出力される基準正
弦波または基準矩形波の振幅値を上記電流偏差信号1Δ
に応じて変化させることによ?)、PWM制御の変調率
を変えて!動機電流の大きさを制、御するようにする。
11ma 1.11w1 is obtained, which is further input to the average value circuit 45, and an output current average value signal 1f corresponding to the fundamental wave effective value of the output current of the inverter XNV is obtained as an output of 1,000. The output of the circuit 21 is calculated according to the current reference signal IR corresponding to the voltage deviation signal 6 and the illustrated polarity, and the result is input to the current control circuit 46 so that the error amplification signal and the current deviation signal 1Δt% are generated ( The amplitude value of the reference sine wave or reference rectangular wave that is input to the fundamental wave generation circuit of the PWM control circuit n and output from the fundamental wave generation circuit O is used as the current deviation signal 1Δ't.
By changing it accordingly? ), change the modulation rate of PWM control! The magnitude of the motive current is controlled.

ζこで、上記演!−路43%絶対値変換回路舗。ζ Here, the above performance! - Road 43% absolute value conversion circuit shop.

及び平均値回路45.の糸体的構成は第8図に示される
。まず、演算回路43は、演算増幅器43aを主体とし
た加算回路で表9 (431)〜436は抵抗)、また
絶対値変換回路楓は、U相s v@@ w相銀に同様な
回路を備えて、そのうちす相の絶対値変換回路4417
は2個の演算増幅器441Ta、441T’bと2個の
ダイオード44U・、44ff+1.及び抵抗4417
・ダ、J4t7kt−備、えている、さらに、平均値回
路部は。
and average value circuit 45. The filamentous structure of is shown in FIG. First, the arithmetic circuit 43 is an adder circuit mainly composed of an operational amplifier 43a (Table 9 (431) to 436 are resistors), and the absolute value conversion circuit Kaede is a similar circuit for the U phase s v @ w phase silver. In addition, the absolute value conversion circuit 4417 of the phase
are two operational amplifiers 441Ta, 441T'b and two diodes 44U., 44ff+1. and resistance 4417
・The J4t7kt is equipped with an average value circuit section.

演算増幅器45a、抵抗451)#45f、及び;ンデ
ンサ45gから成る加算回路を主として構成されておシ
、もとよりコンデンサ45gを除去して増幅器45aの
出力端子に、同じぐ演算増、幅器を主体としたアクティ
ブ・フィルタ(クーバスフィルタ)を接続して平均値出
力を得る回路としてもよ都。
It mainly consists of an adder circuit consisting of an operational amplifier 45a, a resistor 451) #45f, and a capacitor 45g.The capacitor 45g is removed and the output terminal of the amplifier 45a is connected to the output terminal of the amplifier 45a. It can also be used as a circuit to obtain the average value output by connecting an active filter (Cubus filter).

上述した第2図、第8図構成におiでは、U相電流1u
とW相電流1Wとを検出しこれに基づいてV相電流1マ
 、を演算して求めている。今、出力電流1u、iv、
iv・を完全な正弦波に近似した場合、次のように表わ
すことができる。
In the above-mentioned configurations of FIGS. 2 and 8, the U-phase current 1u
and the W-phase current 1W are detected, and the V-phase current 1W is calculated based on this. Now, the output current is 1u, iv,
When iv· is approximated to a perfect sine wave, it can be expressed as follows.

冬u  =cIm  51m1lt    −”=””
−(1)’it = Xm5is+ (#t−,−yr
 )・拳・−−−−−−−−(8)したがって、 1u+1祠m(siぬ−を七u (@t−Tπ)〕=m
2xIB@B昭#tゴオ)・閘(百K)=−IBssi
i(St−7g)=−1v =  (4)となるので。
Winter u = cIm 51m1lt −”=””
-(1)'it = Xm5is+ (#t-, -yr
)・Fist・−−−−−−−−(8) Therefore, 1u + 1 shrine m (sinu− 7u (@t−Tπ))=m
2xIB@BSho#tgoo)・閘(100K)=-IBssi
Since i(St-7g)=-1v=(4).

1v=−(1マ+1v)  −・・・・・・・1旧・・
−(5)となり1式(6)の演算を行うことKよ、6v
相電流it を求めることができ、演算回路43はこの
演算機能を有している。したがって、第4図(1)に示
すように、4uとiwの検出信号に基づいて破線で示さ
れるマ相信号1vを求めると六ができる。
1v=-(1ma+1v) -・・・・・・・1 old・・
-(5) and perform the operation of equation (6) K, 6v
The phase current it can be determined, and the arithmetic circuit 43 has this arithmetic function. Therefore, as shown in FIG. 4(1), when the main phase signal 1v shown by the broken line is obtained based on the detection signals 4u and iw, 6 is obtained.

また、絶対値変換回路44υ、447,44Wは、第一
図…)に示すように、電流信号1u、1マ、iwを半波
!1欅し九絶対値信号11ul、liv  I、11w
1を得、さらに、平均値回路46は、第4図(0)に示
すような出力電流の平均値信号1fを得ており、第2図
O電圧制御回路21の電流基準信号Xfiをベースに上
記平均値信号1fをフィードバック信号としてマイナー
ルーズに設は要電流制御回路46に入力してフィードバ
ック制御を行うことによシ、電動機電流を常に所定の値
に制御することができる。
In addition, the absolute value conversion circuits 44υ, 447, and 44W convert the current signals 1u, 1ma, and iw into half-waves, as shown in Figure 1...). 1 Keyaki Shi9 absolute value signal 11ul, liv I, 11w
1, and furthermore, the average value circuit 46 has obtained an average value signal 1f of the output current as shown in FIG. The motor current can always be controlled to a predetermined value by inputting the average value signal 1f as a feedback signal to the current required control circuit 46 to perform feedback control.

また、負荷変動によシ上記平均値信号if’が変動して
も偏差信号1Δが小さくなシ、変調軍を低下させ電動機
電流は基準値xBに基い電一定に制御される。したがっ
て、たとえ負荷変動が生じても電動機電流の脈動を抑制
することができ、インバータINVの安定し光制御を営
むことができる。
Further, even if the average value signal if' changes due to load fluctuation, the deviation signal 1Δ is small, so that the modulation force is reduced and the motor current is controlled to be constant based on the reference value xB. Therefore, even if load fluctuation occurs, pulsation of the motor current can be suppressed, and the inverter INV can be stably controlled.

さらに、第6図は本発明の変形例で、第2図の構成と異
なるところは、インバータxMvの出力電圧σfの検出
を行表わずに絶縁整形回路19を撤去して、その代〕K
負荷電動機の軸端に速度発電°磯TGを設け、これにゲ
イン調整回路47を接続して速度検出信号nfをフィー
ドバックした点にある。″ここで、基準信号と”しては
、速度基準信号NJiが用いられ第2図と同一に入力制
御回路加を経て信号NRFを得これを制御系に与える。
Furthermore, FIG. 6 shows a modification of the present invention, which differs from the configuration in FIG. 2 in that the insulation shaping circuit 19 is removed without detecting the output voltage σf of the inverter xMv, and the replacement]K
A speed generator TG is provided at the shaft end of the load motor, a gain adjustment circuit 47 is connected to this, and a speed detection signal nf is fed back. Here, the speed reference signal NJi is used as the reference signal, and the signal NRF is obtained through the input control circuit in the same manner as in FIG. 2 and is applied to the control system.

一般的に。Typically.

PfMインバータの出力電圧は所−パルヌ列状で。The output voltage of the PfM inverter is in the form of a PfM series.

しかもサージ電圧が重畳することもi為めで、精密な速
度検出信号vfの検出は困難であるが、第6図構成にお
いては、速度発電機!Gを用いている□ので正確な速度
検出が行−得、したがって制御精度を第2図構成よシ改
善すゐことができる。
Moreover, since surge voltage is superimposed, it is difficult to accurately detect the speed detection signal vf, but in the configuration shown in FIG. 6, the speed generator! Since G is used, accurate speed detection can be performed, and control accuracy can therefore be improved compared to the configuration shown in FIG.

また、第6図は第2図の一部構成を改良したもので、第
2図の電圧制御□回路21と電流制御回路46との間に
演算回路槌を挿入して、電流基準信号IRと励磁電流設
定基準Io釜上記演算回路槌に入力し、この演算回路に
よ’)fiの演算を行うことによシ1次電流基準信号I
、を求めるようにしたものである。
6 is a partial improvement of the configuration of FIG. 2, in which an arithmetic circuit mallet is inserted between the voltage control □ circuit 21 and the current control circuit 46 in FIG. 2, and the current reference signal IR and The excitation current setting standard Io is input to the above-mentioned arithmetic circuit mallet, and this arithmetic circuit calculates the primary current reference signal I.
.

上記電流基準信号IRは、本来トルク、つまり   −
2次電流Hに相□当する島のであシ、他方、出力電流信
号1fは電動−の1次電流1.を検出して得たものでh
;bej÷、したがって、上記演算回路Ml/C0(j
℃1匹−70演!によって1次電流基準工、釡求応てキ
″λに基づいて1次電流を制御す 、゛れば、*g図め
構成゛よ〕良好な制御特性が得られる。を九1弱め界磁
の運iを′行う時には、速度の上昇につれて励磁電流設
定基準1.を小さくするパターン回路を設けても良い。
The above current reference signal IR is originally a torque, that is, -
The output current signal 1f corresponds to the secondary current H, while the output current signal 1f corresponds to the primary current 1. The result obtained by detecting h
;bej÷, therefore, the above calculation circuit Ml/C0(j
℃1 animal - 70 performances! If the primary current is controlled based on the primary current reference work and the kettle response key ``λ,'' then good control characteristics can be obtained as in the configuration shown in *g. When carrying out the operation i', a pattern circuit may be provided that reduces the excitation current setting standard 1. as the speed increases.

  。  .

さらに%前述した第6図の実施例においても速度制御回
路21&と電流制御回路揺との間に演算回路48を挿入
して同様な演算を行うことKよシ1次電流基準I、を求
め、これに基づiて1次電流を制御し制御特性を改善す
ることができる。
Furthermore, in the embodiment shown in FIG. 6 described above, the calculation circuit 48 is inserted between the speed control circuit 21 and the current control circuit 21 and the same calculation is performed. Based on this, the primary current can be controlled and the control characteristics can be improved.

なお、上述し丸缶実施例においては、負荷を同期電動機
に%速贋発電機!GをパルスジェネレニタP()K代え
て賜同様な効果を奏する□こと逗でき。
In addition, in the above-mentioned round can embodiment, the load is a synchronous motor and a % speed counterfeit generator! It is possible to replace G with a pulse generator P()K to achieve the same effect.

また、出力電流の基本波実効値にクーては出力電流の平
均値を演算するζ表によって等制約に求めてやるが、基
本波実効値の算定法線これに限定されることはない。
Further, the effective value of the fundamental wave of the output current is obtained with equal constraints using the ζ table for calculating the average value of the output current, but the calculation normal of the effective value of the fundamental wave is not limited to this.

以上のように本発明によれば、電動機電流を昆較的容易
に検出でき、かり電−機電流を常時監視制御して安定し
九運転を営むことかで自る電圧形PWMインバータの制
御装置が得られる。
As described above, according to the present invention, the control device for a voltage type PWM inverter is capable of detecting the motor current relatively easily and constantly monitoring and controlling the motor current to perform stable operation. is obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のインバータの制御装置を示すブロック図
、第2図は本発明の一実施例による制御装置のブロック
図、第8図は1s2図の部分詳細構成図、l1r4図は
第8図の各部動作波形を示す波形図、第6図と第6図状
本発明の他の実施例を示すブロック図である。 XHv−インバータ、Rν・・・整流回路、X−・・・
誘導電動機: is=・−絶縁整形回路s 2om’s
入力制限回路、21−電圧制御回路%22−”P W 
M制御回路。 蓼・・・基本波発生回路、24・・・比較回路、25・
−v−y変換回路、’2s*a・搬送波発生回路、27
***分周回路。 四・−リンダカウンタ、29・−論理合成回路、 31
−・・ペースドライブ回路、am(、as、・・・電流
検出器。 1u、1マ、iW−相電流検出信号、43・−演算回路
。 45−・平均値回路、46−・・電流制御回路。 出願人代理人 、猪 股   清 馬6図
Fig. 1 is a block diagram showing a conventional inverter control device, Fig. 2 is a block diagram of a control device according to an embodiment of the present invention, Fig. 8 is a partial detailed configuration diagram of Fig. 1s2, and Fig. l1r4 is Fig. 8. FIG. 6 is a waveform diagram showing operation waveforms of each part of FIG. 6, and FIG. 6 is a block diagram showing another embodiment of the present invention. XHv-inverter, Rν... rectifier circuit, X-...
Induction motor: is=・-insulated shaping circuit s 2om's
Input limit circuit, 21-voltage control circuit%22-”P W
M control circuit.蓼... Fundamental wave generation circuit, 24... Comparison circuit, 25.
-vy conversion circuit, '2s*a/carrier generation circuit, 27
***Divider circuit. 4.-Linda counter, 29.-Logic synthesis circuit, 31
-...Pace drive circuit, am(, as,...Current detector. 1u, 1ma, iW-phase current detection signal, 43--Arithmetic circuit. 45--Average value circuit, 46--Current control Circuit. Applicant's agent, Inomata Kiyoma 6 Figure

Claims (1)

【特許請求の範囲】[Claims] 1.1!力、用制御整流素子のブリッジ構成と電力用整
流素子のブリッジ構成との逆並りq接続で成る電圧形イ
ンバータにシーで、インバータの出力電圧の平均値上出
力電圧検出信号とし仁の出方電圧検出信号と電圧基準信
号とを入力する電圧ItlIJ#回路から偏差信号を得
て電流基準信号とする七共に、上記インバータの出方電
流を検出して基本a実効値を演算し出力電流検出信号と
し。 制御系のマイナーループに設けた電流制御回路に上記電
流基準信号と出方電流検出信号とを人、力として、それ
らの電流−差信号に応じてパルス幅変調制御を行うと共
に、上記電圧基準信号に応じて出力周波数を制御するこ
とを特徴とした電圧形PfMインバータの制flJ装置
。 区 上記インバータの三相出力のうち、三相分の出力電
流を検出し工演算回路に入力し上記三相分を加算して+
M惟反転することによシ他の一相の出力電流を求め、こ
れら各相の出力電流を実効値回路に入力し工上記基本波
実効値を求めると共に、この基本波実効値を上記電流制
御回路に入力してフィードバック制御すること’elf
#徴とする特許請求の範囲第1項記載の電圧形P1Mイ
ンバータの制御装置。 亀 上記電圧制御回路と上記電流制御回路との間に2次
−1次変換演算手段を設けて上記電流基準信号と励磁電
痺設定信号を入力して1次電流基準を演算し、この、1
次電流基準と上記出力電流基準反実効値信号とを上記電
流制御回路に入力してフィードバック制御することt%
徴とする特許請求の範囲第41項または第2項に記載の
電圧形PlFMインバータの制御装置。
1.1! In a voltage source inverter consisting of a reverse parallel q connection between a bridge configuration of power control rectifiers and a bridge configuration of power rectifiers, an output voltage detection signal above the average value of the inverter output voltage is output. A deviation signal is obtained from the voltage ItlIJ# circuit, which inputs the voltage detection signal and the voltage reference signal, and is used as a current reference signal.In addition, the output current of the inverter is detected, the basic a effective value is calculated, and the output current detection signal is generated. year. The current reference signal and the output current detection signal are applied to the current control circuit provided in the minor loop of the control system, and pulse width modulation control is performed according to the current-difference signal between them, and the voltage reference signal is A control flJ device for a voltage source PfM inverter, characterized in that it controls an output frequency according to the frequency. Of the three-phase output of the above inverter, the output current for three phases is detected, inputted to the engineering calculation circuit, and the above three phases are added up.
The output current of the other one phase is determined by reversing the current, and the output current of each phase is input to the effective value circuit to obtain the fundamental wave effective value, and this fundamental wave effective value is used for the current control described above. Feedback control by inputting to the circuit'elf
A control device for a voltage-type P1M inverter according to claim 1, wherein: Tortoise A secondary-to-primary conversion calculation means is provided between the voltage control circuit and the current control circuit, and the current reference signal and the excitation electroparalysis setting signal are inputted to calculate the primary current reference.
Feedback control is performed by inputting the next current reference and the output current reference inverse effective value signal to the current control circuit t%
A control device for a voltage-type PIFM inverter according to claim 41 or 2.
JP56139015A 1981-09-03 1981-09-03 Controller for voltage type pwm inverter Pending JPS5843185A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56139015A JPS5843185A (en) 1981-09-03 1981-09-03 Controller for voltage type pwm inverter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56139015A JPS5843185A (en) 1981-09-03 1981-09-03 Controller for voltage type pwm inverter

Publications (1)

Publication Number Publication Date
JPS5843185A true JPS5843185A (en) 1983-03-12

Family

ID=15235477

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56139015A Pending JPS5843185A (en) 1981-09-03 1981-09-03 Controller for voltage type pwm inverter

Country Status (1)

Country Link
JP (1) JPS5843185A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60257773A (en) * 1984-05-31 1985-12-19 Shinano Denki Kk Control circuit of inverter
KR100438976B1 (en) * 1997-09-12 2004-09-04 엘지산전 주식회사 Phase current detection apparatus for inverter, including rectifier unit, switching unit, detection unit, filter, analog-digital converter, phase current averaging unit, control unit, and pulse width modulation signal

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60257773A (en) * 1984-05-31 1985-12-19 Shinano Denki Kk Control circuit of inverter
KR100438976B1 (en) * 1997-09-12 2004-09-04 엘지산전 주식회사 Phase current detection apparatus for inverter, including rectifier unit, switching unit, detection unit, filter, analog-digital converter, phase current averaging unit, control unit, and pulse width modulation signal

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