JPS584183A - Pattern compression system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pattern reduction method for various patterns used in display devices and printing devices.

Generally, these patterns are stored in a memory called a character generator, and a predetermined pattern is read out using a code and printed or displayed. As is generally known, this character generator requires a huge amount of storage capacity. In addition, it was necessary to prepare several types of printers with a desired size based on the size of characters to be printed.

Conventionally, the following method has been adopted in the Yarakuta Generator to reduce the storage capacity. In other words, this method stores only semi-sized patterns in the character generator, and when a pattern larger than this aAfs size is required, the pattern is enlarged and displayed by opening a predetermined interval between the patterns. Alternatively, printing was performed, and if a smaller pattern than the standard pattern was required, the pattern was thinned out and used.

However, in this method, although the ability to enlarge the pattern is good, when reducing the pattern, it is rarely possible to simply thin out the pattern, so a clear pattern cannot be obtained.

Therefore, it is an object of the present invention to provide a pattern reduction method that eliminates such drawbacks. a first detection means for detecting in each digit that a pattern exists between the digits; a digit that is the same as the detected digit of the odd-numbered column' between the even-numbered columns where the pattern is detected by the first detection means; A first pattern addition means for adding a pattern to a digit, and a pattern in the remaining even numbered columns that is not detected by the first pattern detection means is in any range of 2 to iΣ columns + 2 to 4N columns. As a result of the detection by the second detection means for detecting the existence of each digit, if a pattern is detected in the 2nd to 1Σ columns, the pattern is detected in the first column from the detected column. Add a pattern to the same digit as the detected digit, and when a pattern is detected in columns 4N- to 4N, add a second pattern that adds the pattern to the same digit as the detected digit in the +11th column from the detected column. Each of these means adds a predetermined pattern to the odd-numbered columns, and the patterns in these odd-numbered columns form a desired 77% pattern.By reducing the patterns, a coupled fist is created. The present invention will be explained below with reference to the drawings. Figure 2)-1 shows an embodiment of the entire pattern M system of the present invention. In the figure, 1 is a character generator, 2a to 21 are
Register Sen, 3 to 7 are the OR gate group, 8 to] l is the etal exhaustive OR gate group, and 12 to 14 are the AND gate group, respectively. ・L is a character generator that generates the desired address with a fist pointing at a predetermined address. The pattern is read. These read patterns are stored in registers 2a-21 for each column. Each gator group 3-14 is
Each has a number of gates corresponding to the number of digits of the pattern.

Figure 2 (1) shows the pattern before reduction;
% (2) shows the patterns after aii+ First, we will explain the principle of the pattern reduction method of the present invention using FIG. +! I will clarify. In this example, a pattern of 9 columns x 13 digits is M+ reduced to 5 columns x 13 digits. In order to perform this reduction, in the present invention, the odd columns are used as they are, and the data of the even columns are reduced to the odd columns. 1. 4 inventions. A contraction of C+ or less. two. This will be done according to regulations.

(2) If pattern data exists in columns adjacent to each other in the same digit in even-numbered columns, pattern data is added to the same digit in the odd-numbered columns between them.

In Figure 82 (1), 1 digit corresponds to 0 digit in the 2nd and 4th columns, and 1 digit corresponds to M in the 6th and 8th columns.
The digits correspond.

■ For the pattern data in even numbered columns that did not apply in the above ■, for the data in the even numbered columns from the second column to the center column, the pattern is placed in the same digit in the 11th column for each digit, with the center column being Yanagi. A gator is added, and pattern data is added to the same digit in the +11th column for each digit for data in even-numbered columns in the nth column from the center column. In FIG. 2(1), the 1st digit in the second column, the H digit in the 4th column, the 1st digit in the 6th column, and the 6th digit in the 8th column correspond. If we take out only the odd columns added in this way, the second
It is structured as shown in Figure Q), and the pattern data indicated by the mark is newly added by 11%, and the pattern in Figure 2 Q) is reduced by III. Returning to FIG. 2, an embodiment will be described in which pattern reduction is performed by coupling the rules (1), 1v, and (2) explained in FIG. First, the AND gate group 12.13.14 and the OR gate group 4.5.6 add patterns to odd-numbered digits by determining the above-mentioned rule (2).

That is, a group of AND gates 12 for determining whether or not pattern data is stored in each digit in registers 2b and 2d storing adjacent even-numbered gators, and pattern data in registers 2d and 2f. The AND gate group 13 determines whether pattern data is stored in the mlζ registers 2f and 2h, and the AND gate group 14 determines whether pattern data is stored in the same mlζ registers 2f and 2h.
If it is satisfied, the AND gate group 12.13.14 produces outputs only for the digits that satisfy each digit, and each of these outputs has the same digit as the middle odd digit. Data is outputted from OR gate groups 4, 5, and 6, respectively, so as to add a pattern to .This adds the pattern specified in (2) above.

On the other hand, regarding the above-mentioned provision (■), (Anime game used for determination to add the pattern specified in v) evaluation 12
．． Using the output of 13.14, exclusive or gate 98.9.10.11% and or gate group 3.
Add a pattern using 4.6.7 in line 9, i.e. exclusive or gate group 8.9.10.11
In the case of smell, even-numbered column data (registers 2b, 2d, 2f, 2h
AND gate group 12 to detect data stored in
．． In order to extract only the pattern data for which the output of 13.14 did not occur, the AND gate group 12.13.14 is input, and only the digits with the pattern data outside the specifications of ① above are output for each even number column. , exclusive OR gate groups 8 and 9 respectively input pattern data to the OR gate group 3.4 in order to add pattern data to the 11th odd column.

On the other hand, the pattern data detected and output by exclusive OR gate groups 10 and 11 is input to OR gate groups 6.7, respectively, in order to add pattern data to the +1100 even number column.

In this way, the pattern data added to the odd-numbered columns to satisfy the above-mentioned regulations (2) and (2) is the data that was in the odd-numbered columns from the beginning (Register 2J1%2C%2 es 2
gs2') from the OR gate group 3.4.5.6.7. Eventually, the reduced pattern shown in Figure 2 (2) will be obtained.

As described above, in the present invention, it is possible to reduce the pattern to 2N+1 columns of 4N+1 columns stored in a character generator, etc., so there is no need to prepare various patterns of different sizes, and the memory capacity is reduced. It can be reduced. Furthermore, since pattern reduction is performed using two simple regulations, pattern reduction can be achieved with a simple circuit configuration.

[Brief explanation of the drawing]

FIG. 1 shows an embodiment of the pattern reduction method of the present invention, FIG. 2 (1) shows the pattern before reduction, and FIG. 2 (2) shows the pattern after reduction. ~2i is a register group, 3 to 7 is an or gate group, 8 to 11 is an extrusive or gate group, 1
2 to 14 indicate AND gate groups, respectively. (1) % 2 eyes 12)

Claims (1)

[Claims] In a pattern reduction method that reduces a pattern composed of 4N+1 columns to 2N+1 columns, a first detection method detects, in each digit, that patterns exist in the same digit in adjacent even-numbered columns. means, a first pattern adding means for adding a pattern to the same digit as the detected pattern of the odd numbered columns between the even numbered columns where the pattern is detected by the first detecting means; and a first pattern detecting means. a second detection means for detecting the remaining even number column patterns not detected by 2 to iL columns for each digit, the second detection means 4N;
- As a result of detection of the output means, when a pattern is detected in columns 2 to T-, the pattern is placed in the same digit as the detected digit in the first column from the detected column, and the pattern is placed in columns 11 to 4N. It is comprised of a second pattern adding means that adds a pattern to the same digit as the detected digit in the +1 column from the detected column when the pattern is detected, and each of these means adds a predetermined pattern to the odd numbered column. , a pattern reduction method characterized by reducing a pattern by constructing a desired pattern with odd-numbered patterns.