JPS5841699B2 - Atsushi Cairo - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a companding circuit used in devices that digitize and transmit signals.

Conventionally, when audio signals are digitized and transmitted, recorded, or reproduced, a compandor is used to widen the dynamic range of the transmission and recording.

This is especially true when the amplitude distribution is extremely biased toward low levels, such as in speech, by quantizing coarsely at large amplitudes and finely quantizing at low levels. ) within the allowable range, and (S/N
), it is possible to widen the effective dynamic range.

A simple method is to place non-linear means to suppress large amplitude levels and extend small amplitude levels before encoding on the transmitting side.
After compressing the analog quantity, linear encoding is performed, and on the receiving side, after decoding, the original waveform is restored using a non-linear amplifier having characteristics inverse to compression.

The device that performs this compression and expansion is called an analog compandor.

An important problem with this method is the configuration for identifying the level of the compander.

The present invention provides a companding circuit that performs level identification digitally and has improved stability.

Examples of the present invention will be described below.

In Figure 1, 1 is an analog signal input terminal, 2 is a sample-and-hold amplifier, 3 is a variable gain amplifier whose gain can be varied, 4 is an analog-to-digital converter, 5.6 is a data reading device, and 7 is a control clock. signal generator,
8 is a logic circuit for level identification, 9 is an output buffer,
10 is the output terminal on the recording (transmission) side, 11 is the playback (reception) side
side input terminal, 12 is an input buffer, 13 is a digital-to-analog converter, 14 is a control clock signal generator, 15 is a logic circuit for level discrimination, 16 is a variable gain amplifier whose gain can be varied, 17 is an analog gate, 18
1 is a low-pass filter for demodulation, and 19 is an analog signal output terminal.

Next, the operation of the embodiment configured as above will be explained.

An analog signal subjected to band limitation necessary for sampling is supplied to an input terminal 1.

The input signal is sampled by a sample and hold amplifier 2, passes through a variable gain amplifier 3, and is applied to an analog-to-digital converter 4.

First of all, this analog-to-digital converter 4 is used for level identification.

For example, when a companding characteristic as shown in Figure 2 is given, it is necessary to distinguish whether the signal level is between A and A' or somewhere else (between B' and A' or between B and A). .

At this time, the variable gain amplifier 3 is set to a predetermined gain of the level discrimination moat by a command from the level discrimination logic circuit 8.

The digital signal converted from the analog signal is read into a device 6 consisting of a latch for level identification, and the data is sent to a logic circuit 8 for level identification.

The level is identified by the logic circuit 8, a control signal is sent to the variable gain amplifier 3, and the gain of the variable gain amplifier 3 is set in accordance with the identified level.

In other words, as shown in Fig. 2, A where the level of the input signal is low
-A', the output level of the variable gain amplifier 3 is C-
Cl, the gain of the variable gain amplifier 3 is set so that the ratio of the output signal level to the input signal level is 1 or more, and the input signal level is sufficiently large A-B, A'-B'
In the section, the output level of the variable gain amplifier 3 is C-D, C
'-D', and the gain of the variable gain amplifier 3 is set so that the ratio of the output signal level to the input signal level is 1 or less.

To further explain this, A to D in Fig. 2 above,
The characteristics shown in FIG. 2 can be expressed in the following equation, assuming that the voltage at each point of A'-d is a"-d, the input terminals -a to -d1 are Vin, and the output voltage is Vout.

However, 2 in kl is a coefficient that determines the slope of the straight line.

In order to provide the variable gain amplifier 3 with such input/output characteristics, for example, Japanese Patent Application No. 50-47756 (%89)
As shown in Japanese Patent No. 123005), it can be constructed using a plurality of reference voltages, comparators, switching elements, resistors that give the slope of the broken line, gate circuits, operational amplifiers, and the like.

In other words, if the input voltage is within the range from -a to a, the input voltage will be amplified and the output will be obtained, but if the input voltage is within the range of a
When the range is from b to b or from -b to -a, the output voltage C or -0 when the input voltage is a or -a is given as a bias in advance, and the input voltage is applied above this output voltage C) -e. The configuration is such that an output voltage corresponding to the voltage obtained by subtracting a or a from the sum of the output voltages is output.

In this way, when the level of the input signal is low, the input level of the analog-to-digital converter 40 is increased to perform fine quantization, and when the level of the input signal is high, the analog/digital converter 40 increases the input level and performs fine quantization.
By reducing the input level of the digital converter 4 and coarsely quantizing it, digital conversion is performed so that the S/N ratio during large inputs is suppressed within an allowable range and the S/N ratio during low inputs is improved.

The data converted into a digital signal at this time is read into the data reading device 5 as signal data, sent to the output buffer 9, subjected to code conversion for recording or transmission, and sent to the output terminal 10.

The signal sent out from the output terminal 10 is recorded or transmitted, and sent to the input terminal 11 on the playback side or the reception side.

Thereafter, the input buffer 12 performs the inverse code conversion of the code conversion received at the output buffer 9 and decodes the signal.

The decoded data is sent to the digital-to-analog converter 13
, a control clock signal generator 14, and a level identification logic circuit 15.

Digital to analog converter 13 performs digital to analog conversion and is applied to variable gain amplifier 16.

The generator 14 also generates various control clock signals.
Controls level identification logic circuit 15 and analog gate 17.

The level identification logic circuit 15 performs level identification opposite to that of the recording side logic circuit 8.

In other words, the level of the input signal is at C-C or otherwise D.
-C, D'-C/.

Then, the logic circuit 15 identifies the level of the input signal to the digital-to-analog converter 130 so as to have an inverse relationship with that of the logic circuit 8, and sends a control signal to the variable gain amplifier 16, so that the level of the input signal to the digital-to-analog converter 130 is inversely determined by the logic circuit 15, and a control signal is sent to the variable gain amplifier 16, so that the level of the input signal to the digital-to-analog converter 130 is inversely determined by the logic circuit 8. The gain of variable gain amplifier 16 is set accordingly.

In other words, as shown in FIG. 3, when the input signal level is low c-
In the section c', the gain of the variable gain amplifier 16 is set so that the output signal level is A-A' and the ratio of the output signal level to the input signal level is 1 or less, and the input signal level is large C-D. , C'-D', the gain of the variable gain amplifier 16 is set so that the output signal levels become A-B and A'-B', and the ratio of the output signal level to the input signal level becomes 1 or more. Ru.

This variable gain amplifier 16 is constructed in the same way as the variable gain amplifier 3 described above, but its gain settings are reversed. For example, when the gain of the amplifier 3 is 2, the gain of the amplifier 16 is set to 1/2. so that the overall input/output characteristics become 1.

The output in FIG. 4 is the output before the gain of the amplifier 16 is set, but after the gain is set, the signal becomes the signal shown in FIG. 4A.

Since this level conversion requires a transient time, the analog gate 17 is closed by the control signal from the generator 14 in the transient state, and after a certain period of time, the gate is opened by the gate pulse shown in FIG. The analog signal shown in 2 is obtained and sent to the low-pass filter 18 for demodulation to become an analog signal.

The analog signal is output from the output terminal 19.

The signal obtained in this way is quantized by passing through a compander, so that it is coarsely quantized when the amplitude is large, and finely quantized when the amplitude is small.

Although the above embodiment has been described with respect to three fold lines, the number of fold lines can be arbitrarily set, and further enlargement can be achieved.

As explained above, the companding circuit of the present invention includes a sample-and-hold circuit (sample-and-hold amplifier 2 in this embodiment) that samples an input signal, and a first variable gain amplifier (in this embodiment, the sample-and-hold amplifier 2) that receives the output of the sample-and-hold circuit as an input. In this embodiment, a variable gain amplifier 3) and an analog-to-digital conversion circuit (in this embodiment, an analog-to-digital converter 4) that converts the output of the first variable gain amplifier into a digital signal are provided.
), and a control means (logic circuit 8 or the like in this embodiment) that identifies the level of the input signal from the digital signal output from the analog-digital conversion circuit and sets the gain characteristic of the first variable gain amplifier. The gain characteristic of the first variable gain amplifier is set non-linearly by the control means so that the level of the input signal is suppressed when the level is high and the level is increased when the level of the input signal is low. A compressed analog signal is obtained as the output of the variable gain amplifier, and the output of the analog-to-digital conversion circuit is input and converted into an analog signal.
an analog conversion circuit (digital-analog converter 13 in this embodiment), a level identification circuit (logic circuit 15, etc. in this embodiment) that identifies the level of a compressed analog signal from a transmitted or recorded digital signal; Based on the identification result of this level identification circuit, a second variable gain amplifier (in this embodiment, The present invention is characterized by the provision of a variable gain amplifier 16), and since the level is digitally identified according to the present invention, stable level identification is possible and the dynamic range can be expanded.

Furthermore, since the companding is performed in the analog part, the number of bits of the analog-to-digital converter and the digital-to-analog converter can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a companding circuit according to an embodiment of the present invention, FIGS. 2 and 3 are characteristic diagrams thereof, and FIG. 4 is a signal waveform diagram. 2...Sample hold amplifier, 3,16°°
°°°. Variable gain amplifier, 4...analog-digital converter, 8, 15...level identification logic circuit,
13...Digital-to-analog converter.

Claims (1)

[Claims] 1 A sample-and-hold circuit that samples a human signal and the output of the sample-and-hold circuit are input, and when in the input signal and level identification mode, the gain is set to a predetermined gain for the level identification mode, and when in the companding mode, the output is set to the identified level. a first variable gain amplifier whose gain is set according to the gain, an analog-to-digital conversion circuit that converts the output of the first variable gain amplifier into a digital signal, and an output of the analog-to-digital conversion circuit in the level discrimination mode. control means for identifying the level of the input signal from the digital signal and setting the gain characteristic of the first variable gain amplifier based on the identification result, the control means adjusting the level when the level of the input signal is large; The gain characteristic of the first variable gain amplifier is set non-linearly so as to suppress the level of the input signal and extend this level when the level of the input signal is small, and the compressed analog signal obtained as the output of the first variable gain amplifier is a compression circuit that obtains a digital signal to be transmitted or recorded by converting it into an analog-to-digital signal using an analog-to-digital conversion circuit; a digital-to-analog conversion circuit that receives the transmitted or recorded digital signal and converts it into an analog signal; or a level identification circuit that identifies the level of the compressed analog signal from the recorded digital signal; and based on the identification result of this level identification circuit, the analog signal output of the digital-to-analog conversion circuit is converted to the first variable gain. 1. A companding circuit comprising: an expansion circuit provided with a second variable gain amplifier that expands with characteristics opposite to those of compression by the amplifier.