JPS5837142Y2 - automatic gain control device - Google Patents

automatic gain control device

Info

Publication number
JPS5837142Y2
JPS5837142Y2 JP15748077U JP15748077U JPS5837142Y2 JP S5837142 Y2 JPS5837142 Y2 JP S5837142Y2 JP 15748077 U JP15748077 U JP 15748077U JP 15748077 U JP15748077 U JP 15748077U JP S5837142 Y2 JPS5837142 Y2 JP S5837142Y2
Authority
JP
Japan
Prior art keywords
diode
automatic gain
gain control
reverse
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15748077U
Other languages
Japanese (ja)
Other versions
JPS5483846U (en
Inventor
祐作 佐藤
俊夫 松田
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP15748077U priority Critical patent/JPS5837142Y2/en
Publication of JPS5483846U publication Critical patent/JPS5483846U/ja
Application granted granted Critical
Publication of JPS5837142Y2 publication Critical patent/JPS5837142Y2/en
Expired legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Description

【考案の詳細な説明】 本考案は自動利得制御装置に係り、特に、検波出力段か
ら取り出した正方向出力信号および負方向出力信号の交
流成分を相殺する如くなし、歪率の改善を図る様にした
自動利得制御装置に関する。
[Detailed Description of the Invention] The present invention relates to an automatic gain control device, and in particular, it is designed to cancel the alternating current components of the positive direction output signal and the negative direction output signal taken out from the detection output stage, and to improve the distortion factor. The present invention relates to an automatic gain control device.

従来から、トランジスタ受信機などに於いて、高周波増
幅段および中間周波増幅段にリバースAGC信号を印加
して自動利得制御を行う回路について、諸々の技術が提
供されているが、斯かる回路に於いては、上記各増幅段
の利得を零にすることが出来ず、このため大入力信号が
印加されると歪の発生を増加する傾向にある。
Conventionally, various technologies have been provided for circuits that perform automatic gain control by applying a reverse AGC signal to the high frequency amplification stage and intermediate frequency amplification stage in transistor receivers and the like. In this case, the gain of each amplification stage cannot be made zero, and therefore distortion tends to increase when a large input signal is applied.

この為、中間周波段の後に接続された検波ダイオードの
外に、中間周波増幅段を構成する被自動利得制御トラン
ジスタのエミッタと高周波増幅段のベースとの間に自動
利得制御トランジスタを接続して、中間周波回路の後段
にエミッタ電流を減少せしめ、更に高周波段にはエミッ
タ電流を増大せしめる様なAGC信号を供給する如くし
た自動利得制御装置などが提案されているが、これらは
回路構成が複雑となり、特に、オーテ゛イオ信号の低域
での歪率の改善が好ましくない。
For this purpose, in addition to the detection diode connected after the intermediate frequency stage, an automatic gain control transistor is connected between the emitter of the automatic gain control transistor constituting the intermediate frequency amplification stage and the base of the high frequency amplification stage. Automatic gain control devices have been proposed that supply an AGC signal that reduces the emitter current to the latter stage of the intermediate frequency circuit and increases the emitter current to the high frequency stage, but these devices have complicated circuit configurations. In particular, it is not desirable to improve the distortion rate in the low frequency range of audio signals.

本考案は斯かる点に鑑みてなしたものであり、従って本
考案の目的とするところは、中間周波段の出力側に順方
向および逆方向ダイオードを介して接続された、それぞ
れフォワードAGC線路およびリバースAGC線路間に
コンテ゛ンサを接続して、上記各ダイオードを経て得ら
れる検波出力信号の交流骨を相殺する如くなして、上記
歪率を大巾に改善する様にした、新規な自動利得制御装
置を提供するにある。
The present invention has been made in view of the above, and the object of the present invention is to provide a forward AGC line and a forward AGC line connected to the output side of the intermediate frequency stage via forward and reverse diodes, respectively. A new automatic gain control device in which a capacitor is connected between the reverse AGC lines to cancel out the alternating current of the detected output signal obtained through each of the diodes, thereby greatly improving the distortion factor. is to provide.

以下に、本考案の一実施例を図面について具体的に説明
する。
An embodiment of the present invention will be specifically described below with reference to the drawings.

1は図示し、ない周波数変換回路に接続された中間周波
増幅段の中間周波トランスであり、その中間周波トラン
ス1の2次側には検波用の逆方向ダイオード2を介して
、一端が接地された平滑コンデンサ3が接続されるとと
もに、そのダイオード2の出力側は直列抵抗4を介して
、検波出力の供給を受ける低周波増幅段に接続される如
くなっている。
1 is an intermediate frequency transformer of an intermediate frequency amplification stage connected to a frequency conversion circuit (not shown), and one end is grounded on the secondary side of the intermediate frequency transformer 1 via a reverse diode 2 for detection. A smoothing capacitor 3 is connected thereto, and the output side of the diode 2 is connected via a series resistor 4 to a low frequency amplification stage which receives a detection output.

5,6は上記コンテ゛ンサ3に対しそれぞれ並列接続さ
れた平滑コンデンサおよび抵抗である。
Reference numerals 5 and 6 denote a smoothing capacitor and a resistor connected in parallel to the capacitor 3, respectively.

また、上記2次側には検波用の順方向ダイオード7を介
して、一端が接地されたコンデンサ8が接続されるとと
もに、このダイオ・−ドアの出力側には直列抵抗9を介
して、その検波出力に依って駆動されるレベルメータが
接続されている。
Further, a capacitor 8 whose one end is grounded is connected to the secondary side through a forward diode 7 for detection, and a series resistor 9 is connected to the output side of this diode door. A level meter driven by the detection output is connected.

10.11は上記コンテ゛ンサ8に並列接続された平滑
コンテンサおよび抵抗である。
10.11 is a smoothing capacitor and a resistor connected in parallel to the capacitor 8.

一方、上記ダイオード2,7の出力側には、それぞれ信
号検出用の抵抗12.13を介して、リバースAGC線
路AおよびフォワードAGC線路Bを形成する抵抗14
.コンデンサ15および抵抗16.コンテ゛ンサ17よ
りなるそれぞれ積分回路が接続されるとともに、上記抵
抗12と14の接続中点および抵抗13と16との接続
中点の間に、図示の如き極性のコンデンサ18が接続さ
れている。
On the other hand, on the output side of the diodes 2 and 7, a resistor 14 forming a reverse AGC line A and a forward AGC line B is connected via a signal detection resistor 12, 13, respectively.
.. Capacitor 15 and resistor 16. Integrating circuits each consisting of a capacitor 17 are connected, and a capacitor 18 of the polarity shown is connected between the midpoint of the connection between the resistors 12 and 14 and the midpoint of the connection between the resistors 13 and 16.

斯かる構成になる回路に於いては、中間周波段に得られ
た信号からは、上記ダイオード2.コンテ゛ンサ3およ
び抵抗4を経て、図示の如き波形の負方向成分の検波出
力信号が得られ、これが低周波回路に供給されるととも
に、一方、上記ダイオード7、コンデンサ8および抵抗
9を経て図示の如き波形の正方向成分の検波出力信号が
レベルメータに供給される。
In a circuit having such a configuration, the signal obtained at the intermediate frequency stage is transmitted to the diode 2. Through the capacitor 3 and resistor 4, a detected output signal of the negative component of the waveform as shown in the figure is obtained, and this is supplied to the low frequency circuit. A detected output signal of the positive direction component of the waveform is supplied to a level meter.

同時に、これら正負方向成分の検波出力信号は、上記抵
抗12.13を介してコンテ゛ンサ18に供給され、こ
こで位相および絶縁レベルが等しい2つのオーディオ信
号の交流成分が互いに相殺される如くなって、それぞれ
正負の等しい直流レベルのリバースAGC信号およびフ
ォワードAGC信号が上記各積分回路を経て、それぞれ
高周波回路および周波数変換回路に供給され、各回路の
制御用能動素子をしてこのトランジスタ受信機の系のA
GC制御を図る如くなる。
At the same time, these detected output signals of positive and negative direction components are supplied to the capacitor 18 via the resistors 12 and 13, where the alternating current components of the two audio signals having the same phase and insulation level cancel each other out. The reverse AGC signal and the forward AGC signal, each having equal positive and negative DC levels, are supplied to the high frequency circuit and the frequency conversion circuit through the above-mentioned integration circuits, respectively, and are used to control the active control elements of each circuit to control the transistor receiver system. A
It becomes like trying to control GC.

特に、従来低域での歪率を改善するために、積分回路の
時定数を大きく選定していたことに依る、自動利得制御
の遅れを無くシ、同調時に於ける高利得大電流に依るメ
ータの振り切れを未然に防止できるなどの利点がある。
In particular, in order to improve the distortion rate in the low frequency range, the time constant of the integrating circuit was selected to be large, thereby eliminating the delay in automatic gain control, and eliminating the delay in automatic gain control, which was caused by the large time constant of the integrating circuit, and eliminating the delay in metering due to high gain and large current during tuning. This has the advantage of being able to prevent a run-out.

以上説明した如く、本考案に依れば、中間周波増幅段に
並列接続した検波用順方向ダイオードおよび逆方向ダイ
オードと、これらの両ダイオードにそれぞれ接続した積
分回路と、上記両ダイオードの出力側間に接続したコン
デンサとからなり、上記順方向ダイオードからの正方向
出力信号と逆方向ダイオードからの負方向出力信号との
交流成分を上記コンテ゛ンサに於いて相殺する如くなし
、上記各積分回路からリバースAGC信号およびフォワ
ードAGC信号を得る如くしたことに依って低域での歪
率を悪化せしめることなく、迅速な自動利得制御を簡単
な構成にて実現でき、実用に供して極めて有益である。
As explained above, according to the present invention, a forward diode and a reverse diode for detection are connected in parallel to the intermediate frequency amplification stage, an integrating circuit is connected to each of these diodes, and a circuit is connected between the output sides of the two diodes. The AC component of the positive direction output signal from the forward direction diode and the negative direction output signal from the reverse direction diode is canceled out in the above condenser, and the reverse AGC is connected from each of the above integration circuits. By obtaining the signal and the forward AGC signal, rapid automatic gain control can be realized with a simple configuration without deteriorating the distortion rate in the low frequency range, which is extremely useful in practical use.

【図面の簡単な説明】[Brief explanation of drawings]

図面は本考案に係る自動利得制御装置の一実施例を示す
回路図である。 1・・・・・・中間周波トランス、2・・・・・・逆方
向ダイオード、3・・・・・・順方向ダイオード、14
.15・・・・・・積分回路を構成する抵抗およびコン
デン・す、16.17・・・・・・積分回路を構成する
抵抗およびコンテ゛ンサ、18・・・・・・交流成分相
殺用のコンテ゛ンサ。
The drawing is a circuit diagram showing an embodiment of an automatic gain control device according to the present invention. 1...Intermediate frequency transformer, 2...Reverse diode, 3...Forward diode, 14
.. 15... Resistor and capacitor forming an integrating circuit, 16.17... Resistor and capacitor forming an integrating circuit, 18... Capacitor for canceling alternating current components.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 中間周波増幅段に並列に接続した検波用順方向ダイオー
ドおよび逆方向ダイオードと、これらの両ダイオードに
それぞれ接続した積分回路と、上記両ダイオードの出力
側間に接続したコンテ゛ンサとからなり、上記順方向ダ
イオードからの正方向出力信号と逆方向ダイオードから
の負方向出力信号との交流成分を上記コンデンサに於い
て相殺する如くなし、上記各積分回路からリバースAG
C信号およびフォワードAGC信号を得る如く構成した
ことを特徴とする自動利得制御装置。
It consists of a detection forward diode and a reverse diode connected in parallel to the intermediate frequency amplification stage, an integrating circuit connected to both of these diodes, and a capacitor connected between the output sides of both of the diodes. The alternating current components of the positive direction output signal from the diode and the negative direction output signal from the reverse direction diode are canceled in the above capacitor, and the reverse AG is connected from each of the above integration circuits.
An automatic gain control device characterized in that it is configured to obtain a C signal and a forward AGC signal.
JP15748077U 1977-11-25 1977-11-25 automatic gain control device Expired JPS5837142Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15748077U JPS5837142Y2 (en) 1977-11-25 1977-11-25 automatic gain control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15748077U JPS5837142Y2 (en) 1977-11-25 1977-11-25 automatic gain control device

Publications (2)

Publication Number Publication Date
JPS5483846U JPS5483846U (en) 1979-06-14
JPS5837142Y2 true JPS5837142Y2 (en) 1983-08-22

Family

ID=29148433

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15748077U Expired JPS5837142Y2 (en) 1977-11-25 1977-11-25 automatic gain control device

Country Status (1)

Country Link
JP (1) JPS5837142Y2 (en)

Also Published As

Publication number Publication date
JPS5483846U (en) 1979-06-14

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