JPS5836845B2 - Digital operation memory circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides, for example, a volume control device in an audio amplifier;
This invention relates to digital operations such as balance and the operation position storage circuit.

In recent years, for example, volume in audio amplifiers,
A device in which balance and other operations are performed through a digital circuit has been put into practical use.

An operating device using such a digital circuit generally has a pulse oscillator, a pair of pushbutton switches, and a programmable counter.By pressing one of the pushbutton switches, the programmable counter increments the pulses from the pulse oscillator in the adding direction. By counting and pressing the other push button switch, the counter counts the pulses in a subtractive direction, converts this counted value into an analog quantity, and controls the volume, balance, etc. according to this analog quantity. The device is activated.

By the way, when such a conventional digital operation circuit is incorporated into, for example, an audio amplifier, when the power of the audio amplifier is turned off, the power of the digital operation circuit is also turned off, so that the count value of the counter in the circuit is also erased.

Since it is uncertain what the count value of the counter will be when the power is turned on again, it is impossible to predict what the control state of each part will be.

Therefore, you can re-operate each operation part to set each part to the desired control (self).
It is inconvenient to have to readjust the condition.

Moreover, especially in a volume control circuit, if the count value of a counter in the circuit happens to become a large value when the power is turned on, a loud sound may suddenly be emitted.

The purpose of the present invention is to focus on the fact that users of audio amplifiers, etc. usually do not change the adjustment positions of the treble adjustment device, bass adjustment device, volume adjustment device, etc. once they have set them at the desired adjustment positions. Then, when the power of the audio amplifier, etc. is turned off and then turned on again, the treble adjustment device, bass adjustment device, volume adjustment device, etc. are automatically set to the adjustment position they were in before the power was turned off. Therefore, it is an object of the present invention to provide a digital operation storage circuit that eliminates the need to readjust each adjustment device when the power is turned on again.

The present invention will be explained below with reference to illustrated embodiments.

In FIG. 1, a pair of normally open switches 11a, 1l
b is the volume adjustment switch, and the switch 12a,
12b is the balance adjustment switch, also switch 1
3a and 13b are treble adjustment switches, switches 14a and 14b are bass adjustment switches, and switches 15a and 15b are so-called so-called switches that adjust the volume ratio between front speakers and rear speakers. It consists of a fade adjustment switch.

It is assumed that each of these switches is closed by pressing a push button that is individually protruded from the operation panel of the audio amplifier main body (not shown).

One end of each switch is connected to a predetermined power supply, the other end of each switch is grounded via a resistor of a predetermined value, and AND circuits 21a, 2lb, 22a, 2
2b, 23a, 23b, 24a, 24b, 25a, 25
b is connected to one input terminal of each.

The other input terminals of these AND circuits are collectively connected to the output terminal of an oscillator 16 that generates a pulse signal with a constant period.

The output terminal of the AND circuit 21a is connected to the addition input terminal of the programmable counter 31, and the output terminal of the AND circuit 2lb is connected to the subtraction input terminal of the counter 31.

Similarly, the output terminals of the AND circuits 22a and 22b are connected to the addition input terminal and the subtraction input terminal of the programmable counter 32, respectively.
The output terminals of b are connected to the addition input terminal and subtraction input terminal of the programmer counter 33, respectively, and the AND circuits 24a and 2
Each output terminal of 4b is a programmable counter 34.
An AND circuit 25 is connected to the addition input terminal and subtraction input terminal of
The output terminals of a and 25b are connected to an addition input terminal and a subtraction input terminal of a programmable counter 35, respectively.

Each counter 31 to 35 is configured with 4 bits,
24, that is, up to 16, and each 4-bit output signal from each of these counters is sent to a digital-to-analog converter 41, 42,
43, 44, and 45.

The output of the digital-to-analog converter 41 is applied to a volume control device, for example already known as an electronic volume, such that the volume increases as the analog signal of the converter 41 increases.

Similarly, the output of the digital-to-analog converter 42 is applied to a balance controller such that the output of the right channel is enhanced when the analog signal of converter 42 is large, and the output of the left channel is enhanced when the analog signal of converter 42 is small. The output of the channel is now enhanced.

The output of the digital-to-analog converter 43 is applied to a treble control device, and as the output of the converter 43 becomes larger, the level of the treble becomes higher.

The output of the digital-to-analog converter 44 is applied to a bass control device such that the higher the output of the converter 44, the higher the bass level.

Furthermore, the output of the digital-to-analog converter 45 is applied to a fade system, so that when the output of the converter 45 is large, the sound pressure level of the front speakers becomes high, and when the output of the converter 45 is small, the sound pressure level of the front speaker becomes high. The sound pressure level of the rear speakers is increased.

The 4-bit output signals of each of the counters 31 to 35 are connected to write signal input terminals of registers 51, 52, 5''3, 54, and 55, respectively.

It is assumed that each of the registers 51 to 55 is connected to a battery backup circuit or the like, and is a so-called non-volatile memory device whose memory is not erased even when the audio amplifier is turned off.

The output terminals of the set of AND circuits 2 1 a 3 2 l b are respectively connected to the two input terminals of the OR circuit 61, and similarly, the output terminals of the set of AND circuits 22a and 22b are respectively connected to the two input terminals of the OR circuit 62. The output terminals of the AND circuits 23a and 23b are connected to two input terminals of the AND circuit 23a and 23b, and the output terminals of the AND circuits 23a and 23b are connected to the two input terminals of the OR circuit 63,
The output terminals of 4a and 24b are connected to two input terminals of an OR circuit 64, respectively, and a set of AND circuits 25a and 25b are respectively connected to two input terminals of an OR circuit 64.
The output terminals of 25b are connected to two input terminals of the OR circuit 65, respectively.

Each output terminal of these OR circuits 61 to 65 is connected to a retriggerable multivibrator 71, 72, 73, 7, respectively.
It is connected to trigger input terminals 4 and 75.

However, it is assumed that the time constant of each retriggerable multivibrator is set so that the retrigger period of each IJ t-IJ gable multivibrator 71 to 75 is longer than the oscillation period of the pulse oscillator 16.

The output terminals of the retriggerable multivibrators 71 to 75 are connected to differentiating circuits 81, 82, 83, 84, 8, respectively.
It is connected to the input terminal of 5.

The differentiating circuits 81 to 85 are configured to detect and differentiate only the falling signal from the IJ gable multivibrator, and each differential signal is connected to the control signal terminal of the registers 51 to 55, respectively. There is.

Each register 51 to 55 stores the count value from each counter 31 to 35 at that point in time by a signal from a differentiating circuit.
The read terminals of counters 31 to 55 are connected to write signal input terminals of counters 31 to 35, respectively.

Each of the counters 31 to 35 has a control signal input terminal, and each of these control signal input terminals is a write-in terminal that outputs a reset signal when the power is turned on to a device to which the circuit of the present invention is installed, such as an audio amplifier. It is connected to the output terminal of the command pulse generation circuit 17.

When the reset signal from the write command pulse generation circuit 17 is applied to the control signal input terminal of each counter 31 to 35, each counter counts the stored signals in each register 51 to 55 and outputs this counted value. ing.

Now, when the switch 11a is pressed while the audio amplifier is operating, the AND circuit 21a opens the gate, and the AND circuit allows the pulse signal from the oscillator 16 to pass through.

The period of the pulse passing through the AND circuit 21a, that is, the period of the pulse emitted by the oscillator 16, is T as shown in FIG.
1.

The pulses that have passed through the AND circuit 21a are counted in the addition direction by the counter 31, and the addition by the counter 31 is stopped by releasing the suppression of the switch 11a.

The count value of the counter 31 is calculated by the digital-to-analog converter 41.
After being converted into an analog quantity by
Added to the device.

When the counter 31 performs the addition operation as described above, the analog output signal of the digital-to-analog converter 41 increases, and accordingly, the volume control device operates to increase the volume.

Further, the pulse signal that has passed through the AND circuit 21a passes through an OR circuit 61 and is then applied to a trigger input terminal of a retriggerable multivibrator 71.

The signal passing through the OR circuit 61 is the same as the signal passing through the AND circuit 21a, as shown in FIG. 2C.

Assuming that the retrigger period of the retriggerable multivibrator 71 is T2, the relationship T2>T1 as described above is established, so the output signal of the retriggerable multivibrator 71 is generated by an OR circuit as shown in FIG. 2d. It rises with the first signal of a series of pulse signals passing through 61, and falls with a delay of T2 from the last signal of the series of pulse signals.

The signal of this re-1 regregable multi-by-break 71 is applied to a differentiating circuit 81.

The differentiating circuit 81 detects only the falling signal of the signal from the retriggerable multivibrator 71, differentiates it, and adds a signal as shown in FIG. 2e to the register 51.

The register 51 performs a write operation in response to a signal from the differentiating circuit 81, and stores the count value of the counter 31 at that time.

Next, when switch 1lb is pressed, AND circuit 2lb
However, only while the switch 1lb is pressed, the pano-res signal from the oscillator 16 is allowed to pass, as shown in FIG. 2b.

This pulse signal is counted in the subtractive direction by the counter 31, and the volume control device operates in the direction of decreasing the volume as described above.

The pulse signal that has passed through the AND circuit 2lb also passes through an OR circuit 61, as shown in FIG. 2C, and is applied to a retriggerable multivibrator 71.

As in the case described above, the output signal of the retriggerable multi-by-break 71 rises with the first signal of a series of pulse signals and falls with a delay of time T2 from the last pulse signal, as shown in FIG. 2d.

This falling signal is differentiated by a differentiating circuit 81 and added to the register 51.

The register 51 performs a write operation again in response to a signal from the differentiating circuit 81, and instead of erasing the previous memory, stores the count value of the counter 31 at that time.

The volume adjustment operation explained above is performed by the balance operation circuit,
This is done in exactly the same way in the treble operation circuit and the like.

That is, while the switch 12a is closed, the counter 32 operates in the addition direction, increasing the output of the right channel, and while the switch 12b is closed, the counter 32 operates in the subtraction direction, increasing the output of the left channel. The count value of the counter 32 at that time is stored in the register 52.

Further, while the switch 13a is closed, the treble level is gradually increased, and while the switch 13b is closed, the treble level is gradually lowered, and the count value of the counter 33 at that time is stored in the register 53. 3 switch 14a
While the switch 14b is closed, the bass level is gradually increased, and while the switch 14b is closed, the bass level is gradually lowered, and the count value of the counter 34 at that time is stored in the register 54.

Furthermore, while the switch 15a is closed, the sound pressure level of the front speakers is gradually increased, and while the switch 15b is closed, the sound pressure level of the rear speakers is gradually increased. A count of 35 is stored.

The signals stored in each register 51 to 55 in this way are
Since each register is non-volatile, the memory will not be erased even if the audio amplifier is turned off.

Then, when the audio amplifier is powered on again, the write command pulse generation circuit 17 issues a reset signal and adds it to each count 31 to 35.

Each counter performs a write operation of a storage signal in each register 51 to 55 in response to a reset signal, and counts the storage value of each register.

Is this count value equal to the count value of each counter at the time the power to the audio amplifier is turned off? The audio amplifier will operate under the same conditions as when the power was turned off.

As described above, according to the digital operation storage circuit of the present invention, even if the audio amplifier etc. is turned off, the memory signal of the counter is not erased, and when the power is turned on again, each adjustment device Since the adjustment position is automatically set, there is no need to readjust each adjustment device when the power is turned on again.

Furthermore, since the volume will not be accidentally set to the maximum value when the power is turned on again, sudden loud noises will also be prevented.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a timing chart for explaining the operation of the same embodiment. 16...Oscillator, 17...Write command pulse generation circuit, 2 1 a, 2 1 b 5 2
2 a, 2 2 b t23a, 23b, 24a,
24b, 25a, 25b...AND circuit (gate circuit), 31, 32, 33, 34, 35... Song programmable counter, 4L42, 43, 44, 45...
...Digital-to-analog converter, 5L52, 53, 5
4, 55...Register, 61, 62, 63, 6
4, 65...OR circuit, 71, 72, 73, 7
4, 75... Retriggerable multi-vibrator, 81, 82, 83, 84, 85... Differential circuit.

Claims (1)

[Claims] 1. A pulse oscillator, a set of two operation switches for addition and subtraction, a gate circuit that opens the gate by selective operation of these switches, and allows a 0 pulse signal to pass from the pulse oscillator; Count the pulse signals from one of the gate circuits in the addition direction,
A counter that counts the pulse signal from the other gate circuit in the subtractive direction, and converts the counted value in the counter into an analog quantity, and uses this analog quantity to control the control target in audio equipment such as volume and balance. a digital-to-analog converter; and a retriggerable multivibrator that is operated by a signal from the set of two gate circuits and whose IJ } IJ period is longer than the oscillation period of the pulse oscillator; A pulse generator that generates a pulse signal in response to a return signal from the multivibrator; a non-volatile memory device that stores the counted value of the counter using the pulse signal from the pulse generator; , and a write command pulse generation circuit that issues a command to write a stored value in the nonvolatile storage device.