JPS583678U - noise reduction circuit - Google Patents
noise reduction circuitInfo
- Publication number
- JPS583678U JPS583678U JP9623481U JP9623481U JPS583678U JP S583678 U JPS583678 U JP S583678U JP 9623481 U JP9623481 U JP 9623481U JP 9623481 U JP9623481 U JP 9623481U JP S583678 U JPS583678 U JP S583678U
- Authority
- JP
- Japan
- Prior art keywords
- video signal
- output
- input
- playback
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Picture Signal Circuits (AREA)
- Television Signal Processing For Recording (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のノイズリダクション回路の、−例を示す
ブロック系統図、第２図及び第３図は夫々木考案の各実
施例を示すブロック系統図、第４図Ａ−Ｄは夫々第３図
の動作説明用信号波形図、第５図は第３図示回路におけ
る減衰器のゲインとＳＮ比改善度との関係を示す特性図
である。Fig. 1 is a block system diagram showing an example of a conventional noise reduction circuit, Figs. 2 and 3 are block system diagrams showing respective embodiments of the conventional noise reduction circuit, and Figs. FIG. 5 is a characteristic diagram showing the relationship between the gain of the attenuator and the degree of improvement of the SN ratio in the circuit shown in FIG. 3.
Claims (1)
映像信号を得−るＦＭ復調器と、該入力再生映像信号に
対し相対的に１水平走査期間遅延された再生映像信号を
得芭遅延回路手段と、上記周波数変調された入力映像信
号からドロップアウトを検出する検出器と、該検出器の
出力によりスイッチング制御され正常再生時には上記入
力再生映像信号を選択出力しドロップアウト発生期間中
は該遅延回路手段を経た再生映像信号を選択出力するス
イッチ回路と、該スイッチ回路の出力映像信号と該遅延
回路手段を経た再・主映像信号との減算を行なう第１の
減算器と、該第１の減算器の出力信号を振幅制限するリ
ミッタと、該リミッタの出力信号レベルを減衰させる減
衰器と、該減衰器の出力信号と該スイッチ回路の出力映
像信号との減算牽行なってノイズの低ＭＥれた入力再生
映像信号を取り出す第２の減算器とより構成したノイズ
リダクション回路。An FM demodulator that demodulates a frequency-modulated input video signal to obtain an input playback video signal, and a delay circuit that obtains a playback video signal that is delayed by one horizontal scanning period relative to the input playback video signal. means, a detector for detecting dropout from the frequency modulated input video signal; switching is controlled by the output of the detector to selectively output the input playback video signal during normal playback, and the delay during the dropout occurrence period; a switch circuit for selectively outputting the reproduced video signal that has passed through the circuit means; a first subtracter that performs subtraction between the output video signal of the switch circuit and the re-main video signal that has passed through the delay circuit means; A limiter that limits the amplitude of the output signal of the subtracter, an attenuator that attenuates the output signal level of the limiter, and a subtraction between the output signal of the attenuator and the output video signal of the switch circuit to reduce noise. A noise reduction circuit comprising a second subtracter for extracting an input reproduced video signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9623481U JPS583678U (en) | 1981-06-29 | 1981-06-29 | noise reduction circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9623481U JPS583678U (en) | 1981-06-29 | 1981-06-29 | noise reduction circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS583678U true JPS583678U (en) | 1983-01-11 |
| JPH026710Y2 JPH026710Y2 (en) | 1990-02-19 |
Family
ID=29891108
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9623481U Granted JPS583678U (en) | 1981-06-29 | 1981-06-29 | noise reduction circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS583678U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6163169A (en) * | 1984-09-05 | 1986-04-01 | Matsushita Electric Ind Co Ltd | Video signal processor |
| JPS62159992A (en) * | 1986-01-09 | 1987-07-15 | Hitachi Ltd | Magnetic recording and reproducing device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5580966A (en) * | 1978-12-14 | 1980-06-18 | Matsushita Electric Ind Co Ltd | Noise eliminating system for television signal |
-
1981
- 1981-06-29 JP JP9623481U patent/JPS583678U/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5580966A (en) * | 1978-12-14 | 1980-06-18 | Matsushita Electric Ind Co Ltd | Noise eliminating system for television signal |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6163169A (en) * | 1984-09-05 | 1986-04-01 | Matsushita Electric Ind Co Ltd | Video signal processor |
| JPS62159992A (en) * | 1986-01-09 | 1987-07-15 | Hitachi Ltd | Magnetic recording and reproducing device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH026710Y2 (en) | 1990-02-19 |
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