JPS5836325B2 - Jidourokoseigiyohoushiki - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic exposure control system for cameras, etc., and more particularly to an automatic exposure control system that controls shutter speed using a digital signal.

2. Description of the Related Art In controlling the shutter time of a camera or the like using a digital signal, it is known to convert photographic information such as brightness information of a subject, film sensitivity used, aperture, etc. into digital signals and perform calculations.

In such a system, the calculations are conveniently performed by addition and subtraction by converting each piece of information into logarithmically compressed linearly related pulse numbers.

That is, if the subject brightness is BY, the film sensitivity is SV, and the aperture value is AV, then the shutter speed TV is expressed as follows.

In other words, when BY, SV, and AV are given and calculated, the shutter time TV can be obtained as a linearly related number of pulses by addition and subtraction, but in order to obtain the actual shutter time, it is necessary to convert this into real time. is necessary.

The present invention provides an exposure control device for converting digitally obtained shutter seconds into real time to operate a shutter control circuit, and in particular, the structure thereof includes a logarithmically compressed shutter. A pulse signal forming circuit that forms a number of pulses proportional to a second value, a plurality of flip-flops including a first-stage flip-flop to which the output of the pulse signal forming circuit is input, and the output of the previous-stage flip-flop and the pulse signal forming circuit. An AND logic circuit that performs a logical product with the output of a circuit, and its output is connected to one input terminal of a flip-flop in the next stage. a binary counting circuit that counts quasi-pulses and sequentially transmits the binary counting output to the other input end of the corresponding flip-flop; and a logic that receives the output of each flip-flop and outputs a shutter close signal by logical product of the output of each flip-flop. A circuit was installed to convert the shutter time to real time and control the air.

The present invention will be explained below with reference to the drawings.

The figure is a circuit system diagram showing an embodiment of the automatic exposure armature system according to the present invention.

In the figure, AV, BV, and S are the information sources of the aperture value brightness and film sensitivity, respectively. For example, AV is the logarithmic compression information of the aperture value linked to the lens aperture m, and BV
is the logarithmic compression value of the photometric value of the subject brightness, S is the film A
This is a logarithmically compressed value of SA sensitivity.

These compressed information are added to and subtracted from a known arithmetic circuit L, and a number of pulses corresponding to the logarithm Tv of the shutter time are output.

The output of the arithmetic circuit L is a plurality of AND gates G1 to G.
added to n.

The outputs of the AND gates G1-Gn are connected to the set terminals S of the plurality of flip-flop circuits FF1-FFn, respectively.

The flip-flop circuit, together with a storage circuit for storing the output of the arithmetic circuit L and an AND game Go to be described later, forms a pulse selection leg circuit during expansion.

The reset terminals R of these FF to FFn are connected to the binary output terminals 20, 21, . . . of the binary counter BC.

The counter constitutes a pulse forming circuit that outputs pulses having different periods in a multiple series from its output terminal.

Also, one output Q of FF1 to FFn is connected to the next-stage AND gate, and the other output is connected to the AND gate circuit G.

is input. This G.

The shutter speed control circuit T is activated by the output of the shutter speed control circuit T, and the shutter closing member is driven by the magnet M.

A reference pulse is applied to the input terminal CL of the binary counter BC from the reference pulse generator P via the switch SW1, and the reset input terminal R is connected to the reset switch sW2.

The output of the AND game }G is connected to the n+1 overflow indicator lamp circuit LDo and the feedback path F, and the outputs Q and 4 of each flip-flop circuit are connected to the indicator lamp circuits LP to L via the AND game }G to Gn.
Connected to Pn.

These counter BC, flip-flop circuit FF1
~FFn, ANDG}Go forms an extension circuit.

Next, the operation of this device will be explained.

First, in an initial state in which there is no output pulse from the arithmetic circuit L, the flip-flop circuits FF1 to FFn are all reset, and their output Q and rOJQ are "1".

Aperture information AV, brightness information BY, AS to input of arithmetic circuit L
When A information or SV is applied, a calculation is performed in L, and a pulse train of a number corresponding to the calculation output, that is, the Tv value, is sent to the output.

The first output pulse (first pulse) passes through the AND gate G1 and is applied to the set force S of FF1.
The output of Q is "1" and Q is inverted to "O".

When the next output pulse (second pulse) is sent out, AND gate G2 is turned on by this pulse and the Q "1" pulse from FF1, and the second pulse is input to the S input of FF2.

As a result, FF2 is inverted so that Q becomes "l" and Q becomes "o".

Thereafter, as the output pulses from L are sent out, the flip-flop circuits are set in the order of FF1 to FF2, etc., OFF circuits are set as many as the number of output pulses, and the calculation output is transferred to the FF circuit. It is stored as a digital value determined by the set state.

Note that if the output pulse is still sent even after setting up to flip-flop circuit FFn, the AND gate G
n+1 is turned on and is applied to the aperture information source AV through the return path F, changing the initially set aperture information and setting the appropriate exposure. At the same time, the LDOF circuit lights up the overflow lamp to give a warning.

Until each flip-flop circuit is set in the above manner, the output of the flip-flop circuit has a Q of "1".
, 0 is "0".

The q output of each flip-flop circuit is a gate circuit G.

The input is input to form an AND gate, and its output is used to connect the seconds control circuit T to operate the 7-gnet M.

Therefore, since the G output of the flip-flop circuit set by the output pulse of the arithmetic circuit L is "0", in this state it is an AND game}G.

is turned off, and no control signal is sent to the control circuit T.

Next, binary counter BC + East, for example switch SW1
It is reset by connecting from end a to end b for one moment when winding the film.

Therefore, in this state, no signal is sent from each output of the counter to the reset input R of each flip-flop circuit.

In this state, the shutter release button is operated to perform a shutter release, and when the switch SW1 is turned on at the same time as the leading shutter curtain starts, a pulse of a constant period is sent from the reference pulse generator P to the binary counter PC.

For example, if the period of the reference pulse is 1 mS (171 0
00 seconds), a reset signal is generated at the first output 2° of the binary counter at 1/1000 seconds after the shutter front curtain starts running, and this is sent to the reset input of the flip-frog circuit FF1. Reset the FF circuit.

This inverts the output Q to "0" and Q to "1".

As described above, the reset signal is sequentially sent to the reset input of the flip-flop circuit as follows.

Assuming that there are four output pulses from the arithmetic circuit L, FF1 to FF4 are in a set state, and FF5 and below are in a reset state.

In this state, the output of the binary counter is sequentially from FF1 to FF.
If FF4 is reset at regular intervals, the time it takes for the counter's 23 output to reset FF4 is determined by the AND gate Go being turned on at the time of the shutter and the control circuit T.
M operates to close the shutter, that is,
In this case, the pulse from the output terminal 23 of the counter BC is selected, and after a time determined by the pulse, the gate Go is turned on and the shutter is closed.

In this manner, the present invention selects a predetermined synchronized pulse based on the stored digital value, and controls the shutter time using the pulse, thereby executing the extension of the time.

As described above, according to the present invention, the logarithm compression value AV of photographic information
, BY, and SV, and the shutter time corresponds to the linear pulse number obtained by calculating, for example, ? It can be obtained as a multiple series.

That is, linear digital information (pulse number) obtained by calculating logarithmically compressed information is expanded by a binary counter circuit to obtain shutter speeds in multiple series.

As shown in the figure, there are gate circuits 0 to Gn that AND gate the Q output of the previous stage of the flip-flop circuit with the Q output of the latter stage.
By driving the lamp drive circuits LD1 to LDn with the output thereof, the shutter time can be digitally displayed using a lamp in advance.

It is also possible to change the emitted light color of the display rung to make it easier to distinguish between high-speed shutter and low-speed shutter display.

As described above, in the automatic exposure control method according to the present invention, the number of pulses corresponding to the shutter time obtained by calculating the logarithmic information is stored, and this is read out using the readout pulse from the binary counting circuit. As a result, shutter speeds in multiple series can be obtained accurately and stably, making it highly effective as an extremely advanced automatic exposure control system.

[Brief explanation of the drawing]

The figure is a circuit diagram showing an embodiment of the automatic exposure control method according to the present invention. AV, BV, SV... Shooting information source, L...
・One arithmetic circuit, P...Reference pulse generation source, BC
...Binary counting circuit, Go, 01 to Gn+1 and Gt to Gn 7nd gate circuit, FF1 to FFn
・・・・・・Norip-flop circuit, T・・・・Shutter air circuit, M・・・・Magnet, LD1
~LDn...Shutter second time display circuit, LDo
F...Overflow display circuit, Sw,,Sw
2...Switch.

Claims (1)

[Claims] 1. A plurality of stages including a pulse signal forming circuit that forms a number of pulses proportional to a logarithmically compressed shutter time value, and a first stage 7 flip-flop to which the output of the pulse signal forming circuit is input. 7 flip-flop, an AND logic circuit whose output is ANDed between the output of the flip-flop in the previous stage and the output of the pulse signal forming circuit, and whose output is connected to one input terminal of the flip-flop in the next stage, and a reference pulse counted. and a logic circuit that receives the outputs of each flip-flop and outputs a shutter close signal based on the logical product of the outputs of each flip-flop. An exposure control device characterized by: