JPS6136414B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a digital to analog converter (D-A converter).
Conversion device).

Digital signals are generally not easily affected by changes in temperature or power supply voltage, but analog signals are easily affected by changes in temperature or power supply voltage, so the advantage of digital signals is that in the process of converting digital signals into analog signals. Lost.

Accordingly, an object of the present invention is to provide a stable D-A converter that is not easily affected by temperature changes and fluctuations in power supply voltage.

A double integral type A-D conversion system is often used in analog-to-digital converters (A-D converters) to make them less susceptible to temperature changes and the like. This type of A-D converter integrates the input current for a certain period of time using one integrating circuit, and then performs inverse integration using the above integrating circuit using a constant current in the opposite direction, so that the output of the integrating circuit becomes 0. The time up to this point is counted using a pulse signal, and this counted value is used as an A-D conversion output. With this configuration, the effects of constant changes due to temperature changes in the circuit elements that make up the integrating circuit and fluctuations in the oscillation frequency of the pulse oscillator due to temperature or power supply voltage are canceled out, and a complex stabilization circuit against temperature changes and power supply voltage fluctuations is canceled out. A device that performs an extremely stable A-D conversion operation without requiring any additional steps can be obtained with a simple configuration.

The present invention attempts to obtain a D-A converter that performs stable D-A conversion operations by adding some additions to the above-mentioned double-integration type A-D converter. The present invention will be explained below with reference to Examples.

FIG. 1 is a block diagram showing an entire embodiment of the present invention. In this embodiment, A-
It has become a device that performs both D conversion and D-A conversion. 1 is a device that outputs an analog signal to be converted into a digital signal, and outputs an analog signal called Vin. 2 is a reference signal source that outputs a constant voltage Vre. Reference numeral 3 denotes an operational amplifier, which together with a resistor R and a feedback capacitor 17 constitutes an integrating circuit. Hereinafter, the term "integrator circuit" refers to this integrator circuit. 12 is a switch that clears the integrating circuit. 4 and 14 are comparison circuits, and 5 is a clock pulse oscillator.
The other blocks are numbered and have device names or functions written on them, so their explanations will be omitted here.

The A-D conversion operation in the configuration shown in FIG. 1 will be explained. At this time, according to a command from the control device 16, the switch 12 is turned on, the gate 6 is closed, the switches 11 and 13 are switched to the contact AD side, and the switch 9 is first brought into contact with the contact a. Clock pulse oscillator 5 is already running. Next, the switch 12 is turned off by a command from the control device 16, and the gate 6 is simultaneously opened. When the switch 12 is turned off, the output Vin of the analog signal source 1 begins to be integrated by the integrating circuit. Thereafter, the output of the integrating circuit drops linearly with a slope proportional to the input Vin. In Figure 2 (b), the descending solid straight line starting from to indicates the output of the integrating circuit. On the other hand, after time to, the gate 6 is opened and the output pulses of the clock pulse oscillator 5 are counted by the counter 7. This count output is compared with a constant value N input from the digital data input circuit 19 in the arithmetic comparison circuit 8, and when the count output of the counter 7 reaches N (at time t1 in Fig. 2), the arithmetic and comparison circuit 8 A signal is sent to the control device 16, and this signal causes the control device 16 to issue a command to release the switch 9 from the contact a, close the gate 6, and reset the counter 7. At this time, the output Vout of the integrating circuit becomes Vout=k·N·Vin. here,
k is the resistance, capacitor, and clock pulse period Δt
etc. Then, the switch 9 is brought into contact with the contact b and at the same time the gate 6 is opened again. Therefore, the reference voltage Vref is input to the integrating circuit.
As shown in FIG. 2A, Vref has the opposite polarity to Vin, and the output of the integrating circuit increases linearly from time t1. This output is compared with the 0 level in the comparator circuit 4, and at time t2 when the output of the integrating circuit becomes 0, a signal is output from the comparator circuit 4, and the gate 6 is closed by this signal. Therefore, counter 7 is
Count the time clock pulses from t1 to t2, and count the time clock pulses from t1 to t2.
The count value n is held after that point. This count value n
becomes the A-D conversion signal of the input analog value Vin.
The above Vout can be expressed as Vout=k·n·Vref, and it can be seen from the above two equations that the relationship N·Vin=n·Vref holds true. As can be seen in Figure 2, the output of the integrating circuit is initially output for a certain period of time T1 according to the input Vin.
After that, a certain level is reached, and since the constant input is inversely integrated, the time slope of the output at that time is t1
It is constant regardless of the integrator output level at the time, and the time from t1 until the integrator output becomes 0 is proportional to the integrator output at t1, and this time is expressed as a constant periodic pulse. What is divided and counted is a signal obtained by digitizing the input Vin.

With the configuration shown in Figure 1, there is a selector switch 10 and a comparator circuit 1.
4 and the aforementioned changeover switches 11 and 13 are parts added for DA conversion. In the case of D-A conversion operation, the control device 16 switches the changeover switches 11 and 13.
Switch to contact DA side. Also, switch 12 is turned on to clear the integrating circuit. Further, the count output of the counter 7 is stored as a digital signal in the arithmetic comparison circuit 8, and the counter 7 is reset.

Here, the principle of DA conversion in the above configuration will be explained in advance.

The present invention makes use of the fact that the output of an integrating circuit is a value corresponding to a digital value, integrates a constant input Vref in an integrating circuit for a period corresponding to the digital value to be converted, and converts the integrated output into a D-A converter. -A is extracted as a converted value. Now D-A
When the digital value to be converted is x and its DA converted value is V _DA , the following equation holds true: N·V _DA =x·Vref ……(1). First, the integrator circuit uses a constant input Vref
The time required to integrate V R to a constant value V _R (in FIG. 1, V _R =Vref is used to simplify the circuit) is determined from the count value of the clock pulse (count value M). At this time, V _R =k・M・Vref (2). Next, the number y of clock pulses required for the output to become V _DA when integrating the constant input Vref in the integrating circuit is calculated. At this time, V _DA =k・y・Vref (3). That is, when y is determined from the above equations (1), (2), and (3), y=x·(M/N)·(Vref/V _R ) is obtained. Therefore, by operating the integrating circuit again and integrating only the clock pulse y, the DA conversion value V _DA corresponding to the digital value x can be obtained. For example, if V _R =Vref as shown in Figure 1, then y=x(M/
N), and the calculation becomes simple. Such a D-
In A conversion, the same integrator circuit is operated twice, so even if the constant k changes due to the integrator circuit's resistance, capacitor, clock cycle, etc., the effect is D-
It does not appear in the A conversion result at all.

Next, a description will be given of how the above-described principle of DA conversion is realized in the configuration shown in FIG.
During DA conversion, switches 11 and 13 are in contact with contact DA, gate 6 is closed, and counter 7 is reset. Further, the switch 12 is on, and the switch 10 is in contact with the contact point C. The switch 12 is turned off by a command from the control device 16, and the integrating circuit starts integrating the output Vref of the reference signal source 2. At the same time, gate 6 is opened and counter 7 starts counting the output pulses of clock pulse oscillator 5. The output of the integrating circuit is connected to the output of the reference signal source 2 in the comparator circuit 14.
It is compared with Vref, and when the two match, the gate 6 is closed by a signal output from the comparison circuit 14, and the switch 12 of the integration circuit is turned on via the control device 16, thereby clearing the integration circuit. The counted value M of the counter 7 at this time is stored in the arithmetic comparison circuit 8, and the counter 7 is reset.

The arithmetic comparison circuit 8 receives as arithmetic data the digital value x to be DA converted, M obtained by the above-mentioned operation in the first integration operation of the DA conversion, and the digital data input circuit 19. The given N is given, and from this the above
xM/N is calculated. When this calculation operation (actually, the control device 16 advances the calculation operation) is completed, the switch 12 is turned off again by a command from the control device 16, the gate 6 is opened, and the integration of Vref starts. During this time, the counter 7 counts clock pulses, and when the counted value matches xM/N, a signal is sent from the arithmetic comparison circuit 8 to the control device 16, a command is issued from the control device 16, the gate 6 is closed, and the switch 10 is turned into a contact point. Switched to the d side. Then, the input to the integrating circuit becomes 0, the integrated value up to that point is held, and this is output as the DA conversion output DAout. In FIG. 1, the inverting circuits 15 and 18 are used to return the input and output to the original sign, since the sign of the input and output is inverted in the operational amplifier 3 constituting the integrating circuit.

FIG. 3 shows an embodiment in which the present invention is applied to a program EE type automatic exposure control system for a camera. In this figure, 30 is a photometering circuit that measures the light from the subject that enters through the photographic lens, and 40 is the first photometering circuit.
The D-A conversion of the present invention explained with reference to the drawings allows the device to perform A-D and D-A amount conversion. The output of the photometric circuit is converted from analog to digital at 40, and then subjected to various photographic calculations digitally at arithmetic circuit 33 to calculate exposure information, and one of these pieces of information is a digital signal of aperture value information. A digital signal of exposure time information, which is other exposure information, is sent to an exposure time control circuit 34 to control the shutter speed. be done.

The above operation will be explained in more detail. Let Bv be the subject brightness, Avo be the open aperture value of the photographing lens, Av be the closed aperture value, Tv be the exposure time, and Sv be the film sensitivity. The output of the photometric circuit 30 is Bv−Avo
Alternatively, as an analog value of Bv-Av, Bv-Avo is initially A-D converted by the device 40 and sent to the arithmetic circuit 33. The calculation circuit 33 includes a film sensitivity setting circuit 38.
The Sv value and the Avo value are input as digital signals from the open aperture value setting circuit 3, respectively, based on information mechanically transmitted from the camera lens attached to the camera. A set of Av values and Tv values that provide an appropriate exposure for Bv is calculated, and the digital value of Bv-Av is subjected to D-A conversion in the device 40, which is input to the comparator 31. The comparator 31 compares the output of the photometry circuit 30 with the D-A conversion value of Bv-Av, and when the two match in the process of narrowing down the aperture, a signal is output from the comparator 31 and the aperture control circuit 32 is applied to activate the magnet 41 and determine the aperture. Other arithmetic circuit 3
The Tv value and Av value signals calculated in step 3 are sent to the display device 35, and the Tv signal is applied to the exposure time control circuit 34. When the aperture is determined in this way and the shutter is released, the exposure time control circuit 34 is activated and after a predetermined period of time it outputs a signal to activate the magnet 42 and close the shutter.

The time required for the calculation and D-A conversion performed by the calculation circuit 33 is several to several tens of milliseconds, which is sufficiently fast compared to the mechanical time delay from when the release button is pressed until the aperture is narrowed down, so there is no problem. If necessary, an electrical delay circuit may be provided to provide a delay approximately equal to the time required for the above calculation and D/A conversion between when the release button is pressed and when the shutter release operation is started. Also, when high speed is required for D-A conversion, the clock pulse frequency during D-A conversion is set higher than that during A-D conversion.
In order to strengthen the slope of the integral output, Vref may be changed to a value larger than that during AD conversion, or the time constant of the integrating circuit may be changed to a smaller value.

In the above-mentioned exposure control system, A-D conversion is required at the stage of calculating exposure information from photometric values, and D-A conversion is required at the aperture setting stage.
-A device of the present invention capable of both conversion operations is extremely suitable. If you try to extract exposure information digitally from the photometric value and control the aperture setting using digital aperture information, the transmitted light of the photographic lens, which is being narrowed down, is sampled in small increments, A-D converted, and the value is converted into digital data. The operation of comparing the Bv-Av value of the calculated digital signal is performed, but since the narrowing down operation takes only a few milliseconds to narrow down the aperture from the open aperture to the minimum aperture, the above-mentioned sampling, A-D conversion, If the comparison operation is repeated many times, a very high-speed A/D converter is required. In this respect, the method shown in Figure 3 converts digital aperture information into analog information, so the aperture setting operation can be performed continuously and requires only an ordinary analog comparison circuit, which performs photometry, calculation, and D-A conversion. This process does not require particularly high speed.

As described above, the device of the present invention is a D-A converter in which the value of the analog signal corresponding to the numerical value to be D-A converted is determined from the integral result of the first constant input by the integrating circuit, which converts the number of pulses of the constant input into the integral circuit. Since the D-A conversion operation is performed by detecting whether the integral of In contrast to the A converter, which requires very high accuracy (1/256 = 0.4% in the case of 8 bits) for the ladder resistor and is expensive, it can be made inexpensive because the circuit elements do not require high precision. Furthermore, as mentioned above, since the present invention uses a double integration method, a converter for both A-D and D-A can be easily created by adding a few additions to a double-integration type A-D converter. It has certain characteristics.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a device according to an embodiment of the present invention, FIG. 2 is a graph explaining the operation of the device, and FIG. 3 is a diagram showing the configuration of an exposure control circuit of a camera using the device of the present invention. It is a block diagram. 3... operational amplifier constituting an integrating circuit, 17,
R... Capacitor and resistor which are elements of the integrating circuit, 4, 14... Comparison circuit, 5... Clock pulse oscillator.

Claims (1)

[Claims] 1. A reference signal source that outputs a constant output, an integrating circuit that integrates the output of this reference signal source, a counter that counts clock pulses, and a match signal when the output of the integrating circuit is compared with a constant value VR. a comparator circuit that outputs M, a storage means that stores the count output M of the counter from the start of integration of the integrator circuit until a coincidence signal is output from the comparator circuit, and a count output stored in the storage means. M and
a digital signal x to be converted into an analog signal;
arithmetic means that receives the number N of digital signals corresponding to the constant value VR and performs the calculation x×M/N; and after resetting the integrating circuit with a coincidence signal from the comparing circuit, the integrating circuit is operated again. control means for restarting the clock pulse and stopping the operation of the integrating circuit when the counted value of the clock pulse from the restart reaches a predetermined relationship with the calculated value of the calculating means; A digital-to-analog converter that stops its operation and uses the output of the integrating circuit at that time as a DA conversion output.