JPS5833880A - Semiconductor photodetector - Google Patents

Semiconductor photodetector

Info

Publication number
JPS5833880A
JPS5833880A JP56131528A JP13152881A JPS5833880A JP S5833880 A JPS5833880 A JP S5833880A JP 56131528 A JP56131528 A JP 56131528A JP 13152881 A JP13152881 A JP 13152881A JP S5833880 A JPS5833880 A JP S5833880A
Authority
JP
Japan
Prior art keywords
layer
type
conductivity type
semiconductor
ion implantation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56131528A
Other languages
Japanese (ja)
Inventor
「あ」島 幹雄
Mikio Haijima
Akira Matsuura
彰 松浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56131528A priority Critical patent/JPS5833880A/en
Publication of JPS5833880A publication Critical patent/JPS5833880A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/11Devices sensitive to infrared, visible or ultraviolet radiation characterised by two potential barriers, e.g. bipolar phototransistors

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To enhance a photodetector by forming the shallow second conductive type impurity introduce layer on a region isolated from one main surface in the first conductive type semiconductor substrate and using the substrate semiconductor and two P-N junction surfaces with upper and lower surfaces of the layer as a photodetecting region. CONSTITUTION:An N type epitaxial Si layer 1 is formed on a P<-> type substrate 3, is surrounded by a P type isolation layer 4 and is electrically isolated from other element region. A P type layer 5 is formed by B ion implantation in a region isolated from the surface of the layer 1 in such a manner that impurity ion flying distance is deepened by increasing ion implantation energy, for example, up to appox. 200keV, and upper and lower P-N junctions (Xj1, Yj2) are by one ion implantation formed between the layer and an N type Si layer, a light incident from the surface of the element excites electrons-holes at the upper and lower P-N junction surfaces, thereby increasing the sensitivity and the area efficiency and improving the efficiency as a photodetector.

Description

【発明の詳細な説明】 本発明は半導体受光素子、いわゆるホトダイオードに関
する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor light receiving element, a so-called photodiode.

逆方向にバイアス嘔れた半導体PN接合に元・tあてる
と、光により電子−正孔対が励起嘔れ少数キャリアの濃
度が熱平衡の値よシ大きくなシ逆方間電流が大きくなる
ことに光−電気変換素子に利用したホトダイオード(又
はホトトランジスタ)が知られている。従来のIC用の
日1ホトダイオードは、第1図に示すように例えばN型
エピタキシャル層1の表面にP型不純物、例えばB(ボ
ロン)t−イオン打込みして浅いP型層2を形成して受
光感度を上げるようにしている。この場合のイオン打込
みエネルギーは75KeV@JJiで、第2図に示すよ
うにに型層の表面にそって一つのpit@合を形成して
いる。
When a source/t is applied to a semiconductor PN junction biased in the reverse direction, the electron-hole pairs are excited by the light, and the concentration of minority carriers becomes larger than the thermal equilibrium value, resulting in an increase in the reverse current. A photodiode (or phototransistor) used as a photo-electric conversion element is known. As shown in FIG. 1, a conventional photodiode for IC uses, for example, a shallow P-type layer 2 formed by implanting P-type impurities, such as B (boron) t- ions, into the surface of an N-type epitaxial layer 1. I am trying to increase the light receiving sensitivity. The ion implantation energy in this case was 75 KeV@JJi, and one pit was formed along the surface of the mold layer as shown in FIG.

ところでXaの高集積化に伴ないホトダイオードの高密
度化か要求されるが、前記のI’N接合の構造では面積
効率がわるく、これ以上の高密度化は困難である。
Incidentally, as the integration of Xa becomes higher, higher density of photodiodes is required, but the above-mentioned I'N junction structure has poor area efficiency and it is difficult to achieve higher density.

本発明は上記の問題点【解決したものでその目的は受光
素子の効率同上にある。
The present invention solves the above problems, and its purpose is to improve the efficiency of the light receiving element.

以下本発明は若干の実施例にそって詳述する。The present invention will be described in detail below with reference to some embodiments.

実施例1 #3図、第4図は本発明によるホトダイオードノー例【
示す。1はN型エピタキシャル81%でP−型基板3上
に形成され、PWlアイソレーション層4によって囲ま
れることで他の素子領埴から電気的に分離逼れる。5は
B(ボロン)イオン打込みによシy層1の表面から離れ
た領域に形成したP型層でイオン打込みエネルギーt−
例えば200に@y@度まで高めることで不純物イオン
飛程を深くし、$5gK示すように一回のイオン打込み
でM  81層との間に上下2つのPM接合(xj、 
Example 1 #3 and Figure 4 are examples of photodiodes according to the present invention [
show. 1 is formed on a P-type substrate 3 with 81% N-type epitaxial structure, and is electrically isolated from other device regions by being surrounded by a PWl isolation layer 4. 5 is a P-type layer formed in a region away from the surface of the layer 1 by B (boron) ion implantation, and the ion implantation energy t-
For example, by increasing the impurity ion range to 200°C, the range of impurity ions is deepened, and as shown in the $5gK example, two upper and lower PM junctions (xj,
.

Xj、)を形成するものでメ)、素子の表面から入′射
した党は上のPN接合面と下のPM接合面とで電子−正
孔を励起することにより、感度が増加するとともに面積
効率が大きくなり、受光素子としての効率を同上する。
Xj, ), and particles incident from the surface of the element excite electrons and holes at the upper PN junction surface and the lower PM junction surface, increasing the sensitivity and increasing the area. The efficiency increases, and the efficiency as a light receiving element becomes the same as above.

同図において、6はイオン打込み1層5の電極取出しの
ためのP+拡散(ベース拡散時に行なう)層であって、
At電極7によりオーミックコンタクト烙れる。8はM
MilAの電極取出しのためのN+拡散(エミッタ拡散
)層であってAtt極9によりオーミックコンタクトち
れる。lOt:を表面絶縁Ml(81(h等)でめる6 実施例2 第6図、第7図は本発明によるホトダイオードの他の例
を示す。この例では同一マスクを使用し高エネルギー(
250KeV )と低エネルギー(40KeV )の2
度のB(ボロン)イオン打込みによりN型層1ali上
下で挾む形で2層2及びP層5′に形成する。これによ
ってPM接合が第7図に示すよう&C3つの異なる深さ
に形成されることになシ、受光面としてのPM接合面積
か3倍近く増大し、受光感度とともに高集積化が期待で
きる。
In the figure, 6 is a P+ diffusion layer (done during base diffusion) for taking out the electrode of the ion-implanted first layer 5,
An ohmic contact is established by the At electrode 7. 8 is M
This is an N+ diffusion (emitter diffusion) layer for taking out the MilA electrode, and is broken into ohmic contact by the Att electrode 9. 6 Example 2 FIGS. 6 and 7 show other examples of photodiodes according to the present invention. In this example, the same mask is used and high energy (
250KeV) and low energy (40KeV).
By repeatedly implanting B (boron) ions, two layers 2 and P layer 5' are formed sandwiching the N-type layer 1ali above and below. As a result, although the PM junctions are formed at three different depths as shown in FIG. 7, the area of the PM junction as a light-receiving surface increases by nearly three times, and high integration as well as light-receiving sensitivity can be expected.

実施fl13 118図、第9図は本発明によるホトダイオードのさら
に他の実施例を示す。この例では同一マスクを使用しB
(ボロン)イオン打込みを高エネルギー(200KeV
 )と低エネルギー(50Kev)と2回打込みを行な
って2層2及び2層5會形成し、その後、同じマスクで
2層2と1層5との中間の深さくエネルギー)でP(リ
ン)イオン打込みt行なうことでN 層11を形成する
。これによシ、2層2とN 層1aとの間でPN接合(
Xj、 )、N 層11と1層5との間でPM接合(x
jl)、1層5とM層1との間でPM接合(Xj、)t
−得られる。この例では実施例2 rcN”層11が加
わつ定形であるからこのH層11の存在によシN 取出
し部Bへの電気抵抗を小嘔くすることができる。したが
ってこの例では受光感度及び面積効率を大きくする効果
が−そう期待できる。
Embodiment fl13 FIG. 118 and FIG. 9 show still other embodiments of the photodiode according to the present invention. This example uses the same mask and B
(Boron) ion implantation at high energy (200KeV)
) and low energy (50 Kev) to form 2nd layer 2 and 2nd layer 5, and then implant P (phosphorus) with the same mask to a depth between 2nd layer 2 and 1st layer 5. An N layer 11 is formed by performing ion implantation. This creates a PN junction (
Xj, ), N PM junction (x
jl), PM junction (Xj,)t between layer 1 5 and layer M 1
- Obtained. In this example, since the embodiment 2 has a regular shape with the addition of the rcN'' layer 11, the presence of this H layer 11 can reduce the electrical resistance to the N extraction portion B. Therefore, in this example, the light receiving sensitivity and The effect of increasing area efficiency can be expected.

本発明はホトダイオード内蔵No、受光/チツプエ○で
カメラ、光電スイッチ等に利用して極めて有効である。
The present invention is extremely effective when used in cameras, photoelectric switches, etc. with built-in photodiodes and light receiving/chip ○.

【図面の簡単な説明】[Brief explanation of drawings]

tJL1図は従来のホトダイオードの原理的構造倉示す
断面図、第2図に′i第1図のムームm!#面における
不純物濃度分布を示す曲線図でおる。 第3図は本発明によるホトダイオードの一実施例を示す
平面図、第4図はaI3図のA−A視断面図、第5図は
第4図に対応する不純物濃度−1図、第6図は本発明に
よるホトダイオードの他の実施例を示す断面図、第7図
は第6図に対応する不純物濃度分布曲線図、第8図は本
発明によるホトダイオードの他の実施例を示す断面図、
第9図は第8図に対応する不純物濃度分布曲線図である
。 l・・・M′f!!!エピタキシャルsi層、2・・・
P型イオン打込み層、3・・・P−型81基板、番・・
・P型アイソレーション、5・・・FWイオン打込み層
、6・・・P+型拡散層、7・・・AAt極、8−・・
N 型拡散層、9・−・ムを電極、10・・・絶に膜、
11・・・N 型イオン打込層。 代理人 弁理士 薄 1)利 辛 第1図 鎖2図 表η       ′ 面    s’1us9ご 第  3  図 第  4  図
Figure 1 is a sectional view showing the basic structure of a conventional photodiode, and Figure 2 is a cross-sectional view showing the basic structure of a conventional photodiode. This is a curve diagram showing the impurity concentration distribution on the # plane. FIG. 3 is a plan view showing an embodiment of a photodiode according to the present invention, FIG. 4 is a sectional view taken along line A-A of FIG. aI3, FIG. 5 is an impurity concentration-1 diagram corresponding to FIG. 4, and FIG. is a sectional view showing another embodiment of the photodiode according to the present invention, FIG. 7 is an impurity concentration distribution curve diagram corresponding to FIG. 6, and FIG. 8 is a sectional view showing another embodiment of the photodiode according to the present invention.
FIG. 9 is an impurity concentration distribution curve diagram corresponding to FIG. 8. l...M'f! ! ! Epitaxial Si layer, 2...
P-type ion implantation layer, 3...P-type 81 substrate, number...
・P type isolation, 5...FW ion implantation layer, 6...P+ type diffusion layer, 7...AAt pole, 8-...
N-type diffusion layer, 9...m electrode, 10... absolutely film,
11...N type ion implantation layer. Agent Patent Attorney Bo 1) Li Xin Figure 1 Chain 2 Diagram η ′ Surface s'1us9 Figure 3 Figure 4

Claims (1)

【特許請求の範囲】 1、第1導電型半導体基体内にその5主表面。から離れ
た領域で浅い第2導電型不純物導入層全形成し、上記基
体半導体と上記不純物導入層の上下両面とによる2つの
PM接合面會受元領域としたこと1ICq#像とする半
導体受光素子。 2、第1導電型半導体基体の5主表面に第2導電型不純
物導入による第1の層を浅く形成するとともに、上記半
導体基体内に第1の層から離れて第2導電蓋不純物導入
による第・20層會浅く形成し、−第1の層の下面、第
2の層の上下両面と基体半導体とによる3つのPM接合
面を受光領域とし友ことt−%黴とする半導体受光素子
。 3、第1導電型手導体基体の5主表面に第2導電型不純
物導入による第1の層を浅く形成し、第1の層から離れ
て基体内に第2導電型不純物導入による第2の層を浅く
形成するととも#C第rの層とI!!2層との聞に第1
導電型不純物導入による@3の層を浅く形成し、算1の
層と第3の層、第3の層の層と第2の層の上面及び第2
の層の下面と基体半導体とによる3つのPM接合面全受
光領域としたことを特徴とする半導体受光素子。
[Scope of Claims] 1. Five main surfaces within a first conductivity type semiconductor substrate. A shallow second conductivity type impurity-introduced layer was entirely formed in a region away from the semiconductor light-receiving element to form two PM junction surface receiving regions formed by the base semiconductor and the upper and lower surfaces of the impurity-introduced layer. . 2. Form a shallow first layer on the main surface of the first conductivity type semiconductor substrate by introducing impurities of the second conductivity type, and form a second layer by introducing impurities into the semiconductor substrate away from the first layer into the semiconductor substrate. - A semiconductor light-receiving element in which 20 layers are formed shallowly, and the light-receiving regions are the lower surface of the first layer, the upper and lower surfaces of the second layer, and the base semiconductor. 3. Form a shallow first layer on the main surface of the first conductive substrate by introducing impurities of the second conductivity type, and form a second layer by introducing impurities of the second conductivity type into the substrate away from the first layer. When the layer is formed shallowly, #C-th layer and I! ! The first layer is different from the second layer.
A shallow @3 layer is formed by introducing a conductivity type impurity, and the top surface of the third layer and the third layer, the top surface of the third layer and the second layer, and the second layer are formed.
A semiconductor light-receiving element characterized in that the entire light-receiving area is formed by three PM junction surfaces formed by the lower surface of the layer and the base semiconductor.
JP56131528A 1981-08-24 1981-08-24 Semiconductor photodetector Pending JPS5833880A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56131528A JPS5833880A (en) 1981-08-24 1981-08-24 Semiconductor photodetector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56131528A JPS5833880A (en) 1981-08-24 1981-08-24 Semiconductor photodetector

Publications (1)

Publication Number Publication Date
JPS5833880A true JPS5833880A (en) 1983-02-28

Family

ID=15060170

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56131528A Pending JPS5833880A (en) 1981-08-24 1981-08-24 Semiconductor photodetector

Country Status (1)

Country Link
JP (1) JPS5833880A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS604255A (en) * 1983-06-13 1985-01-10 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Energy discriminator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS604255A (en) * 1983-06-13 1985-01-10 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Energy discriminator
JPH0263312B2 (en) * 1983-06-13 1990-12-27 Intaanashonaru Bijinesu Mashiinzu Corp

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