JPS583292A - Photoelectric converter - Google Patents

Photoelectric converter

Info

Publication number
JPS583292A
JPS583292A JP56101426A JP10142681A JPS583292A JP S583292 A JPS583292 A JP S583292A JP 56101426 A JP56101426 A JP 56101426A JP 10142681 A JP10142681 A JP 10142681A JP S583292 A JPS583292 A JP S583292A
Authority
JP
Japan
Prior art keywords
semiconductor
chlorine
film
impurity
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56101426A
Other languages
Japanese (ja)
Inventor
Shunpei Yamazaki
舜平 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP56101426A priority Critical patent/JPS583292A/en
Publication of JPS583292A publication Critical patent/JPS583292A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To perform a high efficiency in a photoelectric converter under solar light or a fluorescent lamp by utilizing an absorbing effect to metal impurity by putting-in chlorine into a semiconductor and prticularly in a single crystal silicon semiconductor. CONSTITUTION:A semiconductor substrate 1 is oxidized, chlorine is added to the substrate, and an oxidized silicon 3 with chlorine is formed. Further, the oxidized film of the periphery is selectively retained, and an impurity layer 5 is formed in the other part. Subsequently, an N<+> type layer is thermally diffused in nitrogen. Further, a reflection preventive film 6 is formed on the upper surface of the layer 5. Thereafter, an electrode 10 of silver or nickel for N type impurity or of aluminum for P type impurity is formed. The reflection preventive film contains mainly titanium, tantalum, indium, tin or antimony oxide or nitride.

Description

【発明の詳細な説明】 本発明はムM1下にてその変換効率16以上を有し、ま
たは螢光燈下300ルクスにて5チ以上を有する高効率
の光電変換装置およびその作製方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a highly efficient photoelectric conversion device having a conversion efficiency of 16 or more under mu M1 or 5 or more at 300 lux under fluorescent light, and a method for manufacturing the same.

本発明は太陽電池材料特に低価格用の低純度単結晶珪素
半導体においても特に有効表ものである。本発明は■半
導体特に単結晶珪素半導体中に塩素を含有せしめ半導体
中での拡散長を無添加に比べて5〜100倍も大きくす
ること、■半導体中のスクッキングフォール上等の欠陥
を減少せしめること、■半導体材料を高温で酸化するこ
とによシ低不純度半導体中の不純物特に金属不純物をそ
の表面の酸化膜中にケラター(吸い出す)を利用するこ
とによシ半導体中でキャリア特に少数キャリアの移動度
を大きくすること、さらに(4)この吸い出し効果のお
よぶ表面よ#)〜6μよシ民い領域特に0.5μ以下に
P+NまたはP゛工、Nt工接合を設けることによシそ
の接合面でのキャリアの再結合の防止と接合リークの減
少をはかることを目的としている。
The present invention is particularly effective for solar cell materials, especially low-purity single-crystal silicon semiconductors for low cost use. The present invention aims to: (1) contain chlorine in a semiconductor, especially a single-crystal silicon semiconductor, to increase the diffusion length in the semiconductor by 5 to 100 times compared to a non-additive; and (2) reduce defects such as scooking fall in the semiconductor. ■ By oxidizing the semiconductor material at high temperature, impurities, especially metal impurities, in the low-impurity semiconductor can be removed by using keratin (sucking out) into the oxide film on the surface. In addition, (4) this effect can be achieved by increasing the carrier mobility and (4) by providing a P+N, P-type, or Nt-type junction in a region smaller than 0.5μ, especially in a region smaller than 0.5μ. The purpose is to prevent carrier recombination at the bonding surface and reduce bonding leakage.

本発明はこの吸い出し効果を求めるため、塩素を有する
雰棚気での酸化を1050°C以上好ましくは4o〜1
250°Cの高温で10分以上好ましくは30分〜6時
間(さらに長時間でもよい)行なわしめることによシ重
金属のチックリングを行ない、また半導体中でのスクッ
キングフオルトを消滅せしめることを目的としている。
In the present invention, in order to obtain this suction effect, oxidation in an atmosphere containing chlorine is carried out at 1050°C or higher, preferably 4°C to 1°C.
Tickling of heavy metals is carried out at a high temperature of 250°C for 10 minutes or more, preferably 30 minutes to 6 hours (longer periods are also acceptable), and scooking faults in the semiconductor are also eliminated. The purpose is

本発明はP1工、P’NXN’工(1層は真性または1
0100fL以上特に101000A以上の比抵抗を有
する半導体とする)接合の接合面を光照射がされる表面
よシきわめて短くするため0.5μ以下好ましくは50
0A〜0.3μときわめてうずく形成するため、この塩
素の添加および吸い出しの工程による再拡散を防ぐため
この工程の後に接合用の不純物層を形成することを特徴
としている。
The present invention is based on P1 process, P'NXN' process (1 layer is intrinsic or 1 layer is
0.5μ or less, preferably 50μ or less in order to make the bonding surface of the junction very short compared to the surface to which light is irradiated.
Since the chlorine is formed in a very thick layer of 0A to 0.3μ, a bonding impurity layer is formed after this process to prevent re-diffusion during the process of adding and sucking out chlorine.

本発明は塩素の添加された半導体上の不純物領域の外周
辺であってかつこの半導体上に添加の際形成された酸化
物被膜を残存させ、その領域下の半導体層に寄生チャネ
ルが形成されることを防止している0 め)を高めることすなわち例えばP−型基板に対し裏面
にホウ素ガラス、酸化珪素膜を塗付形成しこの基板を1
050’Ajlえば120♂C1〜5時間の拡散:→呻
酸化をすることによりゲッタリング塩素添加と同時にホ
ウ素ガラスよりホウ素を基板中に3〜20μ好ましくは
5μ以上の深トリクレンの如き塩化物を酸化物気体例え
ば乾燥酸素とともに1050°C以上の温度特に11Y
O〜1250”Cの温度にて加熱酸化をほどこした。例
えば塩素において酸素の0.1〜10チ特に1〜3チを
また塩化水素にあっては0.5〜20チ特に2〜7チを
気体として同時混入して。トリクレン等の液体にあって
は酸素の3〜30%特に6〜15チの濃度の窒素または
酸素によりバブルし、その蒸気ガスを導入した。トリク
レン丁は炭素、水素の化合物であるが、それらは105
0’C以上の温度特に1100〜1250’C!におい
ては炭素は酸素と反応し炭酸ガスとなシ安定化し珪素半
導体中に混入しないため結果として珪素のみがかかる高
温において珪素半導体中に拡散して混入させることがで
きる。さらにこの時高温での酸化を何5ため、半導体中
の重金属特にFe、N、。
The present invention leaves an oxide film formed on the semiconductor at the outer periphery of an impurity region on a semiconductor to which chlorine is added, and a parasitic channel is formed in the semiconductor layer below the region. In other words, for example, by applying a boron glass or silicon oxide film to the back surface of a P-type substrate, this substrate can be
050'Ajl is 120♂C Diffusion for 1 to 5 hours: → gettering by oxidation At the same time as adding chlorine, oxidize boron from boron glass into the substrate with a depth of 3 to 20μ, preferably 5μ or more, such as chloride. Temperatures above 1050°C, especially 11Y, together with a physical gas such as dry oxygen
Thermal oxidation was carried out at a temperature of 0 to 1250"C. For example, in chlorine, 0.1 to 10 grams of oxygen, especially 1 to 3 grams, and in hydrogen chloride, 0.5 to 20 grams, especially 2 to 7 grams of oxygen. In the case of a liquid such as triclene, it is bubbled with nitrogen or oxygen at a concentration of 3 to 30% of the oxygen, especially 6 to 15%, and the vapor gas is introduced. compounds, but they are 105
Temperatures above 0'C, especially 1100-1250'C! In this case, carbon reacts with oxygen to form carbon dioxide gas, which is stabilized and does not mix into the silicon semiconductor. As a result, only silicon can diffuse and mix into the silicon semiconductor at such high temperatures. Furthermore, at this time, heavy metals in semiconductors, especially Fe, N, etc. are oxidized at high temperatures.

島、Ou、Zn等またB、A1等を吸い出し一部は塩化
物として外拡散を助長できるため結果として電子・ホー
ルのキャリアのライフタイムを10〜100倍も大きく
できた。
It is possible to suck out islands, Ou, Zn, etc., as well as B, A1, etc., and some of them can be converted into chloride to promote outward diffusion, and as a result, the lifetime of electron/hole carriers can be increased by 10 to 100 times.

従来光電変換装置は第1図にその製造工程を置の一例で
ある。
FIG. 1 shows an example of the manufacturing process of a conventional photoelectric conversion device.

図面において半導体(1)例えばP型3Acmの上部に
逆導電型のN型の不純物層(5)を0.3〜1μの深さ
に形成する。この後この不純物層とオーム接触をする電
極用材料(10)を形成した。例えばこのP型半導体に
あってはアルミニューム膜を0.5〜1μの厚さに形成
した。さらにフォトエツチング工程によシレジスト(−
1)をマスクとして不要の材料(10)を選択的に除去
する。この後第1図(0)に示す如く反射防止膜(6)
(ARP’という)を半導体表面上の絶縁膜(5)上お
よび対抗電極(1o)をおおって1/4入にして屈折率
が1.8〜2.2の膜を形成する。
In the drawing, an N-type impurity layer (5) of the opposite conductivity type is formed to a depth of 0.3 to 1 μm on the top of a semiconductor (1), for example, P-type 3Acm. Thereafter, an electrode material (10) was formed to make ohmic contact with this impurity layer. For example, in this P-type semiconductor, an aluminum film was formed to a thickness of 0.5 to 1 μm. Furthermore, a photo-etching process is applied to the resist (-
1) is used as a mask to selectively remove unnecessary material (10). After that, the anti-reflection film (6) is applied as shown in Figure 1 (0).
A film (referred to as ARP') having a refractive index of 1.8 to 2.2 is formed by covering the insulating film (5) on the semiconductor surface and the counter electrode (1o) by 1/4 of the thickness.

また第1図に)の工程の後、これら全体に酸化膜を本発
明の如くトリクレン酸化を施して形成し、この酸化膜を
ARPとして用いることが知られている。しかしこの場
合すでにP ’N接合があるためこの接合がさらに深く
なシ、またARPとしての屈折率も1.3〜1.5シか
得られず、またその際の膜厚が1/4λとなるため、吸
い出した必要な十分な酸化時間がなく、結果として照射
面側の1層(5)での光吸収により光電変換効率の低下
をもたらしてしまった。このため第1図(0)の如き構
造になってもその効率はAM’1(100mw/ c 
rriつにて8〜11%であり螢光燈下300ルクスに
て1〜3%までの変換効率しか得られなかった。
It is also known to form an oxide film over the entire structure by subjecting it to trichlene oxidation as in the present invention after the step shown in FIG. 1), and to use this oxide film as an ARP. However, in this case, since there is already a P'N junction, this junction is deeper, and the refractive index for ARP is only 1.3 to 1.5, and the film thickness at that time is 1/4λ. Therefore, there was not enough oxidation time necessary for extraction, and as a result, the photoelectric conversion efficiency decreased due to light absorption in the first layer (5) on the irradiated surface side. Therefore, even if the structure is as shown in Figure 1 (0), the efficiency is AM'1 (100 mw/c
The conversion efficiency was 8-11% at 300 lux under fluorescent light, and only 1-3% at 300 lux under fluorescent light.

第1図においてはこの反射防止膜(6)を真空蒸着法で
SiO等を蒸着して形成したが、この場合はこの電極(
10)の側部(9)が蒸着されにくくきわめて薄くなっ
てしまう。さらに塗付法により形成するとこの側部(9
)にのみ本来の’700〜1000Aの厚さではなく5
000A〜1μも形成されてしまい、この塗付された反
射防止膜と電極(10)との熱歪が信頼性の劣化をおよ
ぼす等工学的に実用化はきわめて困!血なものとしてい
た。
In Fig. 1, this antireflection film (6) was formed by depositing SiO or the like using a vacuum evaporation method, but in this case, this electrode (
The side part (9) of 10) is difficult to be deposited and becomes extremely thin. Furthermore, when formed by the coating method, this side part (9
) instead of the original '700-1000A thickness.
000A to 1μ is formed, and thermal distortion between the applied antireflection film and the electrode (10) deteriorates reliability, making it extremely difficult to put it into practical use from an engineering perspective! It was bloody.

本発明はかかる欠点を防いだものであり、第2図〜第4
図にその実施例が示されているが、半導体およびその光
照射面である主面に設けられたP1工、N+工、P4N
、N“P等のドまたはN)導電型を有する不純物層とそ
の上面には屈折率1.7〜2.2の反射防止膜特にチタ
ンまたはタンタルの酸化物を主成分とした膜が形成され
ておりその厚さも1/4λとし太陽光においては700
〜100OAの厚さを特定して有せしめていること、さ
らに変換効率を向上せしめるため入射光特に短波長側の
特性を向上させるため不純物層(5)は0.5μ以下特
に500八〜0.3μとしていることを特徴としている
。□ そのため重金属を吸い出しスクッキングフオルトを除去
してしまった後不純物層をこの除去のための温度よりも
低い温度すなわち前者が1050’Oにおいては100
−0’(!以下例えば前者が1200°C20分〜6時
間とすると900’0 5〜15分と不純物の再拡散が
全くおきないようにしさらにこの不純物層の接合深さが
0.5μ以下と吸い出しが1μ以上特に1〜10μであ
るのに比べてこの接合面を塩素が添加された領域に設け
たことを特徴としている。′ 以下に図面に従ってその実施例を説明する。
The present invention prevents such drawbacks and eliminates the problems shown in FIGS. 2 to 4.
An example of this is shown in the figure.
, N"P, etc., and an impurity layer having conductivity type, and an antireflection film having a refractive index of 1.7 to 2.2, particularly a film mainly composed of titanium or tantalum oxide, is formed on the upper surface of the impurity layer. Its thickness is also 1/4λ, and in sunlight it is 700
The thickness of the impurity layer (5) is 0.5 μm or less, especially 500 μm to 0.5 μm, in order to improve the conversion efficiency and improve the characteristics of the incident light, especially on the short wavelength side. It is characterized by being 3μ. □ Therefore, after sucking out heavy metals and removing scooking faults, the impurity layer is heated at a temperature lower than the temperature for this removal, that is, when the former is 1050'O,
-0'(!Hereinafter, for example, if the former is 1200°C for 20 minutes to 6 hours, 900'0 5 to 15 minutes to ensure that no re-diffusion of impurities occurs, and furthermore, the junction depth of this impurity layer is 0.5μ or less. It is characterized in that this joint surface is provided in a region to which chlorine has been added, since the suction is 1 μ or more, particularly 1 to 10 μ.' Examples thereof will be described below with reference to the drawings.

実施例1 第2図は本発明を実施するだめの光電変換装置のたて断
面図を示す。
Embodiment 1 FIG. 2 shows a vertical sectional view of a photoelectric conversion device for implementing the present invention.

バブルしその混合気体を反応炉に流し1200’C!3
0分〜3時間加熱させ半導体を酸化した。そして半導体
基板(2)中に塩素を添加し、加えて塩素入りの酸化珪
素(3)を15oO〜1μAの厚さに形成した。この高
温にすることにより低級の単結晶珪素も吸い出し効果と
欠陥の消滅によシ拡散を1〜10μより200〜700
μにまでホール・電子を大きくすることにでき、高純度
の珪素半導体と同様の特性を得ることができた。
Pour the bubble mixture into the reactor and heat it to 1200'C! 3
The semiconductor was oxidized by heating for 0 minutes to 3 hours. Then, chlorine was added into the semiconductor substrate (2), and in addition, silicon oxide containing chlorine (3) was formed to a thickness of 15oO to 1μA. By raising the temperature to this high temperature, even low-grade single crystal silicon can be sucked out and the defects can be eliminated.
We were able to increase the size of holes and electrons to μ, and were able to obtain properties similar to those of high-purity silicon semiconductors.

さらに(B)において主面の周辺苗・の酸化膜(3)を
選択的に残存させ、他部に不純物層(5) 、 (4)
を500A〜0.5μの深さに形成する。すなわち半導
体(2)の上面には塗付法によりリンガラス(p S 
G)またはヒ素ガラス(A S G)を形成させ150
〜3006Cのプリベークを行なった。次に窒素中にて
、700〜1000@Oにて加熱拡散しN1層(シート
抵抗10〜80 ”10 )を0.5μ以下特に500
A〜0.3μの深さに拡散した。
Furthermore, in (B), the oxide film (3) of the peripheral seedlings on the main surface is selectively left, and the impurity layers (5), (4) are formed on other parts.
is formed to a depth of 500A to 0.5μ. That is, the upper surface of the semiconductor (2) is coated with phosphorus glass (pS) by a coating method.
G) or arsenic glass (A S G) 150
~3006C prebake was performed. Next, the N1 layer (sheet resistance 10-80"10) was heated and diffused in nitrogen at 700-1000@O to a thickness of 0.5 μ or less, especially 500
Diffused to a depth of A~0.3μ.

図面(C)においてさらにこの不純物層(5)の上面に
反射防止膜(6)を形成した。これは第2図の実施例と
同様に塗付法によシ実施した。この塗付された酸化チタ
ン°系の炭水化物を100〜200°C例えば150°
Cにてプリベークした後この上面にスクリーン印刷法に
より本実施例のN&’1つては銀、ニッケル、またPの
不純物層にあってはアルミニュームの電極(10)材料
を塗付し、さらに裏面に対してもオーム接触をする金属
例えばアルミニュームを塗付形成し乾燥用のプリベーク
をした。この後この裏面のコンタクトを落成するととも
に表面において対抗電極材料を反射防止膜を通じてN°
層に電気的に連続するため、さらに空気中または窒素中
にて400〜s o o’cの温度にてシンターをした
。するとこの電極材料の一部はプリベークされた反射防
止膜(6)を貫通して0めの如く基板(1)上の不純物
層(5)と電気的に連続して設けるため、ARP(6)
の電極部でのエツチング工程がない笠低価格用としてす
ぐれている。
In drawing (C), an antireflection film (6) was further formed on the upper surface of this impurity layer (5). This was carried out by a coating method similar to the embodiment shown in FIG. This coated titanium oxide-based carbohydrate is heated to 100 to 200°C, for example 150°C.
After prebaking at C, the electrode (10) material of this embodiment is coated with silver, nickel for the N&' one and aluminum for the P impurity layer by screen printing method on the upper surface, and then the electrode (10) material is applied to the back side. A metal that makes ohmic contact, such as aluminum, was coated and formed, and prebaked for drying. After this, the contact on the back side is completed and the counter electrode material is applied on the front side through the anti-reflection film.
To provide electrical continuity to the layers, additional sintering was performed in air or nitrogen at a temperature of 400 to 400°C. Then, a part of this electrode material penetrates the pre-baked anti-reflection film (6) and is electrically continuous with the impurity layer (5) on the substrate (1) as shown in the figure 0, so that the ARP (6)
The cap does not require an etching process on the electrode section, making it an excellent low-cost product.

さらに本発明方法においては、表面の電極をARP混合
混合面金構成せしめて形成すると同時に裏面において電
極(8)と不純物層(4)とをオーム接触させている点
も特徴である。かくしてその製造工程を簡単化すること
ができた。  −この電極(10)の含浸α■の際同時
に光が照射される領域の反射防止膜(6)も同時にシン
ターされ0めではこれらが一体化するため熱膨張係数が
合い、そのストレスによる不純物層(5)での再結合中
心の発生を防ぐことができた。
Furthermore, the method of the present invention is characterized in that the electrode on the front surface is formed with an ARP mixed surface metal structure, and at the same time, the electrode (8) and the impurity layer (4) are brought into ohmic contact on the back surface. In this way, the manufacturing process could be simplified. - When impregnating this electrode (10), the anti-reflection film (6) in the area that is irradiated with light is also sintered at the same time, and at the 0th point, these are integrated, so their thermal expansion coefficients match, and the impurity layer due to the stress The generation of recombination centers in (5) could be prevented.

第2図の実施例においてAMl下にて電極部の抵抗によ
シ変換効率12〜15チを得ることができた。また螢光
燈下300ルクスにおいても開放電圧0.38V、短絡
電流45 p A / c m’と効率6〜10%を得
、これはこれまでの公表値よりも2〜3倍も大きな値で
あった。さらに反射防止膜を導電性透明膜とすると、こ
の電極間を3〜10mmとしても□効率は13%以上と
することができ、5〜10cm”の大面積化をすること
ができる大面積特徴を有する。
In the example shown in FIG. 2, a conversion efficiency of 12 to 15 degrees could be obtained depending on the resistance of the electrode section under AMl. Furthermore, even under fluorescent light at 300 lux, we obtained an open circuit voltage of 0.38 V, a short circuit current of 45 pA/cm', and an efficiency of 6 to 10%, which is two to three times larger than the previously published values. there were. Furthermore, if the anti-reflection film is a conductive transparent film, the efficiency can be 13% or more even if the distance between the electrodes is 3 to 10 mm, and it has a large area feature that allows for a large area of 5 to 10 cm. have

さらに本発明においては、この反射防止膜は ・酸化チ
タン(TiOx)、酸化珪素−酸化チタン混合物、酸化
タンタル、透明導電膜(酸化スズ。
Furthermore, in the present invention, this antireflection film is: - titanium oxide (TiOx), silicon oxide-titanium oxide mixture, tantalum oxide, transparent conductive film (tin oxide).

■To)の如き酸化物または窒化チタン、窒化り/タル
、窒化インジューム、窒化スズまたはこれらの混合物例
えば工TN(窒化インジュームと窒化スズとの混合物)
のような窒化物特に導電性窒化物により形成しているこ
と、また対抗電極としては塗付、印刷法によるアルミニ
ュウム、ニッケル、銀、インジューム、スス、鉛(半田
)またはこれらの多層または混合物を電極材料としてい
る。すなわちアルミニュームにあってはその下の混合層
はアルミニュームと酸化アルミニュームおよびARP’
材で・あり、微弱光用としてすぐれている。さらにこの
人1の下にNi、Orを0.−01〜3μ形成し、信頼
性を向上せしめてもいる。またAlの上に選択的に銀を
コートし半導体としている。本発明はこれらの電極とし
てリフトオフ法と真空蒸着法とを合わせる方法、さらに
スクリーン印刷または塗付法によシミ極材料をARF上
に印刷形成する方法も用いることができる。
■ Oxides such as titanium nitride, nitride/tal, indium nitride, tin nitride, or mixtures thereof such as TN (mixture of indium nitride and tin nitride)
Nitride, especially conductive nitride, and the counter electrode can be made of aluminum, nickel, silver, indium, soot, lead (solder), or a multilayer or mixture of these by coating or printing. It is used as an electrode material. In other words, in the case of aluminum, the mixed layer below it is aluminum, aluminum oxide, and ARP'
It is made of wood and is excellent for use in weak light. Furthermore, add 0.0 Ni and Or under this person 1. -01 to 3μ is formed to improve reliability. Furthermore, aluminum is selectively coated with silver to make it a semiconductor. In the present invention, for these electrodes, a method combining a lift-off method and a vacuum evaporation method, and a method of printing and forming a stain electrode material on ARF by screen printing or coating method can also be used.

実施例2 この実施例は第3図にそのたて断面図により工程が示さ
れている。すなわち第3図(A)において半導体基板(
1)に対し例えばN型または1型の10〜3000n−
の半導体(2)に対し裏面に対しリンガラス膜(14を
塗付法により形成しさらにその外拡散を防ぐため150
°0のプリベークの後再びその上面に酸化珪素(6)を
塗付、プリベークにて形成した。
Embodiment 2 The steps of this embodiment are shown in FIG. 3 in a vertical sectional view. That is, in FIG. 3(A), the semiconductor substrate (
For example, 10 to 3000 n- of N type or type 1 to 1)
A phosphorus glass film (14) was formed on the back side of the semiconductor (2) by a coating method, and a phosphor glass film (150
After prebaking at 0°C, silicon oxide (6) was again applied to the top surface and formed by prebaking.

この後実施例と同様に半導体(1)を酸化し、酸化膜(
3)を形成し重金属の吸出し、スタッキング2オルトの
消滅を実施せしめた。この表面に12000013時間
もの長い時間の酸化を行なうため、裏面に対しBSIP
 (バックサーフェイスホールド)効果のためNt 5
(4)を5〜20μ(シート抵抗0.1〜5”A )も
拡散せしめることができたOさらに酸化膜(3)を選択
的に除去しP型の不純物層(5)を酸化チタンとホウ素
ガラスとの混合物よりなる反射防止膜を塗付しこの塗付
膜よりホウ素を拡散すると同時に焼成してARPを構成
させた。不純物層は0.5μ以下例えば0.2μ゛(シ
ート抵抗10〜901LA3)とするため900”(:
!い。この後このA RP (a)を選択的に除去しこ
の部分に印刷法または無電界メッキ法によりアルミニュ
ーム、ニッケル、銀またはこれらの多層膜(10)を対
抗電極として形成させた。
Thereafter, the semiconductor (1) was oxidized in the same manner as in the example, and the oxide film (
3) was formed to suck out heavy metals and eliminate stacking 2 ortho. In order to oxidize this surface for as long as 12000013 hours, BSIP was applied to the back surface.
(back surface hold) Nt 5 due to effect
In addition, the oxide film (3) was selectively removed and the P-type impurity layer (5) was replaced with titanium oxide. An anti-reflection film made of a mixture with boron glass was applied, and boron was diffused from this applied film and fired at the same time to form an ARP.The impurity layer should be 0.5μ or less, for example 0.2μ゜ (sheet resistance 10~ 901LA3) to 900”(:
! stomach. Thereafter, this A RP (a) was selectively removed, and aluminum, nickel, silver, or a multilayer film (10) of these was formed as a counter electrode on this portion by a printing method or an electroless plating method.

その結果効率としては螢光燈下での高効率(7〜8チ)
に加えてAMlにおいても16〜18%・  を得るこ
とができた。
As a result, the efficiency is high (7 to 8 inches) under fluorescent light.
In addition to this, it was also possible to obtain 16 to 18% in AMl.

この実施例はP”−I−Nti合であるため接合部で耐
圧が多くまたライフタイムが長いためフォトレスポンス
、長波長側での効率的な高い吸収も得ることができた。
In this example, since the P''-I-Nti bond is used, there is a high breakdown voltage at the junction and a long lifetime, so it was possible to obtain a photoresponse and efficient high absorption on the long wavelength side.

実施例3 第4図(A)は本発明の他の実施例を示している。Example 3 FIG. 4(A) shows another embodiment of the present invention.

この実施例は実施例1をさらに簡略化したものである。This embodiment is a further simplification of the first embodiment.

P型半導体例えば0.1〜3Acm(2)に対し、N1
の不純物層(5)を0.25pの深さに設は拡散電極(
10)は不純物層(5)に実施例1の如く直接連続せし
めたものである。
For a P-type semiconductor, for example, 0.1 to 3 Acm (2), N1
The impurity layer (5) is set at a depth of 0.25p and the diffusion electrode (
10) is directly connected to the impurity layer (5) as in Example 1.

太陽光の照射光(10)に対しAMIにて最大17、 
t3%、螢光燈下300ルクスにて8.5チを得ること
ができた0その他は実施例1と同様である。
Maximum 17 at AMI for sunlight irradiation light (10),
It was possible to obtain t3% and 8.5 inches under fluorescent light at 300 lux.Other aspects were the same as in Example 1.

実施例4 この実施例は第4図(B)に示しであるがP型半導体(
2)に対しN1の不純物層(5)を表面領域にわたって
設けたものである0この実施例においてはARP (6
)を形成してしまった後不純物層(5)をイオン注入法
により10〜1ocmの高濃度に0.5μ以下または0
.1μ以下の深さに不純物を注入しさらにこの後−70
0〜1000″Cの温度に加熱して不純物層(シート抵
抗10〜200 j’L10)を形成した。この時同時
にARPもシンターしてARFとして完成させた。
Example 4 This example is shown in FIG. 4(B), and is based on a P-type semiconductor (
2), an N1 impurity layer (5) is provided over the surface region. In this example, ARP (6
) is formed, the impurity layer (5) is ion-implanted to a high concentration of 10 to 1 ocm with a thickness of 0.5μ or less or 0.
.. Impurities are implanted to a depth of 1μ or less, and then -70
It was heated to a temperature of 0 to 1000''C to form an impurity layer (sheet resistance 10 to 200 j'L10).At the same time, ARP was also sintered to complete ARF.

さらにARF(6)は主面は半導体(2)の側面に対し
て設け、対抗電極(10)の外部接続の際の半導体との
電気°的ショートを除いたものである。
Furthermore, the main surface of the ARF (6) is provided against the side surface of the semiconductor (2), to eliminate electrical short-circuiting with the semiconductor when the counter electrode (10) is externally connected.

実施例5 この実施例は第4図(0)に示している。Example 5 This embodiment is shown in FIG. 4(0).

真性または実質的に真性の半導体(2)に対しN゛の不
純物層(5)を照射面および側面と裏面の一部に設は照
射面には電極等が全く存在させない構造としたものであ
る。
An impurity layer (5) of N゛ is provided on the irradiated surface and part of the side and back surfaces of the intrinsic or substantially intrinsic semiconductor (2), so that no electrodes, etc. are present on the irradiated surface. .

また逆のP4型の不純物層(4)を裏面に選択的に設f
fN”−ニーP゛接合を構成せしめている。電極は(8
)、 (No)とともに裏面に設けている。
In addition, a reverse P4 type impurity layer (4) is selectively formed on the back surface.
fN"-knee P" junction is formed.The electrodes are (8
) and (No) are provided on the back side.

以上の説明より明らかな如く、本発明は低価格であシ・
かつ高信頼性の光電変換装置特に太陽光または民生用の
螢光飛下での高効率を求めたものであり、そのために重
要な表面での反射を限りなく少くシ、また光照射面側の
不純層層を11八 きわめてうずくすることによりその領域での光の吸収性
を少くしさらに入射光の電子Φホール対の発生を促し、
このうち特に内部電界が大きな接合部における重金属、
欠陥等によるキャリアの再都合を防いでいる。
As is clear from the above explanation, the present invention is inexpensive and easy to use.
This is a highly reliable photoelectric conversion device that requires high efficiency, especially when exposed to sunlight or household fluorescent light. By making the impurity layer extremely turbulent, the light absorption in that region is reduced, and furthermore, the generation of electron Φ-hole pairs of incident light is promoted,
Among these, heavy metals in joints with particularly large internal electric fields,
This prevents carrier failures due to defects, etc.

これらを化合的にかつ相乗的に結合せしめることにより
、低級の珪素半導体特に単結晶半導体においてその効果
がきわめて大きなことは工学的またはエネルギ危機下に
おける産業界への寄与が大きいものと信する。
We believe that by combining these chemically and synergistically, the effect is extremely large in low-grade silicon semiconductors, especially single crystal semiconductors, and this will greatly contribute to the industrial world in times of engineering and energy crises.

また多結晶においスもその効果が期待できるが、その場
合は開放電圧が単結晶に比べて特に微弱光において50
〜100mVも低く、本発明にった。
Polycrystalline odor gas can also be expected to have the same effect, but in that case, the open circuit voltage is 50% higher than that of single crystal, especially in weak light.
The voltage was as low as ~100 mV, which is consistent with the present invention.

本発明は半導体基板を主としてP型の単結晶珪素とした
。しかし導電型はN型であってもまた本発明の如く照射
面側より N” −P−−P″構造みではなく、N′−
工−P′、Pl−ニーN″、P’−N”N”−P等の接
合をひとつまたは数層に有せしめ(16) てもよい。また本発明の材料として単結晶珪素ゲントラ
イト型の珪素、高速急冷却の珪素であってもまたその他
の結晶構造さらに他の材料であるゲルマニューム、化合
物半導体等へも本発明の思想を応用させうろことはいう
までもない。
In the present invention, the semiconductor substrate is mainly made of P-type single crystal silicon. However, even if the conductivity type is N type, it is not N''-P--P'' structure from the irradiated surface side as in the present invention, but N'-
It is also possible to have one or several layers of junctions such as P-P', Pl-N", P'-N"N"-P, etc. (16). Also, as the material of the present invention, monocrystalline silicon gentrite type Needless to say, the idea of the present invention can be applied to silicon having a high-speed quenching process, other crystal structures, and other materials such as germanium and compound semiconductors.

さらに本発明においては基板に対したて方向にN’−P
’−F”またはN −P構造とした。しかし基板に対し
横方向にP工NまたはPN接合をひとつまたは複数個構
成せしめつつフォトセンサアレイ等に対してもまたフォ
トトランジスタまたフォトトランジスタアレイに対して
も本発明が適用できることはいうまでもない。
Furthermore, in the present invention, N'-P in the vertical direction with respect to the substrate.
'-F' or N-P structure.However, while configuring one or more P-N or PN junctions in the lateral direction to the substrate, it is also possible to use a phototransistor or a phototransistor array for a photosensor array, etc. Needless to say, the present invention is applicable to any case.

なお本発明においては塩素のみで記した。しかし他のハ
ロゲン例えばフッ素、臭素、ヨウ素であっても本発明に
準する効果が期待できる。
In the present invention, only chlorine is used. However, other halogens such as fluorine, bromine, and iodine can also be expected to produce effects similar to those of the present invention.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来例の光電変換装置を示す。 第2図、第3図は本発明の光電変換装置およびその製造
工程を示すたて断面図である。 第4図は本発明の他の実施例を示す。 特許出願人 株式会社半導体エネルギー研究所 ¥1 図
FIG. 1 shows a conventional photoelectric conversion device. FIGS. 2 and 3 are vertical sectional views showing the photoelectric conversion device of the present invention and its manufacturing process. FIG. 4 shows another embodiment of the invention. Patent applicant: Semiconductor Energy Research Institute, Inc. ¥1 Diagram

Claims (1)

【特許請求の範囲】 1、塩素を含有する半導体と光照射面側の該半導体上に
設けられた高不純物濃度の0.5μ以下の深さを有する
不純物層と該領域上に設けられた屈折率1.7〜2.2
を有する反射防止膜とを有する光電変換装置。 2、特許請求の範囲第1項において、塩素を含有する一
導電型の珪素半導体表面上でかつ逆導電型の不純物領域
の外周辺に塩素を含有する酸化珪素膜が設けられたこと
を特徴とする光電変換装置。 3、特許請求の範囲第1項において、反射防止膜はチタ
ン、タンタル、インジューム、スズまたはアンチモン酸
化物または窒化物を主成分とし入射光に対しその波長の
約1/4波長の厚さを有することを特徴とする光電変換
装置0
[Claims] 1. A semiconductor containing chlorine, an impurity layer with a high impurity concentration and a depth of 0.5μ or less provided on the semiconductor on the light irradiation side, and a refractor provided on the region. Rate 1.7-2.2
A photoelectric conversion device comprising an antireflection film comprising: 2. Claim 1 is characterized in that a silicon oxide film containing chlorine is provided on the surface of a silicon semiconductor of one conductivity type containing chlorine and around the outer periphery of an impurity region of an opposite conductivity type. Photoelectric conversion device. 3. In claim 1, the antireflection film is mainly composed of titanium, tantalum, indium, tin, or antimony oxide or nitride, and has a thickness of about 1/4 of the wavelength of incident light. Photoelectric conversion device 0 characterized by having
JP56101426A 1981-06-29 1981-06-29 Photoelectric converter Pending JPS583292A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56101426A JPS583292A (en) 1981-06-29 1981-06-29 Photoelectric converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56101426A JPS583292A (en) 1981-06-29 1981-06-29 Photoelectric converter

Publications (1)

Publication Number Publication Date
JPS583292A true JPS583292A (en) 1983-01-10

Family

ID=14300373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56101426A Pending JPS583292A (en) 1981-06-29 1981-06-29 Photoelectric converter

Country Status (1)

Country Link
JP (1) JPS583292A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59188979A (en) * 1983-04-11 1984-10-26 Hitachi Ltd Solar battery element
JPS6053572A (en) * 1983-09-03 1985-03-27 Konishiroku Photo Ind Co Ltd Manufacture of magnetic coating

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59188979A (en) * 1983-04-11 1984-10-26 Hitachi Ltd Solar battery element
JPH0512871B2 (en) * 1983-04-11 1993-02-19 Hitachi Ltd
JPS6053572A (en) * 1983-09-03 1985-03-27 Konishiroku Photo Ind Co Ltd Manufacture of magnetic coating
JPH056737B2 (en) * 1983-09-03 1993-01-27 Konishiroku Photo Ind

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