JPS5832779B2 - semiconductor equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and the present invention relates to a semiconductor device.
Concerning coating protection of joints.

Generally speaking, as a method for manufacturing dielectric thin films, DC
There are physical vapor deposition methods such as reactive sputtering, RF sputtering, vapor deposition (including electron beam evaporation), anodic oxidation methods, plasma oxidation methods, etc., and dielectric thin films manufactured by these methods cannot be put to practical use as capacitors. ing.

When viewed as a passivation film for the PN junction exposed on the semiconductor surface, chemical vapor deposited films are superior to the above-mentioned physical vapor deposited films in various respects. Currently, passivation films are obtained by vapor deposition.

As is well known, such chemical vapor deposited films include insulating films such as silicon oxide (Si02), silicon nitride (S i 2N4), and aluminum oxide (At203), which have been put to practical use by taking advantage of their characteristics. There is.

The dielectric constants of these insulating films are approximately 4 for silicon oxide, approximately 7 for silicon nitride, and approximately 9 for aluminum oxide.

Particularly high breakdown voltage (7) where these films are exposed on the semiconductor surface
When used as passivation for a PN junction, the reverse withstand voltage and reverse leakage current of the PN junction may deteriorate or fluctuate during the manufacturing process or during use, making it unsatisfactory in terms of reliability. Therefore, a stable protective film with a high dielectric constant is required.

Due to this need, for example, tantalum oxide (Ta20ρ) is used.

Niobium oxide (Nb205), titanium oxide (Ti
02), semiconductor devices using insulating films with higher dielectric constants than silicon oxide or silicon nitride, such as hafnium oxide (HfO2), zirconium oxide (ZrO2), and yttrium oxide (¥20.), are also being considered for passivation. ing.

However, when an insulating film with such a high dielectric constant, such as a tantalum oxide film, is analyzed using an electron microscope, it is found that this film contains several hundred to
Since the growth of grain boundaries (GRAIN) with a size of several tens of amperes is observed, when such an insulating film is used as passivation for a PN junction with a particularly high breakdown voltage, the PN junction is The reverse breakdown voltage and leakage current of the semiconductor device fluctuate and deteriorate, making it still difficult to obtain a highly reliable semiconductor device.

In addition, the insulating film with a high dielectric constant as described above is difficult to dissolve in a chemical etching solution such as a hydrofluoric acid-based etching solution, so when an electrode is provided on the semiconductor surface, a part of the insulating film is removed by etching. The disadvantage is that it is not possible or requires a more complicated process for etching.

The present invention was made in view of the above-mentioned drawbacks of the conventional technology, and it maintains a high dielectric constant and amorphous (A Z203 *S i3
A mixed thin film with a low electrical conductivity (such as N4) or similar to it is used for passivation of the PN junction exposed on the semiconductor surface.

That is, the present invention provides T 102 y Ta203y Zr o
2y So-called polycrystalline insulating film with high dielectric constant such as Hf024Nb205, Y203, etc. and SiO2, Si3
By mixing a so-called amorphous insulating film (including an aluminum oxide film) such as N4, the above-mentioned 5i3N4 and At
A mixed film having a resistivity comparable to that of the 203 film was formed and used to cover the PN junction exposed on the semiconductor surface.

An embodiment of the present invention will be described below using a Ta205 At203 mixed film.

First, the source of the Ta 205 film is a tank alkoxide such as tank pentamethoxide (Ta (OCH3) 5) or painter's oxide (Ta (OC2H5) 5) or a tantalum halide such as tantalum pentachloride. Use.

On the other hand, aluminum trichloride (Al
Cl2) is used.

Then, tank pentamate oxide is stored in one evaporator, and in this evaporator, an inert gas such as argon or hydrogen gas is placed as a carrier gas, and H2 + CO2 gas is placed as a reactant gas. min
Flow rate of .

- Crab aluminum chloride is stored in the other evaporator and maintained at about 110 DEG C., while an inert gas such as argon or hydrogen gas is flowed into it at a flow rate of about It/min.

However, using a mixer made of quartz, the above T a (0CHa)
By mixing a mixed gas of s+H2+CO2 and AlCl2 vapor and introducing the mixture into a reaction tube, Ta 205 is applied to the surface of a semiconductor such as silicon, including an exposed portion of a PN junction, which has been heated to a predetermined temperature, such as about 850°C.
The A7202-based mixed film was deposited at a rate of about 80 A/min.

Although the growth mechanism of such a mixed film is not very clear, analysis shows that the growth of grain boundaries in the mixed film is significantly suppressed.
This crystalline mixed film consists of very small grain boundaries or has almost amorphous properties, and as shown in Figure 1, its current-voltage characteristics are almost the same as those of silicon nitride films and aluminum oxide films. It has been found.

The dielectric constant of the mixed film is determined by the volume ratio of the mixed film (Al2O3/Ta
20a) can be controlled to any value by selecting, for example (A720J Ta2C)s)
When is about 4 times, the dielectric constant is about 15-20, 5102
About 4 times that of At20. , SI3N4, etc., was able to maintain a high dielectric constant approximately twice that of SI3N4.

Therefore, the semiconductor device according to the present invention in which the PN junction, which has a particularly high breakdown voltage and is exposed on the semiconductor (for example, silicon) surface, is covered with such a mixed film has higher reliability in terms of reverse breakdown voltage, leakage current, etc. compared to conventional devices. We were able to significantly improve this.

The mixed film as described above not only dissolves in a chemical etching solution, such as an etching solution with a volume ratio of hydrofluoric acid to water of 20:50, but also dissolves in a chemical etching solution with a volume ratio of hydrofluoric acid to water of 20:50, as shown in Figure 2. By selecting , the etching rate can be arbitrarily controlled, and as a result, when an electrode is provided on the semiconductor surface, it becomes easy to selectively etch away a part of the mixed film.

In the above embodiments, the semiconductor surface including the exposed part of the PN junction was directly covered with the mixed film, but since this mixed film tends to form a slightly higher surface level than silicon etc., It is more desirable to cover the semiconductor surface including the exposed portion with a mixed film via a silicon oxide thin film or the like.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the voltage-current characteristics of the mixed film, and FIG. 2 is a curve diagram showing the relationship between the volume ratio and etching rate of the mixed film.

Claims (1)

[Scope of Claims] 1. A semiconductor device characterized in that a PN junction surface exposed on a semiconductor surface is coated with a mixed film of silicon oxide and tantalum oxide. 2. A semiconductor device characterized in that the PN junction surface exposed on the semiconductor surface is coated with a mixed film of silicon oxide and zirconium oxide. 3. A semiconductor device characterized in that a PN junction surface exposed on the semiconductor surface is coated with a mixed film of silicon oxide and hafnium oxide. 4. A semiconductor device characterized in that the PN junction surface exposed on the semiconductor surface is coated with a mixed film of silicon oxide and niobium oxide. 5. A semiconductor device characterized in that the PN junction surface exposed on the semiconductor surface is coated with a mixed film of silicon oxide and tantalum oxide via a silicon oxide film. 6. A semiconductor device characterized in that the PN junction surface exposed on the semiconductor surface is coated with a mixed film of silicon oxide and zirconium oxide via a silicon oxide film. 7. A semiconductor device characterized in that the PN junction surface exposed on the semiconductor surface is coated with a mixed film of silicon oxide and hafnium oxide via a silicon oxide film. 8. A semiconductor device characterized in that the PN junction surface exposed on the semiconductor surface is coated with a mixed film of silicon oxide and niobium oxide via a silicon oxide film.