JPS5832778B2 - semiconductor equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device and relates to covering and protecting a PN junction exposed on a semiconductor surface.

Generally speaking, as a method for manufacturing dielectric thin films, DC
There are physical vapor deposition methods such as reactive sputtering, RF sputtering, vapor deposition (including electron beam evaporation), anodic oxidation methods, plasma oxidation methods, etc., and dielectric thin films manufactured by these methods cannot be put to practical use as capacitors. ing.

When viewed as a passivation film for the PN junction exposed on the semiconductor surface, chemical vapor deposited films are superior to the above-mentioned physical vapor deposited films in various respects. Currently, passivation films are obtained by vapor deposition.

As is well known, such chemical vapor deposition films include silicon oxide (S i02 ), silicon nitride (S t 2 N4
) - There are insulating films such as aluminum oxide (Ae203), which are put to practical use by taking advantage of their characteristics.

The dielectric constant of these insulating films is about 4. Silicon nitride is about 7. Aluminum oxide is about 9.

When these films are used as passivation for PN junctions exposed on the semiconductor surface, especially those with high breakdown voltages, the reverse breakdown voltage and reverse leakage current of the PN junctions may deteriorate or fluctuate during the manufacturing process or during use. However, it is insufficient in terms of reliability, and therefore requires a stable protective film with a large dielectric constant.

Because of this necessity, for example, oxidation tank pot Ta203)
Niobium oxide (Nb205'), titanium oxide (T t
02) Semiconductor devices using insulating films with higher dielectric constants than silicon oxide or silicon nitride, such as hafnium oxide (Hf02), deoxidized zirconium (Zr02), and yttrium oxide (Y2O3), are also being considered for passivation.

However, when an insulating film 1 with such a high dielectric constant, such as an oxidized Kunkle film, is analyzed using an electron microscope, it is found that this film contains several hundred to
Since the growth of grain boundaries (GRAIN) with a size of several thousand holes is observed, when such an insulating film is used as passivation for a PN junction with a particularly high breakdown voltage, the PN junction is The reverse breakdown voltage and leakage current of the semiconductor device fluctuate and deteriorate, making it still difficult to obtain a highly reliable semiconductor device.

The insulating film with a high dielectric constant as mentioned above is difficult to dissolve in chemical etching solutions such as hydrofluoric acid-based etching solutions, so when an electrode is provided on the semiconductor surface, a part of the insulating film is removed by etching. The disadvantage is that it is not possible or requires a more complicated process for etching.

The present invention was made in view of the above-mentioned drawbacks of the conventional technology.

It maintains a high dielectric constant and is amorphous (the above Al2O3゜Si3
A mixed thin film with a low electrical conductivity (such as N4) or similar to it is used for passivation of the PN junction exposed on the semiconductor surface.

That is, the present invention uses TiO2, Ta2O3, ZrO2, Nb2
O5.

A so-called polycrystalline insulating film having a high dielectric constant such as Y2O3, etc. and a so-called amorphous (Arnor-p) insulating film such as Si3N4 etc.
By mixing an insulating film (including an aluminum oxide film), a mixed film having a high dielectric constant and a resistivity comparable to that of the amorphous Si3N3 or Al2O3 film is formed, and this is used as a semiconductor film. This was used to cover the PN junction exposed on the surface.

An embodiment of the present invention will be described below using a Ta205-A12o3 mixed film.

First, as a source for the Ta205 film, a tank alkoxide such as tank pentamethoxide (Ta(OCH3)5) or painter's oxide (Ta(OC2H6)) or a tank halide such as tantalum pentachloride is used.

On the other hand, aluminum trichloride (Al
O13) is used.

Then, tank pentamethoxide is stored in one evaporator, in which an inert gas such as argon or hydrogen gas is contained as a carrier gas, and N2+CO is used as a reaction gas.
Approximately 0.5/I for both gases! /min flow rate.

Meanwhile, aluminum trichloride is stored in a local evaporator and maintained at about 110° C., while an inert gas such as argon or hydrogen gas is flowed into it at a flow rate of about 11/min.

However, using a quartz mixer, the above T a (OCH3)
By mixing a mixed gas of 5+ N2 + CO2 and KLCE3 vapor and introducing the mixture into a reaction tube, a surface of a semiconductor, such as silicon, including an exposed part of a PN junction, heated to a predetermined temperature, for example, about 850°C, is heated. T a205
A mixed film based on A1202 was deposited at a rate of about 8 OA/min.

Although the growth mechanism of such a mixed film is not very clear, analysis shows that the growth of grain boundaries in the mixed film is significantly suppressed.
As a result, the mixed film consists of very small grain boundaries or has almost amorphous properties, and as shown in Figure 1, the current-voltage characteristics are almost the same as those of silicon nitride films and aluminum oxide films. It has been found.

The dielectric constant of the mixed film is determined by the volume ratio of the mixed film (Ae2o3/Ta
203) can be controlled to any value. For example, if (Ae203/Ta203) is about 4 times the dielectric constant, the dielectric constant will be about 15 to 20, which is about 4 of S A02.
It was possible to maintain a high dielectric constant of approximately twice that of A1205, S t 3 N4, etc.

Therefore, the semiconductor device according to the present invention in which the PN junction, which has a particularly high breakdown voltage and is exposed on the semiconductor (for example, silicon) surface, is covered with such a mixed film has higher reliability in terms of reverse breakdown voltage, leakage current, etc. compared to conventional devices. We were able to significantly improve this.

The mixed film as described above not only dissolves in a chemical etching solution, such as an etching solution with a volume ratio of hydrofluoric acid to water of 20:50, but also dissolves in a chemical etching solution with a volume ratio of hydrofluoric acid to water of 20:50, as shown in Figure 2. By selecting , the etching rate can be arbitrarily controlled, and as a result, when an electrode is provided on the semiconductor surface, it becomes easy to selectively etch away a part of the mixed film.

In the above embodiments, the semiconductor surface including the exposed part of the PN junction was directly covered with the mixed film, but since this mixed film tends to form a slightly higher surface level than silicon etc., It is more desirable to cover the semiconductor surface including the exposed portion with a mixed film via a silicon oxide thin film or the like.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the voltage-current characteristics of the mixed film, and FIG. 2 is a curve diagram showing the relationship between the volume ratio and etching rate of the mixed film.

Claims (1)

[Scope of Claims] 1. A semiconductor device characterized in that a PN junction surface exposed on a semiconductor surface is coated with a mixed film of alumina and IJ oxide. 2. A semiconductor device characterized in that the PN junction surface exposed on the semiconductor surface is coated with a mixed film of alumina and zirconium oxide. 3. A semiconductor device characterized in that the PN junction surface exposed on the semiconductor surface is coated with a mixed film of alumina and hafnium oxide. 4. A semiconductor device characterized in that the PN junction surface exposed on the semiconductor surface is coated with a mixed film of alumina and niobium oxide. 5. A semiconductor device characterized in that the PN junction surface exposed on the semiconductor surface is coated with a mixed film of alumina and yttrium oxide via a silicon oxide film. 6. A semiconductor device characterized in that the PN junction surface exposed on the semiconductor surface is coated with a mixed film of alumina and zirconium oxide via a silicon oxide film. 7. A semiconductor device characterized in that the PN junction surface exposed on the semiconductor surface is coated with a mixed film of alumina and hafnium oxide via a silicon oxide film. 8. A semiconductor device characterized in that the PN junction surface exposed on the semiconductor surface is coated with a mixed film of alumina and niobium oxide via a silicon oxide film.