JPS5830654B2 - Warm body warmer - Google Patents
Warm body warmerInfo
- Publication number
- JPS5830654B2 JPS5830654B2 JP50014393A JP1439375A JPS5830654B2 JP S5830654 B2 JPS5830654 B2 JP S5830654B2 JP 50014393 A JP50014393 A JP 50014393A JP 1439375 A JP1439375 A JP 1439375A JP S5830654 B2 JPS5830654 B2 JP S5830654B2
- Authority
- JP
- Japan
- Prior art keywords
- write
- circuit
- inductance
- transistor
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Digital Magnetic Recording (AREA)
Description
【発明の詳細な説明】
本発明は磁気ディスク装置等、磁気ヘッドを有する記憶
装置の書込回路(ライト・ドライバ)に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a write circuit (write driver) for a storage device having a magnetic head, such as a magnetic disk device.
記録密度の高い磁気ディスク装置では一般に第1図のよ
うな書込回路を使用している。A magnetic disk device with high recording density generally uses a write circuit as shown in FIG.
磁気ディスク装置では書込電流の立上り時間、立下り時
間、オーバーシュート等によって記録面の磁気状態が変
るため、これらの特性は、書込回路の主要な性格の一部
となっている。In a magnetic disk drive, the magnetic state of the recording surface changes depending on the rise time, fall time, overshoot, etc. of the write current, so these characteristics are part of the main characteristics of the write circuit.
第1図の回路方式では電流の立上り時間等は基本的にヘ
ッドコイルLのインダクタンスおよびダンピング抵抗R
1の抵抗値により決定される。In the circuit system shown in Figure 1, the current rise time, etc. is basically determined by the inductance of the head coil L and the damping resistance R.
It is determined by the resistance value of 1.
なお記録面の外周、個々のヘッドにって磁気記録に最適
な立上り時間等は異なるが、第1図の回路では立上り時
間等を変えることはできない。Although the optimum rise time for magnetic recording differs depending on the outer circumference of the recording surface and each individual head, the rise time etc. cannot be changed in the circuit shown in FIG. 1.
本発明は等価ダンピング抵抗を変えることにより立上り
時間等が可変な書込回路を得るのを目的とする。An object of the present invention is to obtain a write circuit whose rise time and the like are variable by changing the equivalent damping resistance.
第2図、第3図に立上り時間等が可変な書込回路の例を
示す。FIGS. 2 and 3 show examples of write circuits with variable rise times and the like.
第2図の回路では電界効果トランジスタQ3を電圧VG
の制御によりオン・オフする。In the circuit of Fig. 2, the field effect transistor Q3 is connected to a voltage VG.
Turns on and off under control.
トランジスタQ3がオンした時その抵抗値をr(5Nと
すると抵抗値はR1と(R2+r□N)の並列抵抗とな
り立上り時間は遅くなる。When the transistor Q3 is turned on, if its resistance value is r(5N), the resistance value becomes a parallel resistance of R1 and (R2+r□N), and the rise time becomes slow.
また電圧■Gを連続的に制御すれば立上り時間等を連続
的に制御できる。Furthermore, if the voltage (G) is continuously controlled, the rise time, etc. can be continuously controlled.
第3図の回路ではトランジスタQ4 、Q5のオン・オ
フにより制御している。In the circuit shown in FIG. 3, control is performed by turning on and off transistors Q4 and Q5.
この回路の動作を第4図により説明する。The operation of this circuit will be explained with reference to FIG.
まず、第3図において電源電圧+E3.十E4はトラン
ジスタQ4 、Q5がオンで書込電流の過渡現象が終っ
た状態(電流切替時のヘッドコイルLのインダクタンス
によるスパイク電圧が出ていない状態)で抵抗R3,R
4に電流が流れないように適当な電圧を選ぶ。First, in FIG. 3, the power supply voltage +E3. 10E4 is a resistor R3, R when transistors Q4 and Q5 are on and the transient phenomenon of the write current has ended (no spike voltage is generated due to the inductance of the head coil L when switching the current).
4. Select an appropriate voltage so that no current flows.
トランジスタQ4 、Q5がオフの時の動作は第1図の
回路と変らない。The operation when transistors Q4 and Q5 are off is the same as the circuit shown in FIG.
トランジスタQ4. Q5がオンしている場合、今トラ
ンジスタQ1がオンしてトランジスタQ2がオフした直
後、第4図のようにスパイク電圧■1は下り、■2は上
ってダンピング抵抗R1には(■2−■1)/R1なる
電流■3が流れるが、同時にダイオードD1、抵抗R3
を通ってトランジスタQ4にIc3上(V2 R3)
/ R3なる電流が流れトランジスタQ5より抵抗へ。Transistor Q4. When Q5 is on, immediately after transistor Q1 is on and transistor Q2 is off, the spike voltage ■1 falls and ■2 rises, as shown in Figure 4, and the damping resistor R1 receives (■2- ■1)/R1 current ■3 flows, but at the same time diode D1 and resistor R3
on Ic3 (V2 R3) through to transistor Q4
/ R3 current flows from transistor Q5 to the resistor.
ダイオードD4を通ってIc4=(R4Vl)/R4な
る電流が流れる。A current of Ic4=(R4Vl)/R4 flows through the diode D4.
次にトランジスタQ1がオフして、トランジスタQ2が
オンした直後はスパイク電圧■1は上り■2は下ってダ
イオードD2.抵抗R3を通って電流Ic3が流れ抵抗
R4,ダイオードD3を通って電流Ic4が流れる。Immediately after transistor Q1 is turned off and transistor Q2 is turned on, spike voltage (1) rises, (2) falls, and diode D2. Current Ic3 flows through resistor R3, and current Ic4 flows through resistor R4 and diode D3.
従ってトランジスタQ4.Q5がオフの場合と比較して
立上り時間は長くなる。Therefore, transistor Q4. The rise time is longer than when Q5 is off.
また■1.■2のスパイク電圧は小さくなる。Also ■1. ■The spike voltage in step 2 becomes smaller.
なお、第3図においてD1〜D4 + R3−R5、Q
4 、Q5で構成されている回路をさらに追加すれば多
段階の切替が可能となる。In addition, in FIG. 3, D1 to D4 + R3-R5, Q
4. If a circuit consisting of Q5 is further added, multi-stage switching becomes possible.
制御信号によって書込電流の立上り時間、立下り時間を
変えられるので記録面の外周と内周についてそれぞれ適
した書込ができる。Since the rise time and fall time of the write current can be changed by the control signal, appropriate writing can be performed on the outer and inner circumferences of the recording surface.
また、書込データの1ビツト毎に立上り時間等を制御す
れば、磁気ヘッドにより記録面に書き込む際の磁気記録
上の位相ずれを減らすことができる。Furthermore, by controlling the rise time and the like for each bit of write data, it is possible to reduce the phase shift in magnetic recording when writing onto the recording surface with the magnetic head.
従って磁気ヘッドの読出信号の位相ずれ(ピーク時刻の
基準時刻に対するずれ)を小さくし最終的には装置のエ
ラーレート(誤り率)を小さくするのに寄与する。Therefore, it reduces the phase shift (shift of the peak time with respect to the reference time) of the read signal of the magnetic head, and ultimately contributes to reducing the error rate of the device.
第1図は従来の書込回路を示す回路図、第2図は本発明
の一実施例を示す回路図、第3図は本発明の他の実施例
を示す回路図、第4図は第3各各の波形図である。
L・・・・・ヘッドコイル、R1・・・・・・ダビング
抵抗、Ql、Q2・・・・・・トランジスタ、Q3・・
・・・・電界効果トランジスタ、Q4. Q5・・・・
・・トランジスタ。FIG. 1 is a circuit diagram showing a conventional write circuit, FIG. 2 is a circuit diagram showing one embodiment of the present invention, FIG. 3 is a circuit diagram showing another embodiment of the present invention, and FIG. 4 is a circuit diagram showing another embodiment of the present invention. 3 is a waveform diagram of each. L...Head coil, R1...Dubbing resistor, Ql, Q2...Transistor, Q3...
...field effect transistor, Q4. Q5...
...Transistor.
Claims (1)
されたスイッチング素子と、前記インダクタンスに並列
に接続されたダンピング抵抗とから戒り、磁気ディスク
の内外周面に応じて書込電流の立上り時間及び立下り時
間を変化させる磁気ヘッド用書込み回路において、前記
ダンピング抵抗に直列もしくは並列に電流制限回路を設
け、インダクタンスに流れる磁気ディスクへの書込電流
の立上がり及び立下がり時間を可変としたことを特徴と
する磁気ヘッド用書込回路。1. The rise time and fall time of the write current are determined based on the inductance, the switching element connected to both ends of the inductance, and the damping resistor connected in parallel to the inductance, and the rise time and fall time of the write current according to the inner and outer circumferential surfaces of the magnetic disk. A write circuit for a magnetic head that changes the magnetic head, characterized in that a current limiting circuit is provided in series or parallel to the damping resistor, and the rise and fall times of the write current flowing through the inductance to the magnetic disk are made variable. Write circuit for head.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50014393A JPS5830654B2 (en) | 1975-02-05 | 1975-02-05 | Warm body warmer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50014393A JPS5830654B2 (en) | 1975-02-05 | 1975-02-05 | Warm body warmer |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5189711A JPS5189711A (en) | 1976-08-06 |
JPS5830654B2 true JPS5830654B2 (en) | 1983-06-30 |
Family
ID=11859801
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50014393A Expired JPS5830654B2 (en) | 1975-02-05 | 1975-02-05 | Warm body warmer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5830654B2 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2647645B2 (en) * | 1984-04-20 | 1997-08-27 | ローム 株式会社 | Magnetic recording device |
JPS61217907A (en) * | 1985-03-25 | 1986-09-27 | Hitachi Ltd | Data writing/reading-out circuit |
JPH01229467A (en) * | 1988-03-09 | 1989-09-13 | Gunma Nippon Denki Kk | Floppy disk device |
JP2615340B2 (en) * | 1993-05-17 | 1997-05-28 | ローム株式会社 | Magnetic recording device |
JP2615339B2 (en) * | 1993-05-17 | 1997-05-28 | ローム株式会社 | Magnetic recording device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5427940U (en) * | 1977-07-29 | 1979-02-23 |
-
1975
- 1975-02-05 JP JP50014393A patent/JPS5830654B2/en not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5427940U (en) * | 1977-07-29 | 1979-02-23 |
Also Published As
Publication number | Publication date |
---|---|
JPS5189711A (en) | 1976-08-06 |
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