JPS583044A - Interruption system - Google Patents

Interruption system

Info

Publication number
JPS583044A
JPS583044A JP10190481A JP10190481A JPS583044A JP S583044 A JPS583044 A JP S583044A JP 10190481 A JP10190481 A JP 10190481A JP 10190481 A JP10190481 A JP 10190481A JP S583044 A JPS583044 A JP S583044A
Authority
JP
Japan
Prior art keywords
switch
interruption
control
register
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10190481A
Other languages
Japanese (ja)
Inventor
Takeshi Nishinomiya
西宮 健
Haruki Hayashi
林 春樹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10190481A priority Critical patent/JPS583044A/en
Publication of JPS583044A publication Critical patent/JPS583044A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers

Abstract

PURPOSE:To simplify an interruption system, by reducing complicated procedures such as switching or arrangement of switches, etc., and the quantity of hardwares for constituting a register and the switch. CONSTITUTION:An interruption signal from a magnetic disk device 2 is set to an interruption register 5a and 5b through a signal bus 20a and 20b, respectively, and is informed to a magnetic disk controller 3a and 3b through signal buses 21a, 21b, respectively. The magnetic disk controller 3a applies a reset signal to the interruption register 5a through a signal bus 22a, and executes a prescribed processing for the interruption. When the processing ends, it is informed to a switch control part 4 through a signal bus 7a, and a switch 11a is turned off. Also, it is informed to the switch control part 4 through a signal bus 7b, a switch 11b is turned on, the interruption register 5b is reset through a signal bus 22b, and a prescribed interruption processing is executed.

Description

【発明の詳細な説明】 不発明は割込方式に係L 41に非同期な割込九1lt
P行う制御アダプタであって、更には磁気ディスク装置
に適用して効果を発揮する磁気ディスタ制御アダプタに
関する。
[Detailed description of the invention] The non-invention relates to the interrupt method L41 asynchronous interrupt 91lt
The present invention relates to a magnetic disk drive control adapter that is effective when applied to a magnetic disk drive.

以下の説明は磁気ディスク制御装置を例にとりて行う〇 償号紘、磁気ディスク−御アダプタの一系の上位インタ
フェースにりながる磁気ディスク制御装置だけに通知さ
れ、他系の上位インタフェースにつながる磁気ディスク
制#装瞳へOS込信号の通知は、m込通知を受けた一系
の磁気ディスクm*装置からの折返し信号によって行う
方式であり友Osbは磁気ディスク制御装置であって、
−りの−込系#Kll込レジスタSa、Sbと他系の割
込をセットするPCIレジスタ6aと6bを用意してい
え04拡スイッチ制御sでありて、SケOスイッチ10
゜11a、llb、H!a、l!bell讐LII御會
する020〜m4に、7a、bは信号パスで1h為。
The following explanation uses a magnetic disk controller as an example. Notification of the OS inclusion signal to the disk system #system is performed by a return signal from the magnetic disk m* device of the series that received the m inclusion notification, and the friend Osb is a magnetic disk control device,
-Rino-Integrated system #Kll included registers Sa, Sb and PCI registers 6a and 6b for setting interrupts of other systems are prepared.
゜11a,llb,H! a, l! 7a and b are signal paths for 1 hour from 020 to m4 where bell enemy LII will meet.

磁気ディスタ偏置2から割込償4#−出為と、スイッチ
IOKよりて信号パス鵞O島で割込レジスタleaがセ
ットされ、続いて信号パス21mから磁気ディスク制御
装置8aK遍知される。磁気ディスク制御装置8&から
は信号パス228とスイッチ11&によりて割込レジス
タ51のりセットとIII系のPCIレジスタ6にのセ
ットを行りて、*気ディスク制御装置3bK通知してか
ら所定の割込電層を行う。その後で、Jl気ディスタl
111IIlllI&置3&は信号パス7aでスイッチ
制#部4に通知し。
Interrupt compensation 4#-is issued from the magnetic disk disk offset 2, and the interrupt register lea is set in the signal path Ojima by the switch IOK, and then the magnetic disk control device 8aK is notified from the signal path 21m. The magnetic disk controller 8 & sets the interrupt register 51 and the III system PCI register 6 via the signal path 228 and the switch 11 &, and issues a predetermined interrupt after notifying the disk controller 3bK. Perform electric layer. After that, Jlqi Dista l
111IIllI&position 3& is notified to the switch # section 4 via the signal path 7a.

スイッチl1mと12aをオフに、スイッチ101中立
にさせ為0備気デイスク制御装置8bはスイッチ10が
中立になり九番と検知してから、スイッチ制御54に通
知し、スイッチfileと12b管オyK、スイッチ1
O1−割込レジスタsb襞絖曽I!O手履くなる割込の
セット・リ−ky)方式テ紘、スイッチ100@讐、他
系のPclレジスメヘO折返し信号によるセットなどの
平原の曽輔さと、レジスタ中スイッチを構成するハード
1−ア量が多くなっている欠点があった。
In order to turn off the switches l1m and 12a and set the switch 101 to neutral, the disk control device 8b detects that the switch 10 is neutral and is number 9, and then notifies the switch control 54 and turns on the switch file and the switch 12b pipe yK. , switch 1
O1-interrupt register sb fold I! O Hand-made interrupt set/re-ky) method Tehiro, switch 100@enemy, Pcl register of other systems O Hirahara's Sosuke such as setting by return signal, and hardware 1-A that constitutes the switch in the register There was a drawback that the amount was large.

本Ii嘴O1#紘、前記の欠点t−a畳し、少いパード
ウ翼ア量と割込方式の簡略化【計る事KhL本目的を達
成する為の本発明になる割込方式は。
The present Ii beak O1#Hiro, the above-mentioned drawbacks, small amount of blades and simplification of the interrupt method.

非制御装置と複数の!1194装置を接続する制御アダ
プタでTo−)て、スイッチ制御Sを設け、Iに複数の
鋏制御装置対応に、ll込レしスメと腋スイッチ制御S
が択一選択で制御する#襞スイッチとを毅け、鋏非制御
装置からの割込信号を複数の該割込レジスタにセットし
て該制御装置に通知し、該制御装置から該割込レジスタ
のリセットを鍍スイッチ制御部の択一選択制御による鋏
M*スイッチのオン・オフによりて行う事を特徴とする
ものであり、詳細はllAt用いた説明で明らかにする
〇第2fiAは本発明の一実施例にな為礒気ディスタ制
御アダプメOm込回路図でToる0 図において、lは磁気ディスタ制御アダプタ。
Non-controlled devices and multiple! A control adapter that connects the 1194 device is provided with a switch control S, and a switch control S is installed on the I to support multiple scissors control devices.
sets the interrupt signal from the non-scissor control device to the plurality of interrupt registers and notifies the control device, and the control device then sends the interrupt signal to the interrupt register. The second fiA is characterized in that it is reset by turning on and off the scissors M* switch by the selection control of the sill switch control section, and the details will be clarified in the explanation using llAt. In one embodiment, the magnetic disk control adapter Om is included in the circuit diagram. In the figure, l is the magnetic disk control adapter.

2は非制御装置としての磁気ディスタ装置、  3aと
sbは冬々別系の磁気ディスク制御装置、5畠とsbは
割込レジスタ、4はスイッチ制御部、意O〜!21Bと
7&、bは信号パス、11&とin線スイッチである。
2 is a magnetic disk device as a non-control device, 3a and sb are magnetic disk control devices of different systems, 5 and sb are interrupt registers, and 4 is a switch control unit. 21B, 7&, b are signal paths, and 11& is an in-line switch.

丁 続 補 正 書輸発) 番ノ 特許庁長官 島田巻量 殿 1、事件の表示 昭和ぷ乙ギ持許願第toifρ4号 2発明の名称1151代 3 補正?する者 事件との関係     特許出願人 住所 神奈川県用崎市中原区上小田中1015番地<5
22)名称富士通株式会社 昭和  年  月  日 (1)本願明amの特許請求の範囲の項1にμ下の通り
補正する。
Director General of the Patent Office Mr. Shimada Makiro 1, Indication of the incident Showa Pyugi Permit Application No. 4 Toif ρ 2 Name of the invention 1151 generation 3 Amendment? Relationship with the case of the person who did the patent application Address of the patent applicant: 1015 Kamiodanaka, Nakahara-ku, Yozaki City, Kanagawa Prefecture <5
22) Name Fujitsu Ltd. Showa Year Month Date (1) Clause 1 of the scope of claims of the present application is amended as shown below.

r(1)  4制御装置と複数の制御装置を接続する制
−アダプタであって、スイッチ制御部を設け。
r(1) A control adapter that connects the 4 control device and a plurality of control devices, and is provided with a switch control section.

更に4数の該制御装置対応に、割込レジスタと該スイッ
チ制御部が択一選択で制御する断接スイッチとt設け、
該被制御装置からの割込信号を複数の該割込レジスタに
セ、トシて&1制御鍼1に通知し、該?[II制御装置
力為ら該割込レジスタのリセットを該スイッチ制御部の
択一選択制御による該断接スイッチのオフ・オフに工っ
て行う事t一時愼とする割込方式。」 (2ン  本願明d薔の開明の−細な説明の項を以ドの
通り補正する。
Furthermore, an interrupt register and a connection/disconnection switch controlled by the switch control unit in an alternative manner are provided corresponding to the four control devices;
The interrupt signal from the controlled device is sent to the plurality of interrupt registers, and the control needle 1 is notified. [II] An interrupt method in which the interrupt register is temporarily reset by the control unit by turning the connection/disconnection switch on and off under the alternative selection control of the switch control unit. (2) The detailed explanation section of the present invention is amended as follows.

(SL)$2頁目第11行目の[)a、 bJ f 「
7m。
(SL) $2nd page, line 11 [)a, bJ f ``
7m.

7bJに補正する。Corrected to 7bJ.

tb)  第4瓜目渠3行目と同頁第7行目と同頁構l
フ行目の「非制#装置」を「4制御装置」に。
tb) Same page structure as the 7th line of the 4th urame culvert line 3
Change the "uncontrolled #device" on the 5th line to "4 control device".

同JjJ19行目の「’7a、 bJ f 「7a、フ
b」に各々補正する。
``'7a, bJ f'' on the 19th line of JjJ is corrected to ``7a, fb''.

(C)第5貞目第3行目の[21a、 bJt r21
a。
(C) 5th Sadame 3rd row [21a, bJt r21
a.

(a)第6jij目第6行目の「ao−22bJを「2
O−−24b」に補旧する。
(a) Change “ao-22bJ” to “2” in the 6th line of the 6th jij.
O--24b".

4  鴫へ−1141,−4 To Shizuku-1141,-

Claims (1)

【特許請求の範囲】[Claims] (1)  非制御装置と複数の制御装置t−摘絖する制
御アダプタであって、スイッチ制御Ilt設け、][に
複数の蚊制御装置対応に2割込レジスメと該スイッチ制
御部か択−遍択で制御する新漬スイッチとを設け、諌非
制御装置からの割込償−tt複数の該割込レジスタにセ
ットして皺制御装置に通知し、該制御装置から皺側込レ
ジスタのりセラ)1腋スイッチ制御部O択一選択制御に
よる鋏断接スイッチのオン・オフによって行つ事1*黴
とする割込方式〕
(1) A control adapter for controlling a non-control device and a plurality of control devices, which is equipped with a switch control Ilt, and has a 2-interrupt register and a switch control section for multiple mosquito control devices. Interrupt compensation from the control device is set in a plurality of interrupt registers to notify the wrinkle control device, and the control device sends a notification to the wrinkle side register. 1 Armpit switch controller
JP10190481A 1981-06-30 1981-06-30 Interruption system Pending JPS583044A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10190481A JPS583044A (en) 1981-06-30 1981-06-30 Interruption system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10190481A JPS583044A (en) 1981-06-30 1981-06-30 Interruption system

Publications (1)

Publication Number Publication Date
JPS583044A true JPS583044A (en) 1983-01-08

Family

ID=14312890

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10190481A Pending JPS583044A (en) 1981-06-30 1981-06-30 Interruption system

Country Status (1)

Country Link
JP (1) JPS583044A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0126610A2 (en) * 1983-05-16 1984-11-28 Data General Corporation Disk drive system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0126610A2 (en) * 1983-05-16 1984-11-28 Data General Corporation Disk drive system

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